X-Git-Url: http://plrg.eecs.uci.edu/git/?p=firefly-linux-kernel-4.4.55.git;a=blobdiff_plain;f=drivers%2Fgpu%2Fdrm%2Frockchip%2Frockchip_drm_vop.c;h=336119a6330223688f288c3567afaba28fb8c08b;hp=03c47eeadc812ba649e68ad97270d5c512efea86;hb=25a1235046763092c3159cf9ea4c04902cd2430a;hpb=c1f4a149406ce41962c6ba7d92047563f9e26e0b diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 03c47eeadc81..336119a63302 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -14,6 +14,7 @@ #include #include +#include #include #include #include @@ -29,72 +30,140 @@ #include #include +#include #include "rockchip_drm_drv.h" #include "rockchip_drm_gem.h" #include "rockchip_drm_fb.h" #include "rockchip_drm_vop.h" -#define VOP_REG(off, _mask, s) \ - {.offset = off, \ - .mask = _mask, \ - .shift = s,} +#define VOP_REG_SUPPORT(vop, reg) \ + (!reg.major || (reg.major == VOP_MAJOR(vop->data->version) && \ + reg.begin_minor <= VOP_MINOR(vop->data->version) && \ + reg.end_minor >= VOP_MINOR(vop->data->version) && \ + reg.mask)) -#define __REG_SET_RELAXED(x, off, mask, shift, v) \ - vop_mask_write_relaxed(x, off, (mask) << shift, (v) << shift) -#define __REG_SET_NORMAL(x, off, mask, shift, v) \ - vop_mask_write(x, off, (mask) << shift, (v) << shift) +#define VOP_WIN_SUPPORT(vop, win, name) \ + VOP_REG_SUPPORT(vop, win->phy->name) -#define REG_SET(x, base, reg, v, mode) \ - __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) +#define VOP_CTRL_SUPPORT(vop, win, name) \ + VOP_REG_SUPPORT(vop, vop->data->ctrl->name) + +#define VOP_INTR_SUPPORT(vop, win, name) \ + VOP_REG_SUPPORT(vop, vop->data->intr->name) + +#define __REG_SET(x, off, mask, shift, v, write_mask, relaxed) \ + vop_mask_write(x, off, mask, shift, v, write_mask, relaxed) + +#define _REG_SET(vop, name, off, reg, mask, v, relaxed) \ + do { \ + if (VOP_REG_SUPPORT(vop, reg)) \ + __REG_SET(vop, off + reg.offset, mask, reg.shift, \ + v, reg.write_mask, relaxed); \ + else \ + dev_dbg(vop->dev, "Warning: not support "#name"\n"); \ + } while(0) + +#define REG_SET(x, name, off, reg, v, relaxed) \ + _REG_SET(x, name, off, reg, reg.mask, v, relaxed) +#define REG_SET_MASK(x, name, off, reg, mask, v, relaxed) \ + _REG_SET(x, name, off, reg, reg.mask & mask, v, relaxed) #define VOP_WIN_SET(x, win, name, v) \ - REG_SET(x, win->base, win->phy->name, v, RELAXED) + REG_SET(x, name, win->offset, VOP_WIN_NAME(win, name), v, true) #define VOP_SCL_SET(x, win, name, v) \ - REG_SET(x, win->base, win->phy->scl->name, v, RELAXED) + REG_SET(x, name, win->offset, win->phy->scl->name, v, true) +#define VOP_SCL_SET_EXT(x, win, name, v) \ + REG_SET(x, name, win->offset, win->phy->scl->ext->name, v, true) + #define VOP_CTRL_SET(x, name, v) \ - REG_SET(x, 0, (x)->data->ctrl->name, v, NORMAL) + REG_SET(x, name, 0, (x)->data->ctrl->name, v, false) + +#define VOP_INTR_GET(vop, name) \ + vop_read_reg(vop, 0, &vop->data->ctrl->name) + +#define VOP_INTR_SET(vop, name, mask, v) \ + REG_SET_MASK(vop, name, 0, vop->data->intr->name, \ + mask, v, false) + +#define VOP_INTR_SET_TYPE(vop, name, type, v) \ + do { \ + int i, reg = 0, mask = 0; \ + for (i = 0; i < vop->data->intr->nintrs; i++) { \ + if (vop->data->intr->intrs[i] & type) { \ + reg |= (v) << i; \ + mask |= 1 << i; \ + } \ + } \ + VOP_INTR_SET(vop, name, mask, reg); \ + } while (0) +#define VOP_INTR_GET_TYPE(vop, name, type) \ + vop_get_intr_type(vop, &vop->data->intr->name, type) + +#define VOP_CTRL_GET(x, name) \ + vop_read_reg(x, 0, vop->data->ctrl->name) #define VOP_WIN_GET(x, win, name) \ - vop_read_reg(x, win->base, &win->phy->name) + vop_read_reg(x, win->offset, &VOP_WIN_NAME(win, name)) + +#define VOP_WIN_NAME(win, name) \ + (vop_get_win_phy(win, &win->phy->name)->name) #define VOP_WIN_GET_YRGBADDR(vop, win) \ - vop_readl(vop, win->base + win->phy->yrgb_mst.offset) + vop_readl(vop, win->offset + VOP_WIN_NAME(win, yrgb_mst).offset) #define to_vop(x) container_of(x, struct vop, crtc) #define to_vop_win(x) container_of(x, struct vop_win, base) +#define to_vop_plane_state(x) container_of(x, struct vop_plane_state, base) + +struct vop_zpos { + int win_id; + int zpos; +}; -struct vop_win_state { - struct list_head head; - struct drm_framebuffer *fb; +struct vop_plane_state { + struct drm_plane_state base; + int format; + int zpos; + struct drm_rect src; + struct drm_rect dest; dma_addr_t yrgb_mst; - struct drm_pending_vblank_event *event; + bool enable; }; struct vop_win { + struct vop_win *parent; struct drm_plane base; - const struct vop_win_data *data; + + int win_id; + int area_id; + uint32_t offset; + enum drm_plane_type type; + const struct vop_win_phy *phy; + const uint32_t *data_formats; + uint32_t nformats; struct vop *vop; - struct list_head pending; - struct vop_win_state *active; + struct drm_property *rotation_prop; + struct vop_plane_state state; }; struct vop { struct drm_crtc crtc; struct device *dev; struct drm_device *drm_dev; + struct drm_property *plane_zpos_prop; bool is_enabled; - int connector_type; - int connector_out_mode; - /* mutex vsync_ work */ struct mutex vsync_mutex; bool vsync_work_pending; struct completion dsp_hold_completion; + struct completion wait_update_complete; + struct drm_pending_vblank_event *event; const struct vop_data *data; + int num_wins; uint32_t *regsbak; void __iomem *regs; @@ -119,263 +188,9 @@ struct vop { /* vop dclk reset */ struct reset_control *dclk_rst; - int pipe; - struct vop_win win[]; }; -enum vop_data_format { - VOP_FMT_ARGB8888 = 0, - VOP_FMT_RGB888, - VOP_FMT_RGB565, - VOP_FMT_YUV420SP = 4, - VOP_FMT_YUV422SP, - VOP_FMT_YUV444SP, -}; - -struct vop_reg_data { - uint32_t offset; - uint32_t value; -}; - -struct vop_reg { - uint32_t offset; - uint32_t shift; - uint32_t mask; -}; - -struct vop_ctrl { - struct vop_reg standby; - struct vop_reg data_blank; - struct vop_reg gate_en; - struct vop_reg mmu_en; - struct vop_reg rgb_en; - struct vop_reg edp_en; - struct vop_reg hdmi_en; - struct vop_reg mipi_en; - struct vop_reg out_mode; - struct vop_reg dither_down; - struct vop_reg dither_up; - struct vop_reg pin_pol; - - struct vop_reg htotal_pw; - struct vop_reg hact_st_end; - struct vop_reg vtotal_pw; - struct vop_reg vact_st_end; - struct vop_reg hpost_st_end; - struct vop_reg vpost_st_end; -}; - -struct vop_scl_regs { - struct vop_reg cbcr_vsd_mode; - struct vop_reg cbcr_vsu_mode; - struct vop_reg cbcr_hsd_mode; - struct vop_reg cbcr_ver_scl_mode; - struct vop_reg cbcr_hor_scl_mode; - struct vop_reg yrgb_vsd_mode; - struct vop_reg yrgb_vsu_mode; - struct vop_reg yrgb_hsd_mode; - struct vop_reg yrgb_ver_scl_mode; - struct vop_reg yrgb_hor_scl_mode; - struct vop_reg line_load_mode; - struct vop_reg cbcr_axi_gather_num; - struct vop_reg yrgb_axi_gather_num; - struct vop_reg vsd_cbcr_gt2; - struct vop_reg vsd_cbcr_gt4; - struct vop_reg vsd_yrgb_gt2; - struct vop_reg vsd_yrgb_gt4; - struct vop_reg bic_coe_sel; - struct vop_reg cbcr_axi_gather_en; - struct vop_reg yrgb_axi_gather_en; - - struct vop_reg lb_mode; - struct vop_reg scale_yrgb_x; - struct vop_reg scale_yrgb_y; - struct vop_reg scale_cbcr_x; - struct vop_reg scale_cbcr_y; -}; - -struct vop_win_phy { - const struct vop_scl_regs *scl; - const uint32_t *data_formats; - uint32_t nformats; - - struct vop_reg enable; - struct vop_reg format; - struct vop_reg rb_swap; - struct vop_reg act_info; - struct vop_reg dsp_info; - struct vop_reg dsp_st; - struct vop_reg yrgb_mst; - struct vop_reg uv_mst; - struct vop_reg yrgb_vir; - struct vop_reg uv_vir; - - struct vop_reg dst_alpha_ctl; - struct vop_reg src_alpha_ctl; -}; - -struct vop_win_data { - uint32_t base; - const struct vop_win_phy *phy; - enum drm_plane_type type; -}; - -struct vop_data { - const struct vop_reg_data *init_table; - unsigned int table_size; - const struct vop_ctrl *ctrl; - const struct vop_win_data *win; - unsigned int win_size; -}; - -static const uint32_t formats_01[] = { - DRM_FORMAT_XRGB8888, - DRM_FORMAT_ARGB8888, - DRM_FORMAT_XBGR8888, - DRM_FORMAT_ABGR8888, - DRM_FORMAT_RGB888, - DRM_FORMAT_BGR888, - DRM_FORMAT_RGB565, - DRM_FORMAT_BGR565, - DRM_FORMAT_NV12, - DRM_FORMAT_NV16, - DRM_FORMAT_NV24, -}; - -static const uint32_t formats_234[] = { - DRM_FORMAT_XRGB8888, - DRM_FORMAT_ARGB8888, - DRM_FORMAT_XBGR8888, - DRM_FORMAT_ABGR8888, - DRM_FORMAT_RGB888, - DRM_FORMAT_BGR888, - DRM_FORMAT_RGB565, - DRM_FORMAT_BGR565, -}; - -static const struct vop_scl_regs win_full_scl = { - .cbcr_vsd_mode = VOP_REG(WIN0_CTRL1, 0x1, 31), - .cbcr_vsu_mode = VOP_REG(WIN0_CTRL1, 0x1, 30), - .cbcr_hsd_mode = VOP_REG(WIN0_CTRL1, 0x3, 28), - .cbcr_ver_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 26), - .cbcr_hor_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 24), - .yrgb_vsd_mode = VOP_REG(WIN0_CTRL1, 0x1, 23), - .yrgb_vsu_mode = VOP_REG(WIN0_CTRL1, 0x1, 22), - .yrgb_hsd_mode = VOP_REG(WIN0_CTRL1, 0x3, 20), - .yrgb_ver_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 18), - .yrgb_hor_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 16), - .line_load_mode = VOP_REG(WIN0_CTRL1, 0x1, 15), - .cbcr_axi_gather_num = VOP_REG(WIN0_CTRL1, 0x7, 12), - .yrgb_axi_gather_num = VOP_REG(WIN0_CTRL1, 0xf, 8), - .vsd_cbcr_gt2 = VOP_REG(WIN0_CTRL1, 0x1, 7), - .vsd_cbcr_gt4 = VOP_REG(WIN0_CTRL1, 0x1, 6), - .vsd_yrgb_gt2 = VOP_REG(WIN0_CTRL1, 0x1, 5), - .vsd_yrgb_gt4 = VOP_REG(WIN0_CTRL1, 0x1, 4), - .bic_coe_sel = VOP_REG(WIN0_CTRL1, 0x3, 2), - .cbcr_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 1), - .yrgb_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 0), - .lb_mode = VOP_REG(WIN0_CTRL0, 0x7, 5), - .scale_yrgb_x = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), - .scale_yrgb_y = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 16), - .scale_cbcr_x = VOP_REG(WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), - .scale_cbcr_y = VOP_REG(WIN0_SCL_FACTOR_CBR, 0xffff, 16), -}; - -static const struct vop_win_phy win01_data = { - .scl = &win_full_scl, - .data_formats = formats_01, - .nformats = ARRAY_SIZE(formats_01), - .enable = VOP_REG(WIN0_CTRL0, 0x1, 0), - .format = VOP_REG(WIN0_CTRL0, 0x7, 1), - .rb_swap = VOP_REG(WIN0_CTRL0, 0x1, 12), - .act_info = VOP_REG(WIN0_ACT_INFO, 0x1fff1fff, 0), - .dsp_info = VOP_REG(WIN0_DSP_INFO, 0x0fff0fff, 0), - .dsp_st = VOP_REG(WIN0_DSP_ST, 0x1fff1fff, 0), - .yrgb_mst = VOP_REG(WIN0_YRGB_MST, 0xffffffff, 0), - .uv_mst = VOP_REG(WIN0_CBR_MST, 0xffffffff, 0), - .yrgb_vir = VOP_REG(WIN0_VIR, 0x3fff, 0), - .uv_vir = VOP_REG(WIN0_VIR, 0x3fff, 16), - .src_alpha_ctl = VOP_REG(WIN0_SRC_ALPHA_CTRL, 0xff, 0), - .dst_alpha_ctl = VOP_REG(WIN0_DST_ALPHA_CTRL, 0xff, 0), -}; - -static const struct vop_win_phy win23_data = { - .data_formats = formats_234, - .nformats = ARRAY_SIZE(formats_234), - .enable = VOP_REG(WIN2_CTRL0, 0x1, 0), - .format = VOP_REG(WIN2_CTRL0, 0x7, 1), - .rb_swap = VOP_REG(WIN2_CTRL0, 0x1, 12), - .dsp_info = VOP_REG(WIN2_DSP_INFO0, 0x0fff0fff, 0), - .dsp_st = VOP_REG(WIN2_DSP_ST0, 0x1fff1fff, 0), - .yrgb_mst = VOP_REG(WIN2_MST0, 0xffffffff, 0), - .yrgb_vir = VOP_REG(WIN2_VIR0_1, 0x1fff, 0), - .src_alpha_ctl = VOP_REG(WIN2_SRC_ALPHA_CTRL, 0xff, 0), - .dst_alpha_ctl = VOP_REG(WIN2_DST_ALPHA_CTRL, 0xff, 0), -}; - -static const struct vop_ctrl ctrl_data = { - .standby = VOP_REG(SYS_CTRL, 0x1, 22), - .gate_en = VOP_REG(SYS_CTRL, 0x1, 23), - .mmu_en = VOP_REG(SYS_CTRL, 0x1, 20), - .rgb_en = VOP_REG(SYS_CTRL, 0x1, 12), - .hdmi_en = VOP_REG(SYS_CTRL, 0x1, 13), - .edp_en = VOP_REG(SYS_CTRL, 0x1, 14), - .mipi_en = VOP_REG(SYS_CTRL, 0x1, 15), - .dither_down = VOP_REG(DSP_CTRL1, 0xf, 1), - .dither_up = VOP_REG(DSP_CTRL1, 0x1, 6), - .data_blank = VOP_REG(DSP_CTRL0, 0x1, 19), - .out_mode = VOP_REG(DSP_CTRL0, 0xf, 0), - .pin_pol = VOP_REG(DSP_CTRL0, 0xf, 4), - .htotal_pw = VOP_REG(DSP_HTOTAL_HS_END, 0x1fff1fff, 0), - .hact_st_end = VOP_REG(DSP_HACT_ST_END, 0x1fff1fff, 0), - .vtotal_pw = VOP_REG(DSP_VTOTAL_VS_END, 0x1fff1fff, 0), - .vact_st_end = VOP_REG(DSP_VACT_ST_END, 0x1fff1fff, 0), - .hpost_st_end = VOP_REG(POST_DSP_HACT_INFO, 0x1fff1fff, 0), - .vpost_st_end = VOP_REG(POST_DSP_VACT_INFO, 0x1fff1fff, 0), -}; - -static const struct vop_reg_data vop_init_reg_table[] = { - {SYS_CTRL, 0x00c00000}, - {DSP_CTRL0, 0x00000000}, - {WIN0_CTRL0, 0x00000080}, - {WIN1_CTRL0, 0x00000080}, - /* TODO: Win2/3 support multiple area function, but we haven't found - * a suitable way to use it yet, so let's just use them as other windows - * with only area 0 enabled. - */ - {WIN2_CTRL0, 0x00000010}, - {WIN3_CTRL0, 0x00000010}, -}; - -/* - * Note: rk3288 has a dedicated 'cursor' window, however, that window requires - * special support to get alpha blending working. For now, just use overlay - * window 3 for the drm cursor. - * - */ -static const struct vop_win_data rk3288_vop_win_data[] = { - { .base = 0x00, .phy = &win01_data, .type = DRM_PLANE_TYPE_PRIMARY }, - { .base = 0x40, .phy = &win01_data, .type = DRM_PLANE_TYPE_OVERLAY }, - { .base = 0x00, .phy = &win23_data, .type = DRM_PLANE_TYPE_OVERLAY }, - { .base = 0x50, .phy = &win23_data, .type = DRM_PLANE_TYPE_CURSOR }, -}; - -static const struct vop_data rk3288_vop = { - .init_table = vop_init_reg_table, - .table_size = ARRAY_SIZE(vop_init_reg_table), - .ctrl = &ctrl_data, - .win = rk3288_vop_win_data, - .win_size = ARRAY_SIZE(rk3288_vop_win_data), -}; - -static const struct of_device_id vop_driver_dt_match[] = { - { .compatible = "rockchip,rk3288-vop", - .data = &rk3288_vop }, - {}, -}; -MODULE_DEVICE_TABLE(of, vop_driver_dt_match); - static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v) { writel(v, vop->regs + offset); @@ -393,33 +208,54 @@ static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base, return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask; } -static inline void vop_cfg_done(struct vop *vop) -{ - writel(0x01, vop->regs + REG_CFG_DONE); -} - static inline void vop_mask_write(struct vop *vop, uint32_t offset, - uint32_t mask, uint32_t v) + uint32_t mask, uint32_t shift, uint32_t v, + bool write_mask, bool relaxed) { - if (mask) { + if (!mask) + return; + + if (write_mask) { + v = ((v & mask) << shift) | (mask << (shift + 16)); + } else { uint32_t cached_val = vop->regsbak[offset >> 2]; - cached_val = (cached_val & ~mask) | v; - writel(cached_val, vop->regs + offset); - vop->regsbak[offset >> 2] = cached_val; + v = (cached_val & ~(mask << shift)) | ((v & mask) << shift); + vop->regsbak[offset >> 2] = v; } + + if (relaxed) + writel_relaxed(v, vop->regs + offset); + else + writel(v, vop->regs + offset); } -static inline void vop_mask_write_relaxed(struct vop *vop, uint32_t offset, - uint32_t mask, uint32_t v) +static inline const struct vop_win_phy * +vop_get_win_phy(struct vop_win *win, const struct vop_reg *reg) { - if (mask) { - uint32_t cached_val = vop->regsbak[offset >> 2]; + if (!reg->mask && win->parent) + return win->parent->phy; + + return win->phy; +} - cached_val = (cached_val & ~mask) | v; - writel_relaxed(cached_val, vop->regs + offset); - vop->regsbak[offset >> 2] = cached_val; +static inline uint32_t vop_get_intr_type(struct vop *vop, + const struct vop_reg *reg, int type) +{ + uint32_t i, ret = 0; + uint32_t regs = vop_read_reg(vop, 0, reg); + + for (i = 0; i < vop->data->intr->nintrs; i++) { + if ((type & vop->data->intr->intrs[i]) && (regs & 1 << i)) + ret |= vop->data->intr->intrs[i]; } + + return ret; +} + +static inline void vop_cfg_done(struct vop *vop) +{ + VOP_CTRL_SET(vop, cfg_done, 1); } static bool has_rb_swapped(uint32_t format) @@ -515,9 +351,9 @@ static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src, return val; } -static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, - uint32_t src_w, uint32_t src_h, uint32_t dst_w, - uint32_t dst_h, uint32_t pixel_format) +static void scl_vop_cal_scl_fac(struct vop *vop, struct vop_win *win, + uint32_t src_w, uint32_t src_h, uint32_t dst_w, + uint32_t dst_h, uint32_t pixel_format) { uint16_t yrgb_hor_scl_mode, yrgb_ver_scl_mode; uint16_t cbcr_hor_scl_mode = SCALE_NONE; @@ -530,13 +366,30 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, uint16_t vsu_mode; uint16_t lb_mode; uint32_t val; - int vskiplines; + int vskiplines = 0; + + if (!win->phy->scl) + return; if (dst_w > 3840) { DRM_ERROR("Maximum destination width (3840) exceeded\n"); return; } + if (!win->phy->scl->ext) { + VOP_SCL_SET(vop, win, scale_yrgb_x, + scl_cal_scale2(src_w, dst_w)); + VOP_SCL_SET(vop, win, scale_yrgb_y, + scl_cal_scale2(src_h, dst_h)); + if (is_yuv) { + VOP_SCL_SET(vop, win, scale_cbcr_x, + scl_cal_scale2(cbcr_src_w, dst_w)); + VOP_SCL_SET(vop, win, scale_cbcr_y, + scl_cal_scale2(cbcr_src_h, dst_h)); + } + return; + } + yrgb_hor_scl_mode = scl_get_scl_mode(src_w, dst_w); yrgb_ver_scl_mode = scl_get_scl_mode(src_h, dst_h); @@ -554,7 +407,7 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, lb_mode = scl_vop_cal_lb_mode(src_w, false); } - VOP_SCL_SET(vop, win, lb_mode, lb_mode); + VOP_SCL_SET_EXT(vop, win, lb_mode, lb_mode); if (lb_mode == LB_RGB_3840X2) { if (yrgb_ver_scl_mode != SCALE_NONE) { DRM_ERROR("ERROR : not allow yrgb ver scale\n"); @@ -578,14 +431,14 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, false, vsu_mode, &vskiplines); VOP_SCL_SET(vop, win, scale_yrgb_y, val); - VOP_SCL_SET(vop, win, vsd_yrgb_gt4, vskiplines == 4); - VOP_SCL_SET(vop, win, vsd_yrgb_gt2, vskiplines == 2); + VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt4, vskiplines == 4); + VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt2, vskiplines == 2); - VOP_SCL_SET(vop, win, yrgb_hor_scl_mode, yrgb_hor_scl_mode); - VOP_SCL_SET(vop, win, yrgb_ver_scl_mode, yrgb_ver_scl_mode); - VOP_SCL_SET(vop, win, yrgb_hsd_mode, SCALE_DOWN_BIL); - VOP_SCL_SET(vop, win, yrgb_vsd_mode, SCALE_DOWN_BIL); - VOP_SCL_SET(vop, win, yrgb_vsu_mode, vsu_mode); + VOP_SCL_SET_EXT(vop, win, yrgb_hor_scl_mode, yrgb_hor_scl_mode); + VOP_SCL_SET_EXT(vop, win, yrgb_ver_scl_mode, yrgb_ver_scl_mode); + VOP_SCL_SET_EXT(vop, win, yrgb_hsd_mode, SCALE_DOWN_BIL); + VOP_SCL_SET_EXT(vop, win, yrgb_vsd_mode, SCALE_DOWN_BIL); + VOP_SCL_SET_EXT(vop, win, yrgb_vsu_mode, vsu_mode); if (is_yuv) { val = scl_vop_cal_scale(cbcr_hor_scl_mode, cbcr_src_w, dst_w, true, 0, NULL); @@ -594,13 +447,13 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, dst_h, false, vsu_mode, &vskiplines); VOP_SCL_SET(vop, win, scale_cbcr_y, val); - VOP_SCL_SET(vop, win, vsd_cbcr_gt4, vskiplines == 4); - VOP_SCL_SET(vop, win, vsd_cbcr_gt2, vskiplines == 2); - VOP_SCL_SET(vop, win, cbcr_hor_scl_mode, cbcr_hor_scl_mode); - VOP_SCL_SET(vop, win, cbcr_ver_scl_mode, cbcr_ver_scl_mode); - VOP_SCL_SET(vop, win, cbcr_hsd_mode, SCALE_DOWN_BIL); - VOP_SCL_SET(vop, win, cbcr_vsd_mode, SCALE_DOWN_BIL); - VOP_SCL_SET(vop, win, cbcr_vsu_mode, vsu_mode); + VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt4, vskiplines == 4); + VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt2, vskiplines == 2); + VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, cbcr_hor_scl_mode); + VOP_SCL_SET_EXT(vop, win, cbcr_ver_scl_mode, cbcr_ver_scl_mode); + VOP_SCL_SET_EXT(vop, win, cbcr_hsd_mode, SCALE_DOWN_BIL); + VOP_SCL_SET_EXT(vop, win, cbcr_vsd_mode, SCALE_DOWN_BIL); + VOP_SCL_SET_EXT(vop, win, cbcr_vsu_mode, vsu_mode); } } @@ -613,8 +466,7 @@ static void vop_dsp_hold_valid_irq_enable(struct vop *vop) spin_lock_irqsave(&vop->irq_lock, flags); - vop_mask_write(vop, INTR_CTRL0, DSP_HOLD_VALID_INTR_MASK, - DSP_HOLD_VALID_INTR_EN(1)); + VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 1); spin_unlock_irqrestore(&vop->irq_lock, flags); } @@ -628,8 +480,7 @@ static void vop_dsp_hold_valid_irq_disable(struct vop *vop) spin_lock_irqsave(&vop->irq_lock, flags); - vop_mask_write(vop, INTR_CTRL0, DSP_HOLD_VALID_INTR_MASK, - DSP_HOLD_VALID_INTR_EN(0)); + VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 0); spin_unlock_irqrestore(&vop->irq_lock, flags); } @@ -637,35 +488,35 @@ static void vop_dsp_hold_valid_irq_disable(struct vop *vop) static void vop_enable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); - int ret; + int ret, i; if (vop->is_enabled) return; - ret = pm_runtime_get_sync(vop->dev); - if (ret < 0) { - dev_err(vop->dev, "failed to get pm runtime: %d\n", ret); - return; - } - - ret = clk_enable(vop->hclk); + ret = clk_prepare_enable(vop->hclk); if (ret < 0) { dev_err(vop->dev, "failed to enable hclk - %d\n", ret); return; } - ret = clk_enable(vop->dclk); + ret = clk_prepare_enable(vop->dclk); if (ret < 0) { dev_err(vop->dev, "failed to enable dclk - %d\n", ret); goto err_disable_hclk; } - ret = clk_enable(vop->aclk); + ret = clk_prepare_enable(vop->aclk); if (ret < 0) { dev_err(vop->dev, "failed to enable aclk - %d\n", ret); goto err_disable_dclk; } + ret = pm_runtime_get_sync(vop->dev); + if (ret < 0) { + dev_err(vop->dev, "failed to get pm runtime: %d\n", ret); + return; + } + /* * Slave iommu shares power, irq and clock with vop. It was associated * automatically with this master device via common driver code. @@ -678,7 +529,16 @@ static void vop_enable(struct drm_crtc *crtc) goto err_disable_aclk; } - memcpy(vop->regs, vop->regsbak, vop->len); + memcpy(vop->regsbak, vop->regs, vop->len); + + VOP_CTRL_SET(vop, global_regdone_en, 1); + + for (i = 0; i < vop->num_wins; i++) { + struct vop_win *win = &vop->win[i]; + + VOP_WIN_SET(vop, win, gate, 1); + } + /* * At here, vop clock & iommu is enable, R/W vop regs would be safe. */ @@ -692,26 +552,40 @@ static void vop_enable(struct drm_crtc *crtc) enable_irq(vop->irq); - drm_vblank_on(vop->drm_dev, vop->pipe); + drm_crtc_vblank_on(crtc); return; err_disable_aclk: - clk_disable(vop->aclk); + clk_disable_unprepare(vop->aclk); err_disable_dclk: - clk_disable(vop->dclk); + clk_disable_unprepare(vop->dclk); err_disable_hclk: - clk_disable(vop->hclk); + clk_disable_unprepare(vop->hclk); } -static void vop_disable(struct drm_crtc *crtc) +static void vop_crtc_disable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); + int i; if (!vop->is_enabled) return; - drm_vblank_off(crtc->dev, vop->pipe); + /* + * We need to make sure that all windows are disabled before we + * disable that crtc. Otherwise we might try to scan from a destroyed + * buffer later. + */ + for (i = 0; i < vop->num_wins; i++) { + struct vop_win *win = &vop->win[i]; + + spin_lock(&vop->reg_lock); + VOP_WIN_SET(vop, win, enable, 0); + spin_unlock(&vop->reg_lock); + } + + drm_crtc_vblank_off(crtc); /* * Vop standby will take effect at end of current frame, @@ -742,230 +616,223 @@ static void vop_disable(struct drm_crtc *crtc) */ rockchip_drm_dma_detach_device(vop->drm_dev, vop->dev); - clk_disable(vop->dclk); - clk_disable(vop->aclk); - clk_disable(vop->hclk); pm_runtime_put(vop->dev); + clk_disable_unprepare(vop->dclk); + clk_disable_unprepare(vop->aclk); + clk_disable_unprepare(vop->hclk); } -/* - * Caller must hold vsync_mutex. - */ -static struct drm_framebuffer *vop_win_last_pending_fb(struct vop_win *vop_win) +static void vop_plane_destroy(struct drm_plane *plane) { - struct vop_win_state *last; - struct vop_win_state *active = vop_win->active; - - if (list_empty(&vop_win->pending)) - return active ? active->fb : NULL; - - last = list_last_entry(&vop_win->pending, struct vop_win_state, head); - return last ? last->fb : NULL; + drm_plane_cleanup(plane); } -/* - * Caller must hold vsync_mutex. - */ -static int vop_win_queue_fb(struct vop_win *vop_win, - struct drm_framebuffer *fb, dma_addr_t yrgb_mst, - struct drm_pending_vblank_event *event) +static int vop_plane_prepare_fb(struct drm_plane *plane, + const struct drm_plane_state *new_state) { - struct vop_win_state *state; - - state = kzalloc(sizeof(*state), GFP_KERNEL); - if (!state) - return -ENOMEM; - - state->fb = fb; - state->yrgb_mst = yrgb_mst; - state->event = event; - - list_add_tail(&state->head, &vop_win->pending); + if (plane->state->fb) + drm_framebuffer_reference(plane->state->fb); return 0; } -static int vop_update_plane_event(struct drm_plane *plane, - struct drm_crtc *crtc, - struct drm_framebuffer *fb, int crtc_x, - int crtc_y, unsigned int crtc_w, - unsigned int crtc_h, uint32_t src_x, - uint32_t src_y, uint32_t src_w, - uint32_t src_h, - struct drm_pending_vblank_event *event) +static void vop_plane_cleanup_fb(struct drm_plane *plane, + const struct drm_plane_state *old_state) { - struct vop_win *vop_win = to_vop_win(plane); - const struct vop_win_data *win = vop_win->data; - struct vop *vop = to_vop(crtc); - struct drm_gem_object *obj; - struct rockchip_gem_object *rk_obj; - struct drm_gem_object *uv_obj; - struct rockchip_gem_object *rk_uv_obj; - unsigned long offset; - unsigned int actual_w; - unsigned int actual_h; - unsigned int dsp_stx; - unsigned int dsp_sty; - unsigned int y_vir_stride; - unsigned int uv_vir_stride = 0; - dma_addr_t yrgb_mst; - dma_addr_t uv_mst = 0; - enum vop_data_format format; - uint32_t val; - bool is_alpha; - bool rb_swap; - bool is_yuv; + if (old_state->fb) + drm_framebuffer_unreference(old_state->fb); +} + +static int vop_plane_atomic_check(struct drm_plane *plane, + struct drm_plane_state *state) +{ + struct drm_crtc *crtc = state->crtc; + struct drm_framebuffer *fb = state->fb; + struct vop_win *win = to_vop_win(plane); + struct vop_plane_state *vop_plane_state = to_vop_plane_state(state); + struct drm_crtc_state *crtc_state; bool visible; int ret; - struct drm_rect dest = { - .x1 = crtc_x, - .y1 = crtc_y, - .x2 = crtc_x + crtc_w, - .y2 = crtc_y + crtc_h, - }; - struct drm_rect src = { - /* 16.16 fixed point */ - .x1 = src_x, - .y1 = src_y, - .x2 = src_x + src_w, - .y2 = src_y + src_h, - }; - const struct drm_rect clip = { - .x2 = crtc->mode.hdisplay, - .y2 = crtc->mode.vdisplay, - }; - bool can_position = plane->type != DRM_PLANE_TYPE_PRIMARY; + struct drm_rect *dest = &vop_plane_state->dest; + struct drm_rect *src = &vop_plane_state->src; + struct drm_rect clip; int min_scale = win->phy->scl ? FRAC_16_16(1, 8) : DRM_PLANE_HELPER_NO_SCALING; int max_scale = win->phy->scl ? FRAC_16_16(8, 1) : DRM_PLANE_HELPER_NO_SCALING; - ret = drm_plane_helper_check_update(plane, crtc, fb, - &src, &dest, &clip, + crtc = crtc ? crtc : plane->state->crtc; + /* + * Both crtc or plane->state->crtc can be null. + */ + if (!crtc || !fb) + goto out_disable; + + crtc_state = drm_atomic_get_crtc_state(state->state, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + + src->x1 = state->src_x; + src->y1 = state->src_y; + src->x2 = state->src_x + state->src_w; + src->y2 = state->src_y + state->src_h; + dest->x1 = state->crtc_x; + dest->y1 = state->crtc_y; + dest->x2 = state->crtc_x + state->crtc_w; + dest->y2 = state->crtc_y + state->crtc_h; + + clip.x1 = 0; + clip.y1 = 0; + clip.x2 = crtc_state->mode.hdisplay; + clip.y2 = crtc_state->mode.vdisplay; + + ret = drm_plane_helper_check_update(plane, crtc, state->fb, + src, dest, &clip, min_scale, max_scale, - can_position, false, &visible); + true, true, &visible); if (ret) return ret; if (!visible) - return 0; - - is_alpha = is_alpha_support(fb->pixel_format); - rb_swap = has_rb_swapped(fb->pixel_format); - is_yuv = is_yuv_support(fb->pixel_format); + goto out_disable; - format = vop_convert_format(fb->pixel_format); - if (format < 0) - return format; + vop_plane_state->format = vop_convert_format(fb->pixel_format); + if (vop_plane_state->format < 0) + return vop_plane_state->format; - obj = rockchip_fb_get_gem_obj(fb, 0); - if (!obj) { - DRM_ERROR("fail to get rockchip gem object from framebuffer\n"); + /* + * Src.x1 can be odd when do clip, but yuv plane start point + * need align with 2 pixel. + */ + if (is_yuv_support(fb->pixel_format) && ((src->x1 >> 16) % 2)) return -EINVAL; - } - rk_obj = to_rockchip_obj(obj); + vop_plane_state->enable = true; - if (is_yuv) { - /* - * Src.x1 can be odd when do clip, but yuv plane start point - * need align with 2 pixel. - */ - val = (src.x1 >> 16) % 2; - src.x1 += val << 16; - src.x2 += val << 16; - } + return 0; - actual_w = (src.x2 - src.x1) >> 16; - actual_h = (src.y2 - src.y1) >> 16; +out_disable: + vop_plane_state->enable = false; + return 0; +} - dsp_stx = dest.x1 + crtc->mode.htotal - crtc->mode.hsync_start; - dsp_sty = dest.y1 + crtc->mode.vtotal - crtc->mode.vsync_start; +static void vop_plane_atomic_disable(struct drm_plane *plane, + struct drm_plane_state *old_state) +{ + struct vop_plane_state *vop_plane_state = to_vop_plane_state(old_state); + struct vop_win *win = to_vop_win(plane); + struct vop *vop = to_vop(old_state->crtc); - offset = (src.x1 >> 16) * drm_format_plane_cpp(fb->pixel_format, 0); - offset += (src.y1 >> 16) * fb->pitches[0]; + if (!old_state->crtc) + return; - yrgb_mst = rk_obj->dma_addr + offset + fb->offsets[0]; - y_vir_stride = fb->pitches[0] >> 2; + spin_lock(&vop->reg_lock); - if (is_yuv) { - int hsub = drm_format_horz_chroma_subsampling(fb->pixel_format); - int vsub = drm_format_vert_chroma_subsampling(fb->pixel_format); - int bpp = drm_format_plane_cpp(fb->pixel_format, 1); + VOP_WIN_SET(vop, win, enable, 0); - uv_obj = rockchip_fb_get_gem_obj(fb, 1); - if (!uv_obj) { - DRM_ERROR("fail to get uv object from framebuffer\n"); - return -EINVAL; - } - rk_uv_obj = to_rockchip_obj(uv_obj); - uv_vir_stride = fb->pitches[1] >> 2; + spin_unlock(&vop->reg_lock); - offset = (src.x1 >> 16) * bpp / hsub; - offset += (src.y1 >> 16) * fb->pitches[1] / vsub; + vop_plane_state->enable = false; +} - uv_mst = rk_uv_obj->dma_addr + offset + fb->offsets[1]; - } +static void vop_plane_atomic_update(struct drm_plane *plane, + struct drm_plane_state *old_state) +{ + struct drm_plane_state *state = plane->state; + struct drm_crtc *crtc = state->crtc; + struct vop_win *win = to_vop_win(plane); + struct vop_plane_state *vop_plane_state = to_vop_plane_state(state); + struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state); + struct vop *vop = to_vop(state->crtc); + struct drm_framebuffer *fb = state->fb; + unsigned int actual_w, actual_h; + unsigned int dsp_stx, dsp_sty; + uint32_t act_info, dsp_info, dsp_st; + struct drm_rect *src = &vop_plane_state->src; + struct drm_rect *dest = &vop_plane_state->dest; + struct drm_gem_object *obj, *uv_obj; + struct rockchip_gem_object *rk_obj, *rk_uv_obj; + unsigned long offset; + dma_addr_t dma_addr; + int ymirror, xmirror; + uint32_t val; + bool rb_swap; /* - * If this plane update changes the plane's framebuffer, (or more - * precisely, if this update has a different framebuffer than the last - * update), enqueue it so we can track when it completes. - * - * Only when we discover that this update has completed, can we - * unreference any previous framebuffers. + * can't update plane when vop is disabled. */ - mutex_lock(&vop->vsync_mutex); - if (fb != vop_win_last_pending_fb(vop_win)) { - ret = drm_vblank_get(plane->dev, vop->pipe); - if (ret) { - DRM_ERROR("failed to get vblank, %d\n", ret); - mutex_unlock(&vop->vsync_mutex); - return ret; - } - - drm_framebuffer_reference(fb); + if (!crtc) + return; - ret = vop_win_queue_fb(vop_win, fb, yrgb_mst, event); - if (ret) { - drm_vblank_put(plane->dev, vop->pipe); - mutex_unlock(&vop->vsync_mutex); - return ret; - } + if (WARN_ON(!vop->is_enabled)) + return; - vop->vsync_work_pending = true; + if (!vop_plane_state->enable) { + vop_plane_atomic_disable(plane, old_state); + return; } - mutex_unlock(&vop->vsync_mutex); + + obj = rockchip_fb_get_gem_obj(fb, 0); + rk_obj = to_rockchip_obj(obj); + + actual_w = drm_rect_width(src) >> 16; + actual_h = drm_rect_height(src) >> 16; + act_info = (actual_h - 1) << 16 | ((actual_w - 1) & 0xffff); + + dsp_info = (drm_rect_height(dest) - 1) << 16; + dsp_info |= (drm_rect_width(dest) - 1) & 0xffff; + + dsp_stx = dest->x1 + crtc->mode.htotal - crtc->mode.hsync_start; + dsp_sty = dest->y1 + crtc->mode.vtotal - crtc->mode.vsync_start; + dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff); + + offset = (src->x1 >> 16) * drm_format_plane_cpp(fb->pixel_format, 0); + if (state->rotation & BIT(DRM_REFLECT_Y)) + offset += ((src->y2 >> 16) - 1) * fb->pitches[0]; + else + offset += (src->y1 >> 16) * fb->pitches[0]; + vop_plane_state->yrgb_mst = rk_obj->dma_addr + offset + fb->offsets[0]; + + ymirror = !!(state->rotation & BIT(DRM_REFLECT_Y)); + xmirror = !!(state->rotation & BIT(DRM_REFLECT_X)); spin_lock(&vop->reg_lock); - VOP_WIN_SET(vop, win, format, format); - VOP_WIN_SET(vop, win, yrgb_vir, y_vir_stride); - VOP_WIN_SET(vop, win, yrgb_mst, yrgb_mst); - if (is_yuv) { - VOP_WIN_SET(vop, win, uv_vir, uv_vir_stride); - VOP_WIN_SET(vop, win, uv_mst, uv_mst); + VOP_WIN_SET(vop, win, xmirror, xmirror); + VOP_WIN_SET(vop, win, ymirror, ymirror); + VOP_WIN_SET(vop, win, format, vop_plane_state->format); + VOP_WIN_SET(vop, win, yrgb_vir, fb->pitches[0] >> 2); + VOP_WIN_SET(vop, win, yrgb_mst, vop_plane_state->yrgb_mst); + if (is_yuv_support(fb->pixel_format)) { + int hsub = drm_format_horz_chroma_subsampling(fb->pixel_format); + int vsub = drm_format_vert_chroma_subsampling(fb->pixel_format); + int bpp = drm_format_plane_cpp(fb->pixel_format, 1); + + uv_obj = rockchip_fb_get_gem_obj(fb, 1); + rk_uv_obj = to_rockchip_obj(uv_obj); + + offset = (src->x1 >> 16) * bpp / hsub; + offset += (src->y1 >> 16) * fb->pitches[1] / vsub; + + dma_addr = rk_uv_obj->dma_addr + offset + fb->offsets[1]; + VOP_WIN_SET(vop, win, uv_vir, fb->pitches[1] >> 2); + VOP_WIN_SET(vop, win, uv_mst, dma_addr); } - if (win->phy->scl) - scl_vop_cal_scl_fac(vop, win, actual_w, actual_h, - dest.x2 - dest.x1, dest.y2 - dest.y1, - fb->pixel_format); - - val = (actual_h - 1) << 16; - val |= (actual_w - 1) & 0xffff; - VOP_WIN_SET(vop, win, act_info, val); - - val = (dest.y2 - dest.y1 - 1) << 16; - val |= (dest.x2 - dest.x1 - 1) & 0xffff; - VOP_WIN_SET(vop, win, dsp_info, val); - val = dsp_sty << 16; - val |= dsp_stx & 0xffff; - VOP_WIN_SET(vop, win, dsp_st, val); + scl_vop_cal_scl_fac(vop, win, actual_w, actual_h, + drm_rect_width(dest), drm_rect_height(dest), + fb->pixel_format); + + VOP_WIN_SET(vop, win, act_info, act_info); + VOP_WIN_SET(vop, win, dsp_info, dsp_info); + VOP_WIN_SET(vop, win, dsp_st, dsp_st); + + rb_swap = has_rb_swapped(fb->pixel_format); VOP_WIN_SET(vop, win, rb_swap, rb_swap); - if (is_alpha) { + if (is_alpha_support(fb->pixel_format) && + (s->dsp_layer_sel & 0x3) != win->win_id) { VOP_WIN_SET(vop, win, dst_alpha_ctl, DST_FACTOR_M0(ALPHA_SRC_INVERSE)); val = SRC_ALPHA_EN(1) | SRC_COLOR_M0(ALPHA_SRC_PRE_MUL) | @@ -974,117 +841,141 @@ static int vop_update_plane_event(struct drm_plane *plane, SRC_ALPHA_CAL_M0(ALPHA_NO_SATURATION) | SRC_FACTOR_M0(ALPHA_ONE); VOP_WIN_SET(vop, win, src_alpha_ctl, val); + VOP_WIN_SET(vop, win, alpha_mode, 1); + VOP_WIN_SET(vop, win, alpha_en, 1); } else { VOP_WIN_SET(vop, win, src_alpha_ctl, SRC_ALPHA_EN(0)); + VOP_WIN_SET(vop, win, alpha_en, 0); } VOP_WIN_SET(vop, win, enable, 1); - - vop_cfg_done(vop); spin_unlock(&vop->reg_lock); - - return 0; } -static int vop_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, - struct drm_framebuffer *fb, int crtc_x, int crtc_y, - unsigned int crtc_w, unsigned int crtc_h, - uint32_t src_x, uint32_t src_y, uint32_t src_w, - uint32_t src_h) +static const struct drm_plane_helper_funcs plane_helper_funcs = { + .prepare_fb = vop_plane_prepare_fb, + .cleanup_fb = vop_plane_cleanup_fb, + .atomic_check = vop_plane_atomic_check, + .atomic_update = vop_plane_atomic_update, + .atomic_disable = vop_plane_atomic_disable, +}; + +void vop_atomic_plane_reset(struct drm_plane *plane) { - return vop_update_plane_event(plane, crtc, fb, crtc_x, crtc_y, crtc_w, - crtc_h, src_x, src_y, src_w, src_h, - NULL); + struct vop_win *win = to_vop_win(plane); + struct vop_plane_state *vop_plane_state = + to_vop_plane_state(plane->state); + + if (plane->state && plane->state->fb) + drm_framebuffer_unreference(plane->state->fb); + + kfree(vop_plane_state); + vop_plane_state = kzalloc(sizeof(*vop_plane_state), GFP_KERNEL); + if (!vop_plane_state) + return; + + vop_plane_state->zpos = win->win_id; + plane->state = &vop_plane_state->base; + plane->state->plane = plane; } -static int vop_update_primary_plane(struct drm_crtc *crtc, - struct drm_pending_vblank_event *event) +struct drm_plane_state * +vop_atomic_plane_duplicate_state(struct drm_plane *plane) { - unsigned int crtc_w, crtc_h; + struct vop_plane_state *old_vop_plane_state; + struct vop_plane_state *vop_plane_state; + + if (WARN_ON(!plane->state)) + return NULL; + + old_vop_plane_state = to_vop_plane_state(plane->state); + vop_plane_state = kmemdup(old_vop_plane_state, + sizeof(*vop_plane_state), GFP_KERNEL); + if (!vop_plane_state) + return NULL; - crtc_w = crtc->primary->fb->width - crtc->x; - crtc_h = crtc->primary->fb->height - crtc->y; + __drm_atomic_helper_plane_duplicate_state(plane, + &vop_plane_state->base); - return vop_update_plane_event(crtc->primary, crtc, crtc->primary->fb, - 0, 0, crtc_w, crtc_h, crtc->x << 16, - crtc->y << 16, crtc_w << 16, - crtc_h << 16, event); + return &vop_plane_state->base; } -static int vop_disable_plane(struct drm_plane *plane) +static void vop_atomic_plane_destroy_state(struct drm_plane *plane, + struct drm_plane_state *state) { - struct vop_win *vop_win = to_vop_win(plane); - const struct vop_win_data *win = vop_win->data; - struct vop *vop; - int ret; - - if (!plane->crtc) - return 0; + struct vop_plane_state *vop_state = to_vop_plane_state(state); - vop = to_vop(plane->crtc); + __drm_atomic_helper_plane_destroy_state(plane, state); - ret = drm_vblank_get(plane->dev, vop->pipe); - if (ret) { - DRM_ERROR("failed to get vblank, %d\n", ret); - return ret; - } + kfree(vop_state); +} - mutex_lock(&vop->vsync_mutex); +static int vop_atomic_plane_set_property(struct drm_plane *plane, + struct drm_plane_state *state, + struct drm_property *property, + uint64_t val) +{ + struct vop_win *win = to_vop_win(plane); + struct vop_plane_state *plane_state = to_vop_plane_state(state); - ret = vop_win_queue_fb(vop_win, NULL, 0, NULL); - if (ret) { - drm_vblank_put(plane->dev, vop->pipe); - mutex_unlock(&vop->vsync_mutex); - return ret; + if (property == win->vop->plane_zpos_prop) { + plane_state->zpos = val; + return 0; } - vop->vsync_work_pending = true; - mutex_unlock(&vop->vsync_mutex); - - spin_lock(&vop->reg_lock); - VOP_WIN_SET(vop, win, enable, 0); - vop_cfg_done(vop); - spin_unlock(&vop->reg_lock); + if (property == win->rotation_prop) { + state->rotation = val; + return 0; + } - return 0; + DRM_ERROR("failed to set vop plane property\n"); + return -EINVAL; } -static void vop_plane_destroy(struct drm_plane *plane) +static int vop_atomic_plane_get_property(struct drm_plane *plane, + const struct drm_plane_state *state, + struct drm_property *property, + uint64_t *val) { - vop_disable_plane(plane); - drm_plane_cleanup(plane); + struct vop_win *win = to_vop_win(plane); + struct vop_plane_state *plane_state = to_vop_plane_state(state); + + if (property == win->vop->plane_zpos_prop) { + *val = plane_state->zpos; + return 0; + } + + if (property == win->rotation_prop) { + *val = state->rotation; + return 0; + } + + DRM_ERROR("failed to get vop plane property\n"); + return -EINVAL; } static const struct drm_plane_funcs vop_plane_funcs = { - .update_plane = vop_update_plane, - .disable_plane = vop_disable_plane, + .update_plane = drm_atomic_helper_update_plane, + .disable_plane = drm_atomic_helper_disable_plane, .destroy = vop_plane_destroy, + .reset = vop_atomic_plane_reset, + .atomic_duplicate_state = vop_atomic_plane_duplicate_state, + .atomic_destroy_state = vop_atomic_plane_destroy_state, + .atomic_set_property = vop_atomic_plane_set_property, + .atomic_get_property = vop_atomic_plane_get_property, }; -int rockchip_drm_crtc_mode_config(struct drm_crtc *crtc, - int connector_type, - int out_mode) -{ - struct vop *vop = to_vop(crtc); - - vop->connector_type = connector_type; - vop->connector_out_mode = out_mode; - - return 0; -} -EXPORT_SYMBOL_GPL(rockchip_drm_crtc_mode_config); - static int vop_crtc_enable_vblank(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); unsigned long flags; - if (!vop->is_enabled) + if (WARN_ON(!vop->is_enabled)) return -EPERM; spin_lock_irqsave(&vop->irq_lock, flags); - vop_mask_write(vop, INTR_CTRL0, FS_INTR_MASK, FS_INTR_EN(1)); + VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 1); spin_unlock_irqrestore(&vop->irq_lock, flags); @@ -1096,76 +987,68 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc) struct vop *vop = to_vop(crtc); unsigned long flags; - if (!vop->is_enabled) + if (WARN_ON(!vop->is_enabled)) return; spin_lock_irqsave(&vop->irq_lock, flags); - vop_mask_write(vop, INTR_CTRL0, FS_INTR_MASK, FS_INTR_EN(0)); + + VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 0); + spin_unlock_irqrestore(&vop->irq_lock, flags); } -static const struct rockchip_crtc_funcs private_crtc_funcs = { - .enable_vblank = vop_crtc_enable_vblank, - .disable_vblank = vop_crtc_disable_vblank, -}; - -static void vop_crtc_dpms(struct drm_crtc *crtc, int mode) +static void vop_crtc_wait_for_update(struct drm_crtc *crtc) { - DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode); + struct vop *vop = to_vop(crtc); - switch (mode) { - case DRM_MODE_DPMS_ON: - vop_enable(crtc); - break; - case DRM_MODE_DPMS_STANDBY: - case DRM_MODE_DPMS_SUSPEND: - case DRM_MODE_DPMS_OFF: - vop_disable(crtc); - break; - default: - DRM_DEBUG_KMS("unspecified mode %d\n", mode); - break; - } + reinit_completion(&vop->wait_update_complete); + WARN_ON(!wait_for_completion_timeout(&vop->wait_update_complete, 100)); } -static void vop_crtc_prepare(struct drm_crtc *crtc) +static void vop_crtc_cancel_pending_vblank(struct drm_crtc *crtc, + struct drm_file *file_priv) { - vop_crtc_dpms(crtc, DRM_MODE_DPMS_ON); + struct drm_device *drm = crtc->dev; + struct vop *vop = to_vop(crtc); + struct drm_pending_vblank_event *e; + unsigned long flags; + + spin_lock_irqsave(&drm->event_lock, flags); + e = vop->event; + if (e && e->base.file_priv == file_priv) { + vop->event = NULL; + + e->base.destroy(&e->base); + file_priv->event_space += sizeof(e->event); + } + spin_unlock_irqrestore(&drm->event_lock, flags); } +static const struct rockchip_crtc_funcs private_crtc_funcs = { + .enable_vblank = vop_crtc_enable_vblank, + .disable_vblank = vop_crtc_disable_vblank, + .wait_for_update = vop_crtc_wait_for_update, + .cancel_pending_vblank = vop_crtc_cancel_pending_vblank, +}; + static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { - if (adjusted_mode->htotal == 0 || adjusted_mode->vtotal == 0) - return false; - - return true; -} - -static int vop_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, - struct drm_framebuffer *old_fb) -{ - int ret; + struct vop *vop = to_vop(crtc); - crtc->x = x; - crtc->y = y; + adjusted_mode->clock = + clk_round_rate(vop->dclk, mode->clock * 1000) / 1000; - ret = vop_update_primary_plane(crtc, NULL); - if (ret < 0) { - DRM_ERROR("fail to update plane\n"); - return ret; - } - - return 0; + return true; } -static int vop_crtc_mode_set(struct drm_crtc *crtc, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode, - int x, int y, struct drm_framebuffer *fb) +static void vop_crtc_enable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); + const struct vop_data *vop_data = vop->data; + struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state); + struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode; u16 hsync_len = adjusted_mode->hsync_end - adjusted_mode->hsync_start; u16 hdisplay = adjusted_mode->hdisplay; u16 htotal = adjusted_mode->htotal; @@ -1176,37 +1059,75 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc, u16 vsync_len = adjusted_mode->vsync_end - adjusted_mode->vsync_start; u16 vact_st = adjusted_mode->vtotal - adjusted_mode->vsync_start; u16 vact_end = vact_st + vdisplay; - int ret, ret_clk; uint32_t val; + vop_enable(crtc); /* - * disable dclk to stop frame scan, so that we can safe config mode and - * enable iommu. + * If dclk rate is zero, mean that scanout is stop, + * we don't need wait any more. */ - clk_disable(vop->dclk); + if (clk_get_rate(vop->dclk)) { + /* + * Rk3288 vop timing register is immediately, when configure + * display timing on display time, may cause tearing. + * + * Vop standby will take effect at end of current frame, + * if dsp hold valid irq happen, it means standby complete. + * + * mode set: + * standby and wait complete --> |---- + * | display time + * |---- + * |---> dsp hold irq + * configure display timing --> | + * standby exit | + * | new frame start. + */ + + reinit_completion(&vop->dsp_hold_completion); + vop_dsp_hold_valid_irq_enable(vop); - switch (vop->connector_type) { + spin_lock(&vop->reg_lock); + + VOP_CTRL_SET(vop, standby, 1); + + spin_unlock(&vop->reg_lock); + + wait_for_completion(&vop->dsp_hold_completion); + + vop_dsp_hold_valid_irq_disable(vop); + } + + val = 0x8; + val |= (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1; + val |= (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1); + VOP_CTRL_SET(vop, pin_pol, val); + switch (s->output_type) { case DRM_MODE_CONNECTOR_LVDS: VOP_CTRL_SET(vop, rgb_en, 1); + VOP_CTRL_SET(vop, rgb_pin_pol, val); break; case DRM_MODE_CONNECTOR_eDP: VOP_CTRL_SET(vop, edp_en, 1); + VOP_CTRL_SET(vop, edp_pin_pol, val); break; case DRM_MODE_CONNECTOR_HDMIA: VOP_CTRL_SET(vop, hdmi_en, 1); + VOP_CTRL_SET(vop, hdmi_pin_pol, val); + break; + case DRM_MODE_CONNECTOR_DSI: + VOP_CTRL_SET(vop, mipi_en, 1); + VOP_CTRL_SET(vop, mipi_pin_pol, val); break; default: - DRM_ERROR("unsupport connector_type[%d]\n", - vop->connector_type); - ret = -EINVAL; - goto out; - }; - VOP_CTRL_SET(vop, out_mode, vop->connector_out_mode); + DRM_ERROR("unsupport connector_type[%d]\n", s->output_type); + } - val = 0x8; - val |= (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1; - val |= (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1); - VOP_CTRL_SET(vop, pin_pol, val); + if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && + !(vop_data->feature & VOP_FEATURE_OUTPUT_10BIT)) + s->output_mode = ROCKCHIP_OUT_MODE_P888; + + VOP_CTRL_SET(vop, out_mode, s->output_mode); VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len); val = hact_st << 16; @@ -1220,211 +1141,223 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc, VOP_CTRL_SET(vop, vact_st_end, val); VOP_CTRL_SET(vop, vpost_st_end, val); - ret = vop_crtc_mode_set_base(crtc, x, y, fb); - if (ret) - goto out; - - /* - * reset dclk, take all mode config affect, so the clk would run in - * correct frame. - */ - reset_control_assert(vop->dclk_rst); - usleep_range(10, 20); - reset_control_deassert(vop->dclk_rst); - clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); -out: - ret_clk = clk_enable(vop->dclk); - if (ret_clk < 0) { - dev_err(vop->dev, "failed to enable dclk - %d\n", ret_clk); - return ret_clk; - } - return ret; + VOP_CTRL_SET(vop, standby, 0); } -static void vop_crtc_commit(struct drm_crtc *crtc) +static int vop_zpos_cmp(const void *a, const void *b) { -} + struct vop_zpos *pa = (struct vop_zpos *)a; + struct vop_zpos *pb = (struct vop_zpos *)b; -static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = { - .dpms = vop_crtc_dpms, - .prepare = vop_crtc_prepare, - .mode_fixup = vop_crtc_mode_fixup, - .mode_set = vop_crtc_mode_set, - .mode_set_base = vop_crtc_mode_set_base, - .commit = vop_crtc_commit, -}; + return pa->zpos - pb->zpos; +} -static int vop_crtc_page_flip(struct drm_crtc *crtc, - struct drm_framebuffer *fb, - struct drm_pending_vblank_event *event, - uint32_t page_flip_flags) +static int vop_crtc_atomic_check(struct drm_crtc *crtc, + struct drm_crtc_state *crtc_state) { + struct drm_atomic_state *state = crtc_state->state; + struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state); struct vop *vop = to_vop(crtc); - struct drm_framebuffer *old_fb = crtc->primary->fb; - int ret; + const struct vop_data *vop_data = vop->data; + struct drm_plane *plane; + struct drm_plane_state *pstate; + struct vop_plane_state *plane_state; + struct vop_zpos *pzpos; + int dsp_layer_sel = 0; + int i, j, cnt = 0, ret = 0; + + pzpos = kmalloc_array(vop_data->win_size, sizeof(*pzpos), GFP_KERNEL); + if (!pzpos) + return -ENOMEM; - /* when the page flip is requested, crtc should be on */ - if (!vop->is_enabled) { - DRM_DEBUG("page flip request rejected because crtc is off.\n"); - return 0; - } + for (i = 0; i < vop_data->win_size; i++) { + const struct vop_win_data *win_data = &vop_data->win[i]; + struct vop_win *win; - crtc->primary->fb = fb; + if (!win_data->phy) + continue; - ret = vop_update_primary_plane(crtc, event); - if (ret) - crtc->primary->fb = old_fb; + for (j = 0; j < vop->num_wins; j++) { + win = &vop->win[j]; - return ret; -} + if (win->win_id == i && !win->area_id) + break; + } + if (WARN_ON(j >= vop->num_wins)) { + ret = -EINVAL; + goto err_free_pzpos; + } -static void vop_win_state_complete(struct vop_win *vop_win, - struct vop_win_state *state) -{ - struct vop *vop = vop_win->vop; - struct drm_crtc *crtc = &vop->crtc; - struct drm_device *drm = crtc->dev; - unsigned long flags; + plane = &win->base; + pstate = state->plane_states[drm_plane_index(plane)]; + /* + * plane might not have changed, in which case take + * current state: + */ + if (!pstate) + pstate = plane->state; + plane_state = to_vop_plane_state(pstate); + pzpos[cnt].zpos = plane_state->zpos; + pzpos[cnt++].win_id = win->win_id; + } - if (state->event) { - spin_lock_irqsave(&drm->event_lock, flags); - drm_crtc_send_vblank_event(crtc, state->event); - spin_unlock_irqrestore(&drm->event_lock, flags); + sort(pzpos, cnt, sizeof(pzpos[0]), vop_zpos_cmp, NULL); + + for (i = 0, cnt = 0; i < vop_data->win_size; i++) { + const struct vop_win_data *win_data = &vop_data->win[i]; + int shift = i * 2; + + if (win_data->phy) { + struct vop_zpos *zpos = &pzpos[cnt++]; + + dsp_layer_sel |= zpos->win_id << shift; + } else { + dsp_layer_sel |= i << shift; + } } - list_del(&state->head); - drm_vblank_put(crtc->dev, vop->pipe); + s->dsp_layer_sel = dsp_layer_sel; + +err_free_pzpos: + kfree(pzpos); + return ret; } -static void vop_crtc_destroy(struct drm_crtc *crtc) +static void vop_crtc_atomic_flush(struct drm_crtc *crtc, + struct drm_crtc_state *old_crtc_state) { - drm_crtc_cleanup(crtc); -} + struct rockchip_crtc_state *s = + to_rockchip_crtc_state(crtc->state); + struct vop *vop = to_vop(crtc); -static const struct drm_crtc_funcs vop_crtc_funcs = { - .set_config = drm_crtc_helper_set_config, - .page_flip = vop_crtc_page_flip, - .destroy = vop_crtc_destroy, -}; + if (WARN_ON(!vop->is_enabled)) + return; -static bool vop_win_state_is_active(struct vop_win *vop_win, - struct vop_win_state *state) -{ - bool active = false; + spin_lock(&vop->reg_lock); - if (state->fb) { - dma_addr_t yrgb_mst; + VOP_CTRL_SET(vop, dsp_layer_sel, s->dsp_layer_sel); + vop_cfg_done(vop); - /* check yrgb_mst to tell if pending_fb is now front */ - yrgb_mst = VOP_WIN_GET_YRGBADDR(vop_win->vop, vop_win->data); + spin_unlock(&vop->reg_lock); +} - active = (yrgb_mst == state->yrgb_mst); - } else { - bool enabled; +static void vop_crtc_atomic_begin(struct drm_crtc *crtc, + struct drm_crtc_state *old_crtc_state) +{ + struct vop *vop = to_vop(crtc); - /* if enable bit is clear, plane is now disabled */ - enabled = VOP_WIN_GET(vop_win->vop, vop_win->data, enable); + if (crtc->state->event) { + WARN_ON(drm_crtc_vblank_get(crtc) != 0); - active = (enabled == 0); + vop->event = crtc->state->event; + crtc->state->event = NULL; } +} - return active; +static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = { + .enable = vop_crtc_enable, + .disable = vop_crtc_disable, + .mode_fixup = vop_crtc_mode_fixup, + .atomic_check = vop_crtc_atomic_check, + .atomic_flush = vop_crtc_atomic_flush, + .atomic_begin = vop_crtc_atomic_begin, +}; + +static void vop_crtc_destroy(struct drm_crtc *crtc) +{ + drm_crtc_cleanup(crtc); } -static void vop_win_state_destroy(struct vop_win_state *state) +static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc) { - struct drm_framebuffer *fb = state->fb; + struct rockchip_crtc_state *rockchip_state; - if (fb) - drm_framebuffer_unreference(fb); + rockchip_state = kzalloc(sizeof(*rockchip_state), GFP_KERNEL); + if (!rockchip_state) + return NULL; - kfree(state); + __drm_atomic_helper_crtc_duplicate_state(crtc, &rockchip_state->base); + return &rockchip_state->base; } -static void vop_win_update_state(struct vop_win *vop_win) +static void vop_crtc_destroy_state(struct drm_crtc *crtc, + struct drm_crtc_state *state) { - struct vop_win_state *state, *n, *new_active = NULL; + struct rockchip_crtc_state *s = to_rockchip_crtc_state(state); - /* Check if any pending states are now active */ - list_for_each_entry(state, &vop_win->pending, head) - if (vop_win_state_is_active(vop_win, state)) { - new_active = state; - break; - } + __drm_atomic_helper_crtc_destroy_state(crtc, &s->base); + kfree(s); +} - if (!new_active) - return; +static const struct drm_crtc_funcs vop_crtc_funcs = { + .set_config = drm_atomic_helper_set_config, + .page_flip = drm_atomic_helper_page_flip, + .destroy = vop_crtc_destroy, + .reset = drm_atomic_helper_crtc_reset, + .atomic_duplicate_state = vop_crtc_duplicate_state, + .atomic_destroy_state = vop_crtc_destroy_state, +}; - /* - * Destroy any 'skipped' pending states - states that were queued - * before the newly active state. - */ - list_for_each_entry_safe(state, n, &vop_win->pending, head) { - if (state == new_active) - break; - vop_win_state_complete(vop_win, state); - vop_win_state_destroy(state); - } +static bool vop_win_pending_is_complete(struct vop_win *vop_win) +{ + struct drm_plane *plane = &vop_win->base; + struct vop_plane_state *state = to_vop_plane_state(plane->state); + dma_addr_t yrgb_mst; - vop_win_state_complete(vop_win, new_active); + if (!state->enable) + return VOP_WIN_GET(vop_win->vop, vop_win, enable) == 0; - if (vop_win->active) - vop_win_state_destroy(vop_win->active); - vop_win->active = new_active; -} + yrgb_mst = VOP_WIN_GET_YRGBADDR(vop_win->vop, vop_win); -static bool vop_win_has_pending_state(struct vop_win *vop_win) -{ - return !list_empty(&vop_win->pending); + return yrgb_mst == state->yrgb_mst; } -static irqreturn_t vop_isr_thread(int irq, void *data) +static void vop_handle_vblank(struct vop *vop) { - struct vop *vop = data; - const struct vop_data *vop_data = vop->data; - unsigned int i; - - mutex_lock(&vop->vsync_mutex); + struct drm_device *drm = vop->drm_dev; + struct drm_crtc *crtc = &vop->crtc; + unsigned long flags; + int i; - if (!vop->vsync_work_pending) - goto done; + for (i = 0; i < vop->num_wins; i++) { + if (!vop_win_pending_is_complete(&vop->win[i])) + return; + } - vop->vsync_work_pending = false; + if (vop->event) { + spin_lock_irqsave(&drm->event_lock, flags); - for (i = 0; i < vop_data->win_size; i++) { - struct vop_win *vop_win = &vop->win[i]; + drm_crtc_send_vblank_event(crtc, vop->event); + drm_crtc_vblank_put(crtc); + vop->event = NULL; - vop_win_update_state(vop_win); - if (vop_win_has_pending_state(vop_win)) - vop->vsync_work_pending = true; + spin_unlock_irqrestore(&drm->event_lock, flags); } - -done: - mutex_unlock(&vop->vsync_mutex); - - return IRQ_HANDLED; + if (!completion_done(&vop->wait_update_complete)) + complete(&vop->wait_update_complete); } static irqreturn_t vop_isr(int irq, void *data) { struct vop *vop = data; - uint32_t intr0_reg, active_irqs; + struct drm_crtc *crtc = &vop->crtc; + uint32_t active_irqs; unsigned long flags; int ret = IRQ_NONE; /* - * INTR_CTRL0 register has interrupt status, enable and clear bits, we + * interrupt register has interrupt status, enable and clear bits, we * must hold irq_lock to avoid a race with enable/disable_vblank(). */ spin_lock_irqsave(&vop->irq_lock, flags); - intr0_reg = vop_readl(vop, INTR_CTRL0); - active_irqs = intr0_reg & INTR_MASK; + + active_irqs = VOP_INTR_GET_TYPE(vop, status, INTR_MASK); /* Clear all active interrupt sources */ if (active_irqs) - vop_writel(vop, INTR_CTRL0, - intr0_reg | (active_irqs << INTR_CLR_SHIFT)); + VOP_INTR_SET_TYPE(vop, clear, active_irqs, 1); + spin_unlock_irqrestore(&vop->irq_lock, flags); /* This is expected for vop iommu irqs, since the irq is shared */ @@ -1438,9 +1371,10 @@ static irqreturn_t vop_isr(int irq, void *data) } if (active_irqs & FS_INTR) { - drm_handle_vblank(vop->drm_dev, vop->pipe); + drm_crtc_handle_vblank(crtc); + vop_handle_vblank(vop); active_irqs &= ~FS_INTR; - ret = (vop->vsync_work_pending) ? IRQ_WAKE_THREAD : IRQ_HANDLED; + ret = IRQ_HANDLED; } /* Unhandled irqs are spurious. */ @@ -1450,12 +1384,55 @@ static irqreturn_t vop_isr(int irq, void *data) return ret; } +static int vop_plane_init(struct vop *vop, struct vop_win *win, + unsigned long possible_crtcs) +{ + struct drm_plane *share = NULL; + unsigned int rotations = 0; + struct drm_property *prop; + int ret; + + if (win->parent) + share = &win->parent->base; + + ret = drm_share_plane_init(vop->drm_dev, &win->base, share, + possible_crtcs, &vop_plane_funcs, + win->data_formats, win->nformats, win->type); + if (ret) { + DRM_ERROR("failed to initialize plane\n"); + return ret; + } + drm_plane_helper_add(&win->base, &plane_helper_funcs); + drm_object_attach_property(&win->base.base, + vop->plane_zpos_prop, win->win_id); + + if (VOP_WIN_SUPPORT(vop, win, xmirror)) + rotations |= BIT(DRM_REFLECT_X); + + if (VOP_WIN_SUPPORT(vop, win, ymirror)) + rotations |= BIT(DRM_REFLECT_Y); + + if (rotations) { + rotations |= BIT(DRM_ROTATE_0); + prop = drm_mode_create_rotation_property(vop->drm_dev, + rotations); + if (!prop) { + DRM_ERROR("failed to create zpos property\n"); + return -EINVAL; + } + drm_object_attach_property(&win->base.base, prop, + BIT(DRM_ROTATE_0)); + win->rotation_prop = prop; + } + + return 0; +} + static int vop_create_crtc(struct vop *vop) { - const struct vop_data *vop_data = vop->data; struct device *dev = vop->dev; struct drm_device *drm_dev = vop->drm_dev; - struct drm_plane *primary = NULL, *cursor = NULL, *plane; + struct drm_plane *primary = NULL, *cursor = NULL, *plane, *tmp; struct drm_crtc *crtc = &vop->crtc; struct device_node *port; int ret; @@ -1466,35 +1443,29 @@ static int vop_create_crtc(struct vop *vop) * to pass them to drm_crtc_init_with_planes, which sets the * "possible_crtcs" to the newly initialized crtc. */ - for (i = 0; i < vop_data->win_size; i++) { - struct vop_win *vop_win = &vop->win[i]; - const struct vop_win_data *win_data = vop_win->data; + for (i = 0; i < vop->num_wins; i++) { + struct vop_win *win = &vop->win[i]; - if (win_data->type != DRM_PLANE_TYPE_PRIMARY && - win_data->type != DRM_PLANE_TYPE_CURSOR) + if (win->type != DRM_PLANE_TYPE_PRIMARY && + win->type != DRM_PLANE_TYPE_CURSOR) continue; - ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, - 0, &vop_plane_funcs, - win_data->phy->data_formats, - win_data->phy->nformats, - win_data->type); - if (ret) { - DRM_ERROR("failed to initialize plane\n"); + ret = vop_plane_init(vop, win, 0); + if (ret) goto err_cleanup_planes; - } - plane = &vop_win->base; + plane = &win->base; if (plane->type == DRM_PLANE_TYPE_PRIMARY) primary = plane; else if (plane->type == DRM_PLANE_TYPE_CURSOR) cursor = plane; + } ret = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor, - &vop_crtc_funcs); + &vop_crtc_funcs, NULL); if (ret) - return ret; + goto err_cleanup_planes; drm_crtc_helper_add(crtc, &vop_crtc_helper_funcs); @@ -1502,44 +1473,38 @@ static int vop_create_crtc(struct vop *vop) * Create drm_planes for overlay windows with possible_crtcs restricted * to the newly created crtc. */ - for (i = 0; i < vop_data->win_size; i++) { - struct vop_win *vop_win = &vop->win[i]; - const struct vop_win_data *win_data = vop_win->data; + for (i = 0; i < vop->num_wins; i++) { + struct vop_win *win = &vop->win[i]; unsigned long possible_crtcs = 1 << drm_crtc_index(crtc); - if (win_data->type != DRM_PLANE_TYPE_OVERLAY) + if (win->type != DRM_PLANE_TYPE_OVERLAY) continue; - ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, - possible_crtcs, - &vop_plane_funcs, - win_data->phy->data_formats, - win_data->phy->nformats, - win_data->type); - if (ret) { - DRM_ERROR("failed to initialize overlay plane\n"); + ret = vop_plane_init(vop, win, possible_crtcs); + if (ret) goto err_cleanup_crtc; - } } port = of_get_child_by_name(dev->of_node, "port"); if (!port) { DRM_ERROR("no port node found in %s\n", dev->of_node->full_name); + ret = -ENOENT; goto err_cleanup_crtc; } init_completion(&vop->dsp_hold_completion); + init_completion(&vop->wait_update_complete); crtc->port = port; - vop->pipe = drm_crtc_index(crtc); - rockchip_register_crtc_funcs(drm_dev, &private_crtc_funcs, vop->pipe); + rockchip_register_crtc_funcs(crtc, &private_crtc_funcs); return 0; err_cleanup_crtc: drm_crtc_cleanup(crtc); err_cleanup_planes: - list_for_each_entry(plane, &drm_dev->mode_config.plane_list, head) + list_for_each_entry_safe(plane, tmp, &drm_dev->mode_config.plane_list, + head) drm_plane_cleanup(plane); return ret; } @@ -1547,145 +1512,111 @@ err_cleanup_planes: static void vop_destroy_crtc(struct vop *vop) { struct drm_crtc *crtc = &vop->crtc; + struct drm_device *drm_dev = vop->drm_dev; + struct drm_plane *plane, *tmp; - rockchip_unregister_crtc_funcs(vop->drm_dev, vop->pipe); + rockchip_unregister_crtc_funcs(crtc); of_node_put(crtc->port); - drm_crtc_cleanup(crtc); -} - -static int vop_initial(struct vop *vop) -{ - const struct vop_data *vop_data = vop->data; - const struct vop_reg_data *init_table = vop_data->init_table; - struct reset_control *ahb_rst; - int i, ret; - - vop->hclk = devm_clk_get(vop->dev, "hclk_vop"); - if (IS_ERR(vop->hclk)) { - dev_err(vop->dev, "failed to get hclk source\n"); - return PTR_ERR(vop->hclk); - } - vop->aclk = devm_clk_get(vop->dev, "aclk_vop"); - if (IS_ERR(vop->aclk)) { - dev_err(vop->dev, "failed to get aclk source\n"); - return PTR_ERR(vop->aclk); - } - vop->dclk = devm_clk_get(vop->dev, "dclk_vop"); - if (IS_ERR(vop->dclk)) { - dev_err(vop->dev, "failed to get dclk source\n"); - return PTR_ERR(vop->dclk); - } - - ret = clk_prepare(vop->dclk); - if (ret < 0) { - dev_err(vop->dev, "failed to prepare dclk\n"); - return ret; - } - - /* Enable both the hclk and aclk to setup the vop */ - ret = clk_prepare_enable(vop->hclk); - if (ret < 0) { - dev_err(vop->dev, "failed to prepare/enable hclk\n"); - goto err_unprepare_dclk; - } - - ret = clk_prepare_enable(vop->aclk); - if (ret < 0) { - dev_err(vop->dev, "failed to prepare/enable aclk\n"); - goto err_disable_hclk; - } /* - * do hclk_reset, reset all vop registers. + * We need to cleanup the planes now. Why? + * + * The planes are "&vop->win[i].base". That means the memory is + * all part of the big "struct vop" chunk of memory. That memory + * was devm allocated and associated with this component. We need to + * free it ourselves before vop_unbind() finishes. */ - ahb_rst = devm_reset_control_get(vop->dev, "ahb"); - if (IS_ERR(ahb_rst)) { - dev_err(vop->dev, "failed to get ahb reset\n"); - ret = PTR_ERR(ahb_rst); - goto err_disable_aclk; - } - reset_control_assert(ahb_rst); - usleep_range(10, 20); - reset_control_deassert(ahb_rst); - - memcpy(vop->regsbak, vop->regs, vop->len); - - for (i = 0; i < vop_data->table_size; i++) - vop_writel(vop, init_table[i].offset, init_table[i].value); - - for (i = 0; i < vop_data->win_size; i++) { - const struct vop_win_data *win = &vop_data->win[i]; - - VOP_WIN_SET(vop, win, enable, 0); - } - - vop_cfg_done(vop); + list_for_each_entry_safe(plane, tmp, &drm_dev->mode_config.plane_list, + head) + vop_plane_destroy(plane); /* - * do dclk_reset, let all config take affect. + * Destroy CRTC after vop_plane_destroy() since vop_disable_plane() + * references the CRTC. */ - vop->dclk_rst = devm_reset_control_get(vop->dev, "dclk"); - if (IS_ERR(vop->dclk_rst)) { - dev_err(vop->dev, "failed to get dclk reset\n"); - ret = PTR_ERR(vop->dclk_rst); - goto err_disable_aclk; - } - reset_control_assert(vop->dclk_rst); - usleep_range(10, 20); - reset_control_deassert(vop->dclk_rst); - - clk_disable(vop->hclk); - clk_disable(vop->aclk); - - vop->is_enabled = false; - - return 0; - -err_disable_aclk: - clk_disable_unprepare(vop->aclk); -err_disable_hclk: - clk_disable_unprepare(vop->hclk); -err_unprepare_dclk: - clk_unprepare(vop->dclk); - return ret; + drm_crtc_cleanup(crtc); } /* * Initialize the vop->win array elements. */ -static void vop_win_init(struct vop *vop) +static int vop_win_init(struct vop *vop) { const struct vop_data *vop_data = vop->data; - unsigned int i; + unsigned int i, j; + unsigned int num_wins = 0; + struct drm_property *prop; for (i = 0; i < vop_data->win_size; i++) { - struct vop_win *vop_win = &vop->win[i]; + struct vop_win *vop_win = &vop->win[num_wins]; const struct vop_win_data *win_data = &vop_data->win[i]; - vop_win->data = win_data; + if (!win_data->phy) + continue; + + vop_win->phy = win_data->phy; + vop_win->offset = win_data->base; + vop_win->type = win_data->type; + vop_win->data_formats = win_data->phy->data_formats; + vop_win->nformats = win_data->phy->nformats; vop_win->vop = vop; - INIT_LIST_HEAD(&vop_win->pending); + vop_win->win_id = i; + vop_win->area_id = 0; + num_wins++; + + for (j = 0; j < win_data->area_size; j++) { + struct vop_win *vop_area = &vop->win[num_wins]; + const struct vop_win_phy *area = win_data->area[j]; + + vop_area->parent = vop_win; + vop_area->offset = vop_win->offset; + vop_area->phy = area; + vop_area->type = DRM_PLANE_TYPE_OVERLAY; + vop_area->data_formats = vop_win->data_formats; + vop_area->nformats = vop_win->nformats; + vop_area->vop = vop; + vop_area->win_id = i; + vop_area->area_id = j; + num_wins++; + } } + + vop->num_wins = num_wins; + + prop = drm_property_create_range(vop->drm_dev, DRM_MODE_PROP_ATOMIC, + "ZPOS", 0, vop->data->win_size); + if (!prop) { + DRM_ERROR("failed to create zpos property\n"); + return -EINVAL; + } + vop->plane_zpos_prop = prop; + + return 0; } static int vop_bind(struct device *dev, struct device *master, void *data) { struct platform_device *pdev = to_platform_device(dev); - const struct of_device_id *of_id; const struct vop_data *vop_data; struct drm_device *drm_dev = data; struct vop *vop; struct resource *res; size_t alloc_size; - int ret, irq; + int ret, irq, i; + int num_wins = 0; - of_id = of_match_device(vop_driver_dt_match, dev); - vop_data = of_id->data; + vop_data = of_device_get_match_data(dev); if (!vop_data) return -ENODEV; + for (i = 0; i < vop_data->win_size; i++) { + const struct vop_win_data *win_data = &vop_data->win[i]; + + num_wins += win_data->area_size + 1; + } + /* Allocate vop struct and its vop_win array */ - alloc_size = sizeof(*vop) + sizeof(*vop->win) * vop_data->win_size; + alloc_size = sizeof(*vop) + sizeof(*vop->win) * num_wins; vop = devm_kzalloc(dev, alloc_size, GFP_KERNEL); if (!vop) return -ENOMEM; @@ -1693,9 +1624,12 @@ static int vop_bind(struct device *dev, struct device *master, void *data) vop->dev = dev; vop->data = vop_data; vop->drm_dev = drm_dev; + vop->num_wins = num_wins; dev_set_drvdata(dev, vop); - vop_win_init(vop); + ret = vop_win_init(vop); + if (ret) + return ret; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); vop->len = resource_size(res); @@ -1707,10 +1641,20 @@ static int vop_bind(struct device *dev, struct device *master, void *data) if (!vop->regsbak) return -ENOMEM; - ret = vop_initial(vop); - if (ret < 0) { - dev_err(&pdev->dev, "cannot initial vop dev - err %d\n", ret); - return ret; + vop->hclk = devm_clk_get(vop->dev, "hclk_vop"); + if (IS_ERR(vop->hclk)) { + dev_err(vop->dev, "failed to get hclk source\n"); + return PTR_ERR(vop->hclk); + } + vop->aclk = devm_clk_get(vop->dev, "aclk_vop"); + if (IS_ERR(vop->aclk)) { + dev_err(vop->dev, "failed to get aclk source\n"); + return PTR_ERR(vop->aclk); + } + vop->dclk = devm_clk_get(vop->dev, "dclk_vop"); + if (IS_ERR(vop->dclk)) { + dev_err(vop->dev, "failed to get dclk source\n"); + return PTR_ERR(vop->dclk); } irq = platform_get_irq(pdev, 0); @@ -1725,8 +1669,8 @@ static int vop_bind(struct device *dev, struct device *master, void *data) mutex_init(&vop->vsync_mutex); - ret = devm_request_threaded_irq(dev, vop->irq, vop_isr, vop_isr_thread, - IRQF_SHARED, dev_name(dev), vop); + ret = devm_request_irq(dev, vop->irq, vop_isr, + IRQF_SHARED, dev_name(dev), vop); if (ret) return ret; @@ -1749,42 +1693,8 @@ static void vop_unbind(struct device *dev, struct device *master, void *data) vop_destroy_crtc(vop); } -static const struct component_ops vop_component_ops = { +const struct component_ops vop_component_ops = { .bind = vop_bind, .unbind = vop_unbind, }; - -static int vop_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - - if (!dev->of_node) { - dev_err(dev, "can't find vop devices\n"); - return -ENODEV; - } - - return component_add(dev, &vop_component_ops); -} - -static int vop_remove(struct platform_device *pdev) -{ - component_del(&pdev->dev, &vop_component_ops); - - return 0; -} - -struct platform_driver vop_platform_driver = { - .probe = vop_probe, - .remove = vop_remove, - .driver = { - .name = "rockchip-vop", - .owner = THIS_MODULE, - .of_match_table = of_match_ptr(vop_driver_dt_match), - }, -}; - -module_platform_driver(vop_platform_driver); - -MODULE_AUTHOR("Mark Yao "); -MODULE_DESCRIPTION("ROCKCHIP VOP Driver"); -MODULE_LICENSE("GPL v2"); +EXPORT_SYMBOL_GPL(vop_component_ops);