X-Git-Url: http://plrg.eecs.uci.edu/git/?p=firefly-linux-kernel-4.4.55.git;a=blobdiff_plain;f=arch%2Farm64%2Fboot%2Fdts%2Frockchip%2Frk3399-android.dtsi;h=feef1fca57ad318576256a07418c5cca049b7980;hp=b5b3a31b758f690d1e5420cc4f949240f4b934e1;hb=52b44d80517bf458404fa52269c9c668408c1fa6;hpb=d3d20ffda576beb9432f7f42515adef4550ed65a diff --git a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi index b5b3a31b758f..feef1fca57ad 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi @@ -39,23 +39,20 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ -#include -#include + +#include +#include +#include "rk3399-vop-clk-set.dtsi" / { compatible = "rockchip,android", "rockchip,rk3399"; - aliases { - lcdc0 = &vopb_rk_fb; - lcdc1 = &vopl_rk_fb; - }; - chosen { bootargs = "earlycon=uart8250,mmio32,0xff1a0000 swiotlb=1"; }; ramoops_mem: ramoops_mem { - reg = <0x0 0x100000 0x0 0x100000>; + reg = <0x0 0x110000 0x0 0xf0000>; reg-names = "ramoops_mem"; }; @@ -63,7 +60,7 @@ compatible = "ramoops"; record-size = <0x0 0x20000>; console-size = <0x0 0x80000>; - ftrace-size = <0x0 0x10000>; + ftrace-size = <0x0 0x00000>; pmsg-size = <0x0 0x50000>; memory-region = <&ramoops_mem>; }; @@ -84,33 +81,12 @@ #size-cells = <2>; ranges; - /* global autoconfigured region for contiguous allocations */ - linux,cma { - compatible = "shared-dma-pool"; - reusable; - size = <0x0 0x8000000>; - linux,cma-default; - }; - /* reg = <0x0 0x0 0x0 0x0> will be updated by uboot */ - rockchip_logo: rockchip-logo@00000000 { - compatible = "rockchip,fb-logo"; + drm_logo: drm-logo@00000000 { + compatible = "rockchip,drm-logo"; reg = <0x0 0x0 0x0 0x0>; }; }; - ion { - compatible = "rockchip,ion"; - #address-cells = <1>; - #size-cells = <0>; - - cma-heap { - reg = <0x00000000 0x02000000>; - }; - - system-heap { - }; - }; - rk_key: rockchip-key { compatible = "rockchip,key"; status = "okay"; @@ -161,75 +137,6 @@ }; }; - vpu: vpu_service@ff650000 { - compatible = "rockchip,vpu_service"; - rockchip,grf = <&grf>; - iommu_enabled = <1>; - reg = <0x0 0xff650000 0x0 0x800>; - interrupts = , - ; - interrupt-names = "irq_dec", "irq_enc"; - clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; - clock-names = "aclk_vcodec", "hclk_vcodec"; - resets = <&cru SRST_H_VCODEC>, <&cru SRST_A_VCODEC>; - reset-names = "video_h", "video_a"; - power-domains = <&power RK3399_PD_VCODEC>; - name = "vpu_service"; - dev_mode = <0>; - }; - - vpu_mmu: vpu_mmu { - dbgname = "vpu"; - compatible = "rockchip,vpu_mmu"; - reg = <0x0 0xff650800 0x0 0x40>; - interrupts = ; - interrupt-names = "vpu_mmu"; - }; - - rkvdec: rkvdec@ff660000 { - compatible = "rockchip,rkvdec"; - rockchip,grf = <&grf>; - iommu_enabled = <1>; - reg = <0x0 0xff660000 0x0 0x400>; - interrupts = ; - interrupt-names = "irq_dec"; - clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,<&cru SCLK_VDU_CA>,<&cru SCLK_VDU_CORE>; - clock-names = "aclk_vcodec", "hclk_vcodec", "clk_cabac", "clk_core"; - resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>; - reset-names = "video_h", "video_a"; - power-domains = <&power RK3399_PD_VDU>; - dev_mode = <2>; - name = "rkvdec"; - }; - - vdec_mmu: vdec_mmu { - dbgname = "vdec"; - compatible = "rockchip,vdec_mmu"; - reg = <0x0 0xff660480 0x0 0x40>, - <0x0 0xff6604c0 0x0 0x40>; - interrupts = ; - interrupt-names = "vdec_mmu"; - }; - - iep: iep@ff670000 { - compatible = "rockchip,iep"; - iommu_enabled = <1>; - reg = <0x0 0xff670000 0x0 0x800>; - interrupts = ; - clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; - clock-names = "aclk_iep", "hclk_iep"; - power-domains = <&power RK3399_PD_IEP>; - version = <2>; - }; - - iep_mmu: iep-mmu { - dbgname = "iep"; - compatible = "rockchip,iep_mmu"; - reg = <0x0 0xff670800 0x0 0x40>; - interrupts = ; - interrupt-names = "iep_mmu"; - }; - rga: rga@ff680000 { compatible = "rockchip,rga2"; dev_mode = <1>; @@ -238,75 +145,13 @@ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>; clock-names = "aclk_rga", "hclk_rga", "clk_rga"; power-domains = <&power RK3399_PD_RGA>; + dma-coherent; status = "okay"; }; - fb: fb { - status = "okay"; - compatible = "rockchip,rk-fb"; - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <1>; - memory-region = <&rockchip_logo>; - }; - - rk_screen: screen { - status = "okay"; - compatible = "rockchip,screen"; - }; - - vopb_rk_fb: vop-rk-fb@ff900000 { - status = "disabled"; - compatible = "rockchip,rk3399-lcdc"; - rockchip,prop = ; - reg = <0x0 0xff900000 0x0 0x3efc>; - interrupts = ; - clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; - clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc"; - resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>; - reset-names = "axi", "ahb", "dclk"; - rockchip,grf = <&grf>; - rockchip,pwr18 = <0>; - rockchip,iommu-enabled = <1>; - power-domains = <&power RK3399_PD_VOPB>; - }; - - vopb_mmu_rk_fb: vopb-mmu { - status = "okay"; - dbgname = "vop"; - compatible = "rockchip,vopb_mmu"; - reg = <0x0 0xff903f00 0x0 0x100>; - interrupts = ; - interrupt-names = "vopb_mmu"; - }; - - vopl_rk_fb: vop-rk-fb@ff8f0000 { - status = "disabled"; - compatible = "rockchip,rk3399-lcdc"; - rockchip,prop = ; - reg = <0x0 0xff8f0000 0x0 0x3efc>; - interrupts = ; - clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; - clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc"; - resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>; - reset-names = "axi", "ahb", "dclk"; - rockchip,grf = <&grf>; - rockchip,pwr18 = <0>; - rockchip,iommu-enabled = <1>; - power-domains = <&power RK3399_PD_VOPL>; - }; - - vopl_mmu_rk_fb: vopl-mmu { - status = "okay"; - dbgname = "vop"; - compatible = "rockchip,vopl_mmu"; - reg = <0x0 0xff8f3f00 0x0 0x100>; - interrupts = ; - interrupt-names = "vopl_mmu"; - }; - isp0: isp@ff910000 { compatible = "rockchip,rk3399-isp", "rockchip,isp"; - reg = <0x0 0xff910000 0x0 0x10000>; + reg = <0x0 0xff910000 0x0 0x4000>; interrupts = ; clocks = <&cru SCLK_CIF_OUT>, <&cru SCLK_CIF_OUT>, @@ -321,7 +166,7 @@ "hclk_isp0_noc", "hclk_isp0_wrapper", "clk_isp0", "pclk_dphyrx"; pinctrl-names = - "cif_clkout","isp_dvp8bit0", "isp_mipi_fl", + "cif_clkout", "isp_dvp8bit0", "isp_mipi_fl", "isp_mipi_fl_prefl", "isp_flash_as_gpio", "isp_flash_as_trigger_out"; pinctrl-0 = <&cif_clkout>; @@ -338,21 +183,13 @@ rockchip,gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; rockchip,isp,iommu-enable = <1>; power-domains = <&power RK3399_PD_ISP0>; + iommus = <&isp0_mmu>; status = "disabled"; }; - isp0_mmu { - dbgname = "isp0"; - compatible = "rockchip,isp0_mmu"; - reg = <0x0 0xff914000 0x0 0x100>, - <0x0 0xff915000 0x0 0x100>; - interrupts = ; - interrupt-names = "isp0_mmu"; - }; - isp1: isp@ff920000 { compatible = "rockchip,rk3399-isp", "rockchip,isp"; - reg = <0x0 0xff920000 0x0 0x10000>; + reg = <0x0 0xff920000 0x0 0x4000>; interrupts = ; clocks = <&cru ACLK_ISP1_NOC>, <&cru ACLK_ISP1_WRAPPER>, @@ -371,7 +208,7 @@ "pclk_dphyrx", "pclk_mipi_dsi", "mipi_dphy_cfg"; pinctrl-names = - "cif_clkout","isp_dvp8bit0", "isp_mipi_fl", + "cif_clkout", "isp_dvp8bit0", "isp_mipi_fl", "isp_mipi_fl_prefl", "isp_flash_as_gpio", "isp_flash_as_trigger_out"; pinctrl-0 = <&cif_clkout>; @@ -388,120 +225,140 @@ rockchip,gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; rockchip,isp,iommu-enable = <1>; power-domains = <&power RK3399_PD_ISP1>; + iommus = <&isp1_mmu>; status = "disabled"; }; - isp1_mmu { - dbgname = "isp1"; - compatible = "rockchip,isp1_mmu"; - reg = <0x0 0xff924000 0x0 0x100>, - <0x0 0xff925000 0x0 0x100>; - interrupts = ; - interrupt-names = "isp1_mmu"; + uboot-charge { + compatible = "rockchip,uboot-charge"; + rockchip,uboot-charge-on = <1>; + rockchip,android-charge-on = <0>; }; - hdmi_rk_fb: hdmi-rk-fb@ff940000 { + hdmi_dp_sound: hdmi-dp-sound { status = "disabled"; - compatible = "rockchip,rk3399-hdmi"; - reg = <0x0 0xff940000 0x0 0x20000>; - interrupts = , - ; - clocks = <&cru PCLK_HDMI_CTRL>, - <&cru HCLK_HDCP>, - <&cru SCLK_HDMI_CEC>, - <&cru PLL_VPLL>, - <&cru SCLK_HDMI_SFR>; - clock-names = "pclk_hdmi", - "hdcp_clk_hdmi", - "cec_clk_hdmi", - "dclk_hdmi_phy", - "sclk_hdmi_sfr"; - resets = <&cru SRST_HDMI_CTRL>; - reset-names = "hdmi"; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&hdmi_i2c_xfer &hdmi_cec>; - pinctrl-1 = <&i2c3_gpio>; - rockchip,grf = <&grf>; - power-domains = <&power RK3399_PD_HDCP>; + compatible = "rockchip,rk3399-hdmi-dp"; + rockchip,cpu = <&i2s2>; + rockchip,codec = <&hdmi>, <&cdn_dp>; }; +}; - mipi0_rk_fb: mipi-rk-fb@ff960000 { - compatible = "rockchip,rk3399-dsi"; - rockchip,prop = <0>; - rockchip,grf = <&grf>; - reg = <0x0 0xff960000 0x0 0x8000>; - interrupts = ; - clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>, <&cru SCLK_MIPIDPHY_CFG>; - clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "mipi_dphy_cfg"; - power-domains = <&power RK3399_PD_VIO>; - status = "disabled"; - }; +&vopb { + status = "okay"; +}; - mipi1_rk_fb: mipi-rk-fb@ff968000 { - compatible = "rockchip,rk3399-dsi"; - rockchip,prop = <1>; - rockchip,grf = <&grf>; - reg = <0x0 0xff968000 0x0 0x8000>; - interrupts = ; - clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI1>, <&cru SCLK_MIPIDPHY_CFG>; - clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "mipi_dphy_cfg"; - power-domains = <&power RK3399_PD_VIO>; - status = "disabled"; - }; +&vopb_mmu { + status = "okay"; +}; - edp_rk_fb: edp-rk-fb@ff970000 { - compatible = "rockchip,rk3399-edp-fb"; - reg = <0x0 0xff970000 0x0 0x8000>; - rockchip,grf = <&grf>; - interrupts = ; - clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>; - clock-names = "clk_edp", "pclk_edp"; - resets = <&cru SRST_P_EDP_CTRL>; - reset-names = "edp_apb"; - status = "disabled"; +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; + +&hdmi { + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <0>; + ddc-i2c-scl-high-time-ns = <9625>; + ddc-i2c-scl-low-time-ns = <10000>; + status = "okay"; +}; + +&display_subsystem { + status = "okay"; + + ports = <&vopb_out>, <&vopl_out>; + memory-region = <&drm_logo>; + route { + route_hdmi: route-hdmi { + status = "disabled"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "fullscreen"; + charge_logo,mode = "center"; + connect = <&vopb_out_hdmi>; + }; + + route_mipi: route-mipi { + status = "disabled"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "fullscreen"; + charge_logo,mode = "center"; + connect = <&vopb_out_mipi>; + }; + + route_edp: route-edp { + status = "disabled"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "fullscreen"; + charge_logo,mode = "center"; + connect = <&vopb_out_edp>; + }; }; }; +&i2s2 { + #sound-dai-cells = <0>; +}; + +&rkvdec { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + dr_mode = "otg"; +}; + +&vpu { + status = "okay"; +}; + &pinctrl { isp { cif_clkout: cif-clkout { rockchip,pins = - /*cif_clkout*/ - <2 11 RK_FUNC_3 &pcfg_pull_none>; + /*cif_clkout*/ + <2 11 RK_FUNC_3 &pcfg_pull_none>; }; isp_dvp_d0d7: isp-dvp-d0d7 { rockchip,pins = - /*cif_data0*/ - <2 0 RK_FUNC_3 &pcfg_pull_none>, - /*cif_data1*/ - <2 1 RK_FUNC_3 &pcfg_pull_none>, - /*cif_data2*/ - <2 2 RK_FUNC_3 &pcfg_pull_none>, - /*cif_data3*/ - <2 3 RK_FUNC_3 &pcfg_pull_none>, - /*cif_data4*/ - <2 4 RK_FUNC_3 &pcfg_pull_none>, - /*cif_data5*/ - <2 5 RK_FUNC_3 &pcfg_pull_none>, - /*cif_data6*/ - <2 6 RK_FUNC_3 &pcfg_pull_none>, - /*cif_data7*/ - <2 7 RK_FUNC_3 &pcfg_pull_none>, - /*cif_sync*/ - <2 8 RK_FUNC_3 &pcfg_pull_none>, - /*cif_href*/ - <2 9 RK_FUNC_3 &pcfg_pull_none>, - /*cif_clkin*/ - <2 10 RK_FUNC_3 &pcfg_pull_none>; + /*cif_data0*/ + <2 0 RK_FUNC_3 &pcfg_pull_none>, + /*cif_data1*/ + <2 1 RK_FUNC_3 &pcfg_pull_none>, + /*cif_data2*/ + <2 2 RK_FUNC_3 &pcfg_pull_none>, + /*cif_data3*/ + <2 3 RK_FUNC_3 &pcfg_pull_none>, + /*cif_data4*/ + <2 4 RK_FUNC_3 &pcfg_pull_none>, + /*cif_data5*/ + <2 5 RK_FUNC_3 &pcfg_pull_none>, + /*cif_data6*/ + <2 6 RK_FUNC_3 &pcfg_pull_none>, + /*cif_data7*/ + <2 7 RK_FUNC_3 &pcfg_pull_none>, + /*cif_sync*/ + <2 8 RK_FUNC_3 &pcfg_pull_none>, + /*cif_href*/ + <2 9 RK_FUNC_3 &pcfg_pull_none>, + /*cif_clkin*/ + <2 10 RK_FUNC_3 &pcfg_pull_none>; }; isp_shutter: isp-shutter { rockchip,pins = - /*SHUTTEREN*/ - <1 1 RK_FUNC_1 &pcfg_pull_none>, - /*SHUTTERTRIG*/ - <1 0 RK_FUNC_1 &pcfg_pull_none>; + /*SHUTTEREN*/ + <1 1 RK_FUNC_1 &pcfg_pull_none>, + /*SHUTTERTRIG*/ + <1 0 RK_FUNC_1 &pcfg_pull_none>; }; isp_flash_trigger: isp-flash-trigger { @@ -516,7 +373,9 @@ isp_flash_trigger_as_gpio: isp_flash_trigger_as_gpio { /*ISP_FLASHTRIGOU*/ - rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = + <0 17 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; +