X-Git-Url: http://plrg.eecs.uci.edu/git/?p=firefly-linux-kernel-4.4.55.git;a=blobdiff_plain;f=arch%2Farm%2Fboot%2Fdts%2Frk3288-android.dtsi;h=fbaee75d1e1041e9c49545d1019678cef0eba63c;hp=b7463a0329596d4913a982a52d9b510d67fc4225;hb=6a83e7f14032eced131bdee261c8adafeb252fa8;hpb=2e731ec279bf35254494610c402417df98d1914f

diff --git a/arch/arm/boot/dts/rk3288-android.dtsi b/arch/arm/boot/dts/rk3288-android.dtsi
index b7463a032959..fbaee75d1e10 100644
--- a/arch/arm/boot/dts/rk3288-android.dtsi
+++ b/arch/arm/boot/dts/rk3288-android.dtsi
@@ -47,6 +47,39 @@
 		bootargs = "earlycon=uart8250,mmio32,0xff690000";
 	};
 
+	reserved-memory {
+		ramoops_mem: ramoops@00000000 {
+			reg = <0x8000000 0xF0000>;
+		};
+	};
+
+	ramoops {
+		compatible = "ramoops";
+		record-size = <0x0 0x20000>;
+		console-size = <0x0 0x80000>;
+		ftrace-size = <0x0 0x00000>;
+		pmsg-size = <0x0 0x50000>;
+		memory-region = <&ramoops_mem>;
+	};
+
+	fiq-debugger {
+		compatible = "rockchip,fiq-debugger";
+		interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH 0>;
+		rockchip,serial-id = <2>;
+		rockchip,wake-irq = <0>;
+		rockchip,irq-mode-enable = <1>;  /* If enable uart uses irq instead of fiq */
+		rockchip,baudrate = <115200>;  /* Only 115200 and 1500000 */
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2_xfer>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	/delete-node/ timer@ff810000;
+
 	backlight: backlight {
 		compatible = "pwm-backlight";
 		brightness-levels = <
@@ -182,6 +215,45 @@
 			rk_usb,fsvplus    = <0x2cc 24 1>;
 		};
 	};
+
+	nandc0: nandc@ff400000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x0 0xff400000 0x0 0x4000>;
+		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC0>, <&cru HCLK_NANDC0>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+};
+
+&edp_panel {
+	backlight = <&backlight>;
+};
+
+&cpu0 {
+	enable-method = "psci";
+};
+
+&cpu1 {
+	enable-method = "psci";
+};
+
+&cpu2 {
+	enable-method = "psci";
+};
+
+&cpu3 {
+	enable-method = "psci";
+};
+
+&dmac_bus_s {
+	/* change to non-secure dmac */
+	reg = <0xff600000 0x4000>;
+};
+
+&efuse {
+	compatible = "rockchip,rk3288-secure-efuse";
 };
 
 &rga {