ARM: rockchip: rk3228: add grf definition
[firefly-linux-kernel-4.4.55.git] / include / linux / rockchip / grf.h
index 8c47a03..ab03372 100755 (executable)
 #define RK312X_GRF_CHIP_TAG 0x00300
 #define RK312X_GRF_SDMMC_DET_CNT 0x00304
 #define RK312X_GRF_EFUSE_PRG_EN 0x0037c
 #define RK312X_GRF_CHIP_TAG 0x00300
 #define RK312X_GRF_SDMMC_DET_CNT 0x00304
 #define RK312X_GRF_EFUSE_PRG_EN 0x0037c
+
+#define RK3228_GRF_GPIO0A_IOMUX                0x0000
+#define RK3228_GRF_GPIO0B_IOMUX                0x0004
+#define RK3228_GRF_GPIO0C_IOMUX                0x0008
+#define RK3228_GRF_GPIO0D_IOMUX                0x000c
+#define RK3228_GRF_GPIO1A_IOMUX                0x0010
+#define RK3228_GRF_GPIO1B_IOMUX                0x0014
+#define RK3228_GRF_GPIO1C_IOMUX                0x0018
+#define RK3228_GRF_GPIO1D_IOMUX                0x001c
+#define RK3228_GRF_GPIO2A_IOMUX                0x0020
+#define RK3228_GRF_GPIO2B_IOMUX                0x0024
+#define RK3228_GRF_GPIO2C_IOMUX                0x0028
+#define RK3228_GRF_GPIO2D_IOMUX                0x002c
+#define RK3228_GRF_GPIO3A_IOMUX                0x0030
+#define RK3228_GRF_GPIO3B_IOMUX                0x0034
+#define RK3228_GRF_GPIO3C_IOMUX                0x0038
+#define RK3228_GRF_GPIO3D_IOMUX                0x003c
+#define RK3228_GRF_COM_IOMUX           0x0050
+#define RK3228_GRF_GPIO0A_P            0x0100
+#define RK3228_GRF_GPIO0B_P            0x0104
+#define RK3228_GRF_GPIO0C_P            0x0108
+#define RK3228_GRF_GPIO0D_P            0x010c
+#define RK3228_GRF_GPIO1A_P            0x0110
+#define RK3228_GRF_GPIO1B_P            0x0114
+#define RK3228_GRF_GPIO1C_P            0x0118
+#define RK3228_GRF_GPIO1D_P            0x011c
+#define RK3228_GRF_GPIO2A_P            0x0120
+#define RK3228_GRF_GPIO2B_P            0x0124
+#define RK3228_GRF_GPIO2C_P            0x0128
+#define RK3228_GRF_GPIO2D_P            0x012c
+#define RK3228_GRF_GPIO3A_P            0x0130
+#define RK3228_GRF_GPIO3B_P            0x0134
+#define RK3228_GRF_GPIO3C_P            0x0138
+#define RK3228_GRF_GPIO3D_P            0x013c
+#define RK3228_GRF_GPIO0A_E            0x0200
+#define RK3228_GRF_GPIO0B_E            0x0204
+#define RK3228_GRF_GPIO0C_E            0x0208
+#define RK3228_GRF_GPIO0D_E            0x020c
+#define RK3228_GRF_GPIO1A_E            0x0210
+#define RK3228_GRF_GPIO1B_E            0x0214
+#define RK3228_GRF_GPIO1C_E            0x0218
+#define RK3228_GRF_GPIO1D_E            0x021c
+#define RK3228_GRF_GPIO2A_E            0x0220
+#define RK3228_GRF_GPIO2B_E            0x0224
+#define RK3228_GRF_GPIO2C_E            0x0228
+#define RK3228_GRF_GPIO2D_E            0x022c
+#define RK3228_GRF_GPIO3A_E            0x0230
+#define RK3228_GRF_GPIO3B_E            0x0234
+#define RK3228_GRF_GPIO3C_E            0x0238
+#define RK3228_GRF_GPIO3D_E            0x023c
+#define RK3228_GRF_GPIO0L_SR           0x0300
+#define RK3228_GRF_GPIO0H_SR           0x0304
+#define RK3228_GRF_GPIO1L_SR           0x0308
+#define RK3228_GRF_GPIO1H_SR           0x030c
+#define RK3228_GRF_GPIO2L_SR           0x0310
+#define RK3228_GRF_GPIO2H_SR           0x0314
+#define RK3228_GRF_GPIO3L_SR           0x0318
+#define RK3228_GRF_GPIO3H_SR           0x031c
+#define RK3228_GRF_GPIO0L_SMT          0x0380
+#define RK3228_GRF_GPIO0H_SMT          0x0384
+#define RK3228_GRF_GPIO1L_SMT          0x0388
+#define RK3228_GRF_GPIO1H_SMT          0x038c
+#define RK3228_GRF_GPIO2L_SMT          0x0390
+#define RK3228_GRF_GPIO2H_SMT          0x0394
+#define RK3228_GRF_GPIO3L_SMT          0x0398
+#define RK3228_GRF_GPIO3H_SMT          0x039c
+#define RK3228_GRF_SOC_CON0            0x0400
+#define RK3228_GRF_SOC_CON1            0x0404
+#define RK3228_GRF_SOC_CON2            0x0408
+#define RK3228_GRF_SOC_CON3            0x040c
+#define RK3228_GRF_SOC_CON4            0x0410
+#define RK3228_GRF_SOC_CON5            0x0414
+#define RK3228_GRF_SOC_CON6            0x0418
+#define RK3228_GRF_SOC_STATUS0         0x0480
+#define RK3228_GRF_SOC_STATUS1         0x0484
+#define RK3228_GRF_SOC_STATUS2         0x0488
+#define RK3228_GRF_CHIP_ID             0x048c
+#define RK3228_GRF_CPU_CON0            0x0500
+#define RK3228_GRF_CPU_CON1            0x0504
+#define RK3228_GRF_CPU_CON2            0x0508
+#define RK3228_GRF_CPU_CON3            0x050c
+#define RK3228_GRF_CPU_STATUS0         0x0520
+#define RK3228_GRF_CPU_STATUS1         0x0524
+#define RK3228_GRF_OS_REG0             0x05c8
+#define RK3228_GRF_OS_REG1             0x05cc
+#define RK3228_GRF_OS_REG2             0x05d0
+#define RK3228_GRF_OS_REG3             0x05d4
+#define RK3228_GRF_OS_REG4             0x05d8
+#define RK3228_GRF_OS_REG5             0x05dc
+#define RK3228_GRF_OS_REG6             0x05e0
+#define RK3228_GRF_OS_REG7             0x05e4
+#define RK3228_GRF_DDRC_STAT           0x0604
+#define RK3228_GRF_SIG_DETECT_CON      0x0680
+#define RK3228_GRF_SIG_DETECT_CON1     0x0684
+#define RK3228_GRF_SIG_DETECT_STATUS   0x0690
+#define RK3228_GRF_SIG_DETECT_STATUS1  0x0694
+#define RK3228_GRF_SIG_DETECT_CLR      0x06a0
+#define RK3228_GRF_SIG_DETECT_CLR1     0x06a4
+#define RK3228_GRF_EMMC_DET            0x06b0
+#define RK3228_GRF_HOST0_CON0          0x0700
+#define RK3228_GRF_HOST0_CON1          0x0704
+#define RK3228_GRF_HOST0_CON2          0x0708
+#define RK3228_GRF_HOST1_CON0          0x0710
+#define RK3228_GRF_HOST1_CON1          0x0714
+#define RK3228_GRF_HOST1_CON2          0x0718
+#define RK3228_GRF_HOST2_CON0          0x0720
+#define RK3228_GRF_HOST2_CON1          0x0724
+#define RK3228_GRF_HOST2_CON2          0x0728
+#define RK3228_GRF_USBPHY0_CON0                0x0760
+#define RK3228_GRF_USBPHY0_CON1                0x0764
+#define RK3228_GRF_USBPHY0_CON2                0x0768
+#define RK3228_GRF_USBPHY0_CON3                0x076c
+#define RK3228_GRF_USBPHY0_CON4                0x0770
+#define RK3228_GRF_USBPHY0_CON5                0x0774
+#define RK3228_GRF_USBPHY0_CON6                0x0778
+#define RK3228_GRF_USBPHY0_CON7                0x077c
+#define RK3228_GRF_USBPHY0_CON8                0x0780
+#define RK3228_GRF_USBPHY0_CON9                0x0784
+#define RK3228_GRF_USBPHY0_CON10       0x0788
+#define RK3228_GRF_USBPHY0_CON11       0x078c
+#define RK3228_GRF_USBPHY0_CON12       0x0790
+#define RK3228_GRF_USBPHY0_CON13       0x0794
+#define RK3228_GRF_USBPHY0_CON14       0x0798
+#define RK3228_GRF_USBPHY0_CON15       0x079c
+#define RK3228_GRF_USBPHY0_CON16       0x07a0
+#define RK3228_GRF_USBPHY0_CON17       0x07a4
+#define RK3228_GRF_USBPHY0_CON18       0x07a8
+#define RK3228_GRF_USBPHY0_CON19       0x07ac
+#define RK3228_GRF_USBPHY0_CON20       0x07b0
+#define RK3228_GRF_USBPHY0_CON21       0x07b4
+#define RK3228_GRF_USBPHY0_CON22       0x07b8
+#define RK3228_GRF_USBPHY0_CON23       0x07bc
+#define RK3228_GRF_USBPHY0_CON24       0x07c0
+#define RK3228_GRF_USBPHY0_CON25       0x07c4
+#define RK3228_GRF_USBPHY0_CON26       0x07c8
+#define RK3228_GRF_USBPHY1_CON0                0x0800
+#define RK3228_GRF_USBPHY1_CON1                0x0804
+#define RK3228_GRF_USBPHY1_CON2                0x0808
+#define RK3228_GRF_USBPHY1_CON3                0x080c
+#define RK3228_GRF_USBPHY1_CON4                0x0810
+#define RK3228_GRF_USBPHY1_CON5                0x0814
+#define RK3228_GRF_USBPHY1_CON6                0x0818
+#define RK3228_GRF_USBPHY1_CON7                0x081c
+#define RK3228_GRF_USBPHY1_CON8                0x0820
+#define RK3228_GRF_USBPHY1_CON9                0x0824
+#define RK3228_GRF_USBPHY1_CON10       0x0828
+#define RK3228_GRF_USBPHY1_CON11       0x082c
+#define RK3228_GRF_USBPHY1_CON12       0x0830
+#define RK3228_GRF_USBPHY1_CON13       0x0834
+#define RK3228_GRF_USBPHY1_CON14       0x0838
+#define RK3228_GRF_USBPHY1_CON15       0x083c
+#define RK3228_GRF_USBPHY1_CON16       0x0840
+#define RK3228_GRF_USBPHY1_CON17       0x0844
+#define RK3228_GRF_USBPHY1_CON18       0x0848
+#define RK3228_GRF_USBPHY1_CON19       0x084c
+#define RK3228_GRF_USBPHY1_CON20       0x0850
+#define RK3228_GRF_USBPHY1_CON21       0x0854
+#define RK3228_GRF_USBPHY1_CON22       0x0858
+#define RK3228_GRF_USBPHY1_CON23       0x085c
+#define RK3228_GRF_USBPHY1_CON24       0x0860
+#define RK3228_GRF_USBPHY1_CON25       0x0864
+#define RK3228_GRF_USBPHY1_CON26       0x0868
+#define RK3228_GRF_OTG_CON0            0x0880
+#define RK3228_GRF_UOC_CON0            0x0884
+#define RK3228_GRF_MAC_CON0            0x0900
+#define RK3228_GRF_MAC_CON1            0x0904
+#define RK3228_GRF_MACPHY_CON0         0x0b00
+#define RK3228_GRF_MACPHY_CON1         0x0b04
+#define RK3228_GRF_MACPHY_CON2         0x0b08
+#define RK3228_GRF_MACPHY_CON3         0x0b0c
+#define RK3228_GRF_MACPHY_STATUS       0x0b10
+
 #endif
 #endif