RK312X_CLKGATE_PCLK_UART2,
};
+#define RK3228_PLL_CONS(id, i) RK312X_PLL_CONS(id, i)
+#define RK3228_CRU_MODE_CON RK312X_CRU_MODE_CON
+#define RK3228_CRU_CLKSELS_CON_CNT RK312X_CRU_CLKSELS_CON_CNT
+#define RK3228_CRU_CLKSELS_CON(i) RK312X_CRU_CLKSELS_CON(i)
+#define RK3228_CRU_CLKGATES_CON_CNT (16)
+#define RK3228_CRU_CLKGATES_CON(i) RK312X_CRU_CLKGATES_CON(i)
+#define RK3228_CRU_SOFTRSTS_CON_CNT RK312X_CRU_SOFTRSTS_CON_CNT
+#define RK3228_CRU_SOFTRSTS_CON(i) RK312X_CRU_SOFTRSTS_CON(i)
+#define RK3228_CRU_MISC_CON RK312X_CRU_MISC_CON
+#define RK3228_CRU_GLB_CNT_TH RK312X_CRU_GLB_CNT_TH
+#define RK3228_CRU_GLB_RST_ST RK312X_CRU_GLB_RST_ST
+#define RK3228_CRU_SDMMC_CON0 RK312X_CRU_SDMMC_CON0
+#define RK3228_CRU_SDMMC_CON1 RK312X_CRU_SDMMC_CON1
+#define RK3228_CRU_SDIO_CON0 RK312X_CRU_SDIO_CON0
+#define RK3228_CRU_SDIO_CON1 RK312X_CRU_SDIO_CON1
+#define RK3228_CRU_EMMC_CON0 RK312X_CRU_EMMC_CON0
+#define RK3228_CRU_EMMC_CON1 RK312X_CRU_EMMC_CON1
+#define RK3228_CRU_GLB_SRST_FST_VALUE 0x001f0
+#define RK3228_CRU_GLB_SRST_SND_VALUE 0x001f4
+#define RK3228_CRU_PLL_MASK_CON 0x001f8
+
/*************************RK3368********************************/
/*******************CRU OFFSET*********************/