static const char dwc_otg20_driver_name[] = "usb20_otg";
dwc_otg_device_t *g_otgdev;
+void *dwc_otg_dev;
extern int pcd_init(struct platform_device *_dev);
extern int otg20_hcd_init(struct platform_device *_dev);
void dwc_otg_force_host(dwc_otg_core_if_t *core_if)
{
dwc_otg_device_t *otg_dev = core_if->otg_dev;
+ struct dwc_otg_platform_data *pdata = otg_dev->pldata;
dctl_data_t dctl = {.d32 = 0 };
unsigned long flags;
if (core_if->op_state == A_HOST) {
- printk("dwc_otg_force_host,already in A_HOST mode,everest\n");
+ dev_info(pdata->dev,
+ "dwc_otg_force_host,already in A_HOST mode,everest\n");
+ return;
+ } else if (pdata->get_status(USB_STATUS_BVABLID) &&
+ core_if->pmic_vbus) {
+ dev_info(pdata->dev,
+ "Please disconnect the USB cable first, and try again!\n");
return;
}
+
core_if->op_state = A_HOST;
cancel_delayed_work(&otg_dev->pcd->check_vbus_work);
local_irq_save(flags);
if (core_if->op_state == B_PERIPHERAL) {
+ local_irq_restore(flags);
printk
("dwc_otg_force_device,already in B_PERIPHERAL,everest\n");
return;
}
static const struct of_device_id usb20_host_of_match[] = {
+#ifdef CONFIG_ARM
{
.compatible = "rockchip,rk3188_usb20_host",
.data = &usb20host_pdata_rk3188,
.compatible = "rockchip,rk3126_usb20_host",
.data = &usb20host_pdata_rk3126,
},
+#endif
{},
};
dwc_otg_core_if_t *core_if = otg_dev->core_if;
struct dwc_otg_platform_data *pldata = otg_dev->pldata;
dctl_data_t dctl = {.d32 = 0 };
+ dwc_otg_pcd_t *pcd = core_if->otg_dev->pcd;
DWC_PRINTF("%s: disconnect USB %s mode\n", __func__,
dwc_otg_is_host_mode(core_if) ? "host" : "device");
- if (pldata->dwc_otg_uart_mode != NULL)
- pldata->dwc_otg_uart_mode(pldata, PHY_USB_MODE);
- if (pldata->phy_suspend != NULL)
- pldata->phy_suspend(pldata, USB_PHY_ENABLED);
if (dwc_otg_is_host_mode(core_if)) {
if (core_if->hcd_cb && core_if->hcd_cb->stop)
core_if->hcd_cb->stop(core_if->hcd_cb_p);
} else {
+ cancel_delayed_work_sync(&pcd->check_vbus_work);
/* soft disconnect */
dctl.d32 =
DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dctl);
/* Clear any pending interrupts */
DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF);
+ if (pldata->dwc_otg_uart_mode != NULL)
+ pldata->dwc_otg_uart_mode(pldata, PHY_USB_MODE);
+ if (pldata->phy_suspend != NULL)
+ pldata->phy_suspend(pldata, USB_PHY_ENABLED);
+
}
/**
}
static const struct of_device_id usb20_otg_of_match[] = {
+#ifdef CONFIG_ARM
{
.compatible = "rockchip,rk3188_usb20_otg",
.data = &usb20otg_pdata_rk3188,
.compatible = "rockchip,rk3126_usb20_otg",
.data = &usb20otg_pdata_rk3126,
},
+#endif
+#ifdef CONFIG_ARM64
{
- .compatible = "rockchip,rk3368_usb20_otg",
+ .compatible = "rockchip,rk3368-usb",
.data = &usb20otg_pdata_rk3368,
},
+#endif
{ },
};
*/
g_otgdev = dwc_otg_device;
+ dwc_otg_dev = (struct device *)&_dev->dev;
pldata->privdata = dwc_otg_device;
dwc_otg_device->pldata = pldata;
of_property_read_u32(node, "rockchip,usb-mode", &val);
dwc_otg_device->core_if->usb_mode = val;
+ /* Indicate usb vbus get from pmic (e.g. rk81x) */
+ dwc_otg_device->core_if->pmic_vbus = of_property_read_bool(node,
+ "rockchip,usb-pmic-vbus");
+
#ifndef DWC_HOST_ONLY
/*
* Initialize the PCD
void rk_usb_power_up(void)
{
struct dwc_otg_platform_data *pldata_otg;
+#ifdef CONFIG_USB20_HOST
struct dwc_otg_platform_data *pldata_host;
+#endif
+#ifdef CONFIG_USB_EHCI_RK
struct rkehci_platform_data *pldata_ehci;
+#endif
- if (cpu_is_rk3288()) {
+ if (is_rk3288_usb()) {
#ifdef CONFIG_RK_USB_UART
/* enable USB bypass UART function */
writel_relaxed(0x00c00000 | usb_to_uart_status,
void rk_usb_power_down(void)
{
struct dwc_otg_platform_data *pldata_otg;
+#ifdef CONFIG_USB20_HOST
struct dwc_otg_platform_data *pldata_host;
+#endif
+#ifdef CONFIG_USB_EHCI_RK
struct rkehci_platform_data *pldata_ehci;
+#endif
- if (cpu_is_rk3288()) {
+ if (is_rk3288_usb()) {
#ifdef CONFIG_RK_USB_UART
/* disable USB bypass UART function */
usb_to_uart_status =