#include <linux/version.h>
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)
# include <linux/usb/gadget.h>
#else
# include <linux/usb_gadget.h>
*/
while (len != 0 && (c = (u8) *s++) != 0) {
if (unlikely(c & 0x80)) {
- // 2-byte sequence:
- // 00000yyyyyxxxxxx = 110yyyyy 10xxxxxx
+ /* 2-byte sequence: */
+ /* 00000yyyyyxxxxxx = 110yyyyy 10xxxxxx */
if ((c & 0xe0) == 0xc0) {
uchar = (c & 0x1f) << 6;
c &= 0x3f;
uchar |= c;
- // 3-byte sequence (most CJKV characters):
- // zzzzyyyyyyxxxxxx = 1110zzzz 10yyyyyy 10xxxxxx
+ /* 3-byte sequence (most CJKV characters): */
+ /* zzzzyyyyyyxxxxxx = 1110zzzz 10yyyyyy 10xxxxxx */
} else if ((c & 0xf0) == 0xe0) {
uchar = (c & 0x0f) << 12;
if (0xd800 <= uchar && uchar <= 0xdfff)
goto fail;
- // 4-byte sequence (surrogate pairs, currently rare):
- // 11101110wwwwzzzzyy + 110111yyyyxxxxxx
- // = 11110uuu 10uuzzzz 10yyyyyy 10xxxxxx
- // (uuuuu = wwww + 1)
- // FIXME accept the surrogate code points (only)
+ /* 4-byte sequence (surrogate pairs, currently rare): */
+ /* 11101110wwwwzzzzyy + 110111yyyyxxxxxx */
+ /* = 11110uuu 10uuzzzz 10yyyyyy 10xxxxxx */
+ /* (uuuuu = wwww + 1) */
+ /* FIXME accept the surrogate code points (only) */
} else
goto fail;
} else
void *__DWC_DMA_ALLOC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr)
{
-#if 1 //def xxCOSIM /* Only works for 32-bit cosim */
- void *buf = dma_alloc_coherent(dma_ctx, (size_t)size, dma_addr, GFP_KERNEL);
+#if 1 /* def xxCOSIM Only works for 32-bit cosim */
+ void *buf = dma_alloc_coherent((struct device *)dma_ctx, (size_t)size,
+ dma_addr, GFP_KERNEL);
#else
void *buf = dma_alloc_coherent(dma_ctx, (size_t)size, dma_addr, GFP_KERNEL | GFP_DMA32);
#endif
void *__DWC_DMA_ALLOC_ATOMIC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr)
{
- void *buf = dma_alloc_coherent(NULL, (size_t)size, dma_addr, GFP_ATOMIC);
+ void *buf = dma_alloc_coherent((struct device *)dma_ctx, (size_t)size,
+ dma_addr, GFP_ATOMIC);
if (!buf) {
return NULL;
}
void __DWC_DMA_FREE(void *dma_ctx, uint32_t size, void *virt_addr, dwc_dma_t dma_addr)
{
- dma_free_coherent(dma_ctx, size, virt_addr, dma_addr);
+ dma_free_coherent((struct device *)dma_ctx, size, virt_addr, dma_addr);
}
void *__DWC_ALLOC(void *mem_ctx, uint32_t size)
return *p;
#else
uint8_t *u_p = (uint8_t *)p;
+ uint32_t ret;
+ ret = u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24);
- return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+ return ret;
#endif
}
return *p;
#else
uint8_t *u_p = (uint8_t *)p;
+ uint32_t ret;
+ ret = u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24);
- return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+ return ret;
#endif
}
return *p;
#else
uint8_t *u_p = (uint8_t *)p;
+ uint32_t ret;
+ ret = u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24);
- return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+ return ret;
#endif
}
return *p;
#else
uint8_t *u_p = (uint8_t *)p;
+ uint32_t ret;
+ ret = u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24);
- return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+ return ret;
#endif
}
return *p;
#else
uint8_t *u_p = (uint8_t *)p;
- return (u_p[1] | (u_p[0] << 8));
+ uint16_t ret;
+ ret = u_p[1] | (u_p[0] << 8);
+ return ret;
#endif
}
return *p;
#else
uint8_t *u_p = (uint8_t *)p;
- return (u_p[1] | (u_p[0] << 8));
+ uint16_t ret;
+ ret = u_p[1] | (u_p[0] << 8);
+ return ret;
#endif
}
return *p;
#else
uint8_t *u_p = (uint8_t *)p;
- return (u_p[1] | (u_p[0] << 8));
+ uint16_t ret;
+ ret = u_p[1] | (u_p[0] << 8);
+ return ret;
#endif
}
return *p;
#else
uint8_t *u_p = (uint8_t *)p;
- return (u_p[1] | (u_p[0] << 8));
+ uint16_t ret;
+ ret = u_p[1] | (u_p[0] << 8);
+ return ret;
#endif
}
/* Registers */
-uint32_t DWC_READ_REG32(uint32_t volatile *reg)
+uint32_t DWC_READ_REG32(volatile uint32_t *reg)
{
return readl_relaxed(reg);
}
#if 0
-uint64_t DWC_READ_REG64(uint64_t volatile *reg)
+uint64_t DWC_READ_REG64(volatile uint64_t *reg)
{
}
#endif
-void DWC_WRITE_REG32(uint32_t volatile *reg, uint32_t value)
+void DWC_WRITE_REG32(volatile uint32_t *reg, uint32_t value)
{
writel_relaxed(value, reg);
- dsb();
+ dsb(sy);
}
#if 0
-void DWC_WRITE_REG64(uint64_t volatile *reg, uint64_t value)
+void DWC_WRITE_REG64(volatile uint64_t *reg, uint64_t value)
{
}
#endif
-void DWC_MODIFY_REG32(uint32_t volatile *reg, uint32_t clear_mask, uint32_t set_mask)
+void DWC_MODIFY_REG32(volatile uint32_t *reg, uint32_t clear_mask, uint32_t set_mask)
{
writel_relaxed((readl_relaxed(reg) & ~clear_mask) | set_mask, reg);
- dsb();
+ dsb(sy);
}
#if 0
-void DWC_MODIFY_REG64(uint64_t volatile *reg, uint64_t clear_mask, uint64_t set_mask)
+void DWC_MODIFY_REG64(volatile uint64_t *reg, uint64_t clear_mask, uint64_t set_mask)
{
}
#endif
DWC_SPINLOCK_IRQSAVE(timer->lock, &flags);
timer->scheduled = 0;
DWC_SPINUNLOCK_IRQRESTORE(timer->lock, flags);
- //DWC_DEBUG("Timer %s callback", timer->name);
+ /* DWC_DEBUG("Timer %s callback", timer->name); */
timer->cb(timer->data);
}
}
t->scheduled = 0;
- t->t->base = &boot_tvec_bases;
t->t->expires = jiffies;
setup_timer(t->t, timer_callback, (unsigned long)t);
if (!timer->scheduled) {
timer->scheduled = 1;
- //DWC_DEBUG("Scheduling timer %s to expire in +%d msec", timer->name, time);
+ /* DWC_DEBUG("Scheduling timer %s to expire in +%d msec",
+ * timer->name, time);*/
timer->t->expires = jiffies + msecs_to_jiffies(time);
add_timer(timer->t);
} else {
- //DWC_DEBUG("Modifying timer %s to expire in +%d msec", timer->name, time);
+ /* DWC_DEBUG("Modifying timer %s to expire in +%d msec",
+ * timer->name, time);*/
mod_timer(timer->t, jiffies + msecs_to_jiffies(time));
}
#ifdef DEBUG
DWC_CIRCLEQ_REMOVE(&wq->entries, container, entry);
#endif
- //DWC_DEBUG("Work done: %s, container=%p", container->name, container);
+ /* DWC_DEBUG("Work done: %s, container=%p",
+ * container->name, container); */
if (container->name) {
DWC_FREE(container->name);
}
container->cb = cb;
container->data = data;
container->wq = wq;
- //DWC_DEBUG("Queueing work: %s, container=%p", container->name, container);
+ /* DWC_DEBUG("Queueing work: %s, container=%p",
+ * container->name, container);*/
INIT_WORK(&container->work.work, do_work);
#ifdef DEBUG
container->cb = cb;
container->data = data;
container->wq = wq;
- //DWC_DEBUG("Queueing work: %s, container=%p", container->name, container);
+ /* DWC_DEBUG("Queueing work: %s, container=%p",
+ * container->name, container);*/
INIT_DELAYED_WORK(&container->work, do_work);
#ifdef DEBUG
{
int result = 0;
- printk(KERN_DEBUG "Module dwc_common_port init\n" );
+ printk(KERN_DEBUG "Module dwc_common_port init\n");
#ifdef DWC_DEBUG_MEMORY
result = dwc_memory_debug_start(NULL);
static void dwc_common_port_exit_module(void)
{
- printk(KERN_DEBUG "Module dwc_common_port exit\n" );
+ printk(KERN_DEBUG "Module dwc_common_port exit\n");
#ifdef DWC_NOTIFYLIB
dwc_free_notification_manager();