usb: dwc3: add hsphy_interface property
[firefly-linux-kernel-4.4.55.git] / drivers / usb / dwc3 / core.c
index 2bbab3d86fffe7437100f4757d42d174e51f5928..0de8968a2e97551b8a2aa20154948961ed13e632 100644 (file)
@@ -116,6 +116,33 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
        return 0;
 }
 
+/**
+ * dwc3_soft_reset - Issue soft reset
+ * @dwc: Pointer to our controller context structure
+ */
+static int dwc3_soft_reset(struct dwc3 *dwc)
+{
+       unsigned long timeout;
+       u32 reg;
+
+       timeout = jiffies + msecs_to_jiffies(500);
+       dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
+       do {
+               reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+               if (!(reg & DWC3_DCTL_CSFTRST))
+                       break;
+
+               if (time_after(jiffies, timeout)) {
+                       dev_err(dwc->dev, "Reset Timed Out\n");
+                       return -ETIMEDOUT;
+               }
+
+               cpu_relax();
+       } while (true);
+
+       return 0;
+}
+
 /**
  * dwc3_free_one_event_buffer - Frees one event buffer
  * @dwc: Pointer to our controller context structure
@@ -409,10 +436,24 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 
        dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
-       mdelay(100);
-
        reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 
+       /* Select the HS PHY interface */
+       switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) {
+       case DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI:
+               if (!strncmp(dwc->hsphy_interface, "utmi", 4)) {
+                       reg &= ~DWC3_GUSB2PHYCFG_ULPI_UTMI;
+               } else if (!strncmp(dwc->hsphy_interface, "ulpi", 4)) {
+                       reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI;
+               } else {
+                       dev_warn(dwc->dev, "HSPHY Interface not defined\n");
+                       break;
+               }
+               /* FALLTHROUGH */
+       default:
+               break;
+       }
+
        /*
         * Above 1.94a, it is recommended to set DWC3_GUSB2PHYCFG_SUSPHY to
         * '0' during coreConsultant configuration. So default value will
@@ -426,8 +467,6 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
                reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
 
        dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
-
-       mdelay(100);
 }
 
 /**
@@ -438,7 +477,6 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
  */
 static int dwc3_core_init(struct dwc3 *dwc)
 {
-       unsigned long           timeout;
        u32                     hwparams4 = dwc->hwparams.hwparams4;
        u32                     reg;
        int                     ret;
@@ -466,21 +504,9 @@ static int dwc3_core_init(struct dwc3 *dwc)
        }
 
        /* issue device SoftReset too */
-       timeout = jiffies + msecs_to_jiffies(500);
-       dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
-       do {
-               reg = dwc3_readl(dwc->regs, DWC3_DCTL);
-               if (!(reg & DWC3_DCTL_CSFTRST))
-                       break;
-
-               if (time_after(jiffies, timeout)) {
-                       dev_err(dwc->dev, "Reset Timed Out\n");
-                       ret = -ETIMEDOUT;
-                       goto err0;
-               }
-
-               cpu_relax();
-       } while (true);
+       ret = dwc3_soft_reset(dwc);
+       if (ret)
+               goto err0;
 
        ret = dwc3_core_soft_reset(dwc);
        if (ret)
@@ -555,8 +581,6 @@ static int dwc3_core_init(struct dwc3 *dwc)
 
        dwc3_writel(dwc->regs, DWC3_GCTL, reg);
 
-       dwc3_phy_setup(dwc);
-
        ret = dwc3_alloc_scratch_buffers(dwc);
        if (ret)
                goto err1;
@@ -836,6 +860,8 @@ static int dwc3_probe(struct platform_device *pdev)
                                "snps,tx_de_emphasis_quirk");
                of_property_read_u8(node, "snps,tx_de_emphasis",
                                &tx_de_emphasis);
+               of_property_read_string(node, "snps,hsphy_interface",
+                                       &dwc->hsphy_interface);
        } else if (pdata) {
                dwc->maximum_speed = pdata->maximum_speed;
                dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -863,6 +889,8 @@ static int dwc3_probe(struct platform_device *pdev)
                dwc->tx_de_emphasis_quirk = pdata->tx_de_emphasis_quirk;
                if (pdata->tx_de_emphasis)
                        tx_de_emphasis = pdata->tx_de_emphasis;
+
+               dwc->hsphy_interface = pdata->hsphy_interface;
        }
 
        /* default to superspeed if no maximum_speed passed */
@@ -875,12 +903,16 @@ static int dwc3_probe(struct platform_device *pdev)
        dwc->hird_threshold = hird_threshold
                | (dwc->is_utmi_l1_suspend << 4);
 
+       platform_set_drvdata(pdev, dwc);
+       dwc3_cache_hwparams(dwc);
+
+       dwc3_phy_setup(dwc);
+
        ret = dwc3_core_get_phy(dwc);
        if (ret)
                goto err0;
 
        spin_lock_init(&dwc->lock);
-       platform_set_drvdata(pdev, dwc);
 
        if (!dev->dma_mask) {
                dev->dma_mask = dev->parent->dma_mask;
@@ -892,8 +924,6 @@ static int dwc3_probe(struct platform_device *pdev)
        pm_runtime_get_sync(dev);
        pm_runtime_forbid(dev);
 
-       dwc3_cache_hwparams(dwc);
-
        ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
        if (ret) {
                dev_err(dwc->dev, "failed to allocate event buffers\n");