UPSTREAM: usb: dwc2: host: Add scheduler tracing

[firefly-linux-kernel-4.4.55.git] / drivers / usb / dwc2 / hcd.h

diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
index f105bada2fd13bddb7005a3a36936bd21a4cf5a5..809bc4ff9116cf83815a1d290d2e466a1f8d61d5 100644 (file)
--- a/drivers/usb/dwc2/hcd.h
+++ b/drivers/usb/dwc2/hcd.h
@@ -75,8 +75,6 @@ struct dwc2_qh;
  *                      (micro)frame
  * @xfer_buf:           Pointer to current transfer buffer position
  * @xfer_dma:           DMA address of xfer_buf
- * @align_buf:          In Buffer DMA mode this will be used if xfer_buf is not
- *                      DWORD aligned
  * @xfer_len:           Total number of bytes to transfer
  * @xfer_count:         Number of bytes transferred so far
  * @start_pkt_count:    Packet count at start of transfer
@@ -107,6 +105,8 @@ struct dwc2_qh;
  * @qh:                 QH for the transfer being processed by this channel
  * @hc_list_entry:      For linking to list of host channels
  * @desc_list_addr:     Current QH's descriptor list DMA address
+ * @desc_list_sz:       Current QH's descriptor list size
+ * @split_order_list_entry: List entry for keeping track of the order of splits
  *
  * This structure represents the state of a single host channel when acting in
  * host mode. It contains the data items needed to transfer packets to an
@@ -132,7 +132,6 @@ struct dwc2_host_chan {
 
        u8 *xfer_buf;
        dma_addr_t xfer_dma;
-       dma_addr_t align_buf;
        u32 xfer_len;
        u32 xfer_count;
        u16 start_pkt_count;
@@ -159,6 +158,8 @@ struct dwc2_host_chan {
        struct dwc2_qh *qh;
        struct list_head hc_list_entry;
        dma_addr_t desc_list_addr;
+       u32 desc_list_sz;
+       struct list_head split_order_list_entry;
 };
 
 struct dwc2_hcd_pipe_info {
@@ -241,16 +242,13 @@ enum dwc2_transaction_type {
  * @frame_usecs:        Internal variable used by the microframe scheduler
  * @start_split_frame:  (Micro)frame at which last start split was initialized
  * @ntd:                Actual number of transfer descriptors in a list
- * @dw_align_buf:       Used instead of original buffer if its physical address
- *                      is not dword-aligned
- * @dw_align_buf_size:  Size of dw_align_buf
- * @dw_align_buf_dma:   DMA address for dw_align_buf
  * @qtd_list:           List of QTDs for this QH
  * @channel:            Host channel currently processing transfers for this QH
  * @qh_list_entry:      Entry for QH in either the periodic or non-periodic
  *                      schedule
  * @desc_list:          List of transfer descriptors
  * @desc_list_dma:      Physical address of desc_list
+ * @desc_list_sz:       Size of descriptors list
  * @n_bytes:            Xfer Bytes array. Each element corresponds to a transfer
  *                      descriptor and indicates original XferSize value for the
  *                      descriptor
@@ -276,14 +274,12 @@ struct dwc2_qh {
        u16 frame_usecs[8];
        u16 start_split_frame;
        u16 ntd;
-       u8 *dw_align_buf;
-       int dw_align_buf_size;
-       dma_addr_t dw_align_buf_dma;
        struct list_head qtd_list;
        struct dwc2_host_chan *channel;
        struct list_head qh_list_entry;
        struct dwc2_hcd_dma_desc *desc_list;
        dma_addr_t desc_list_dma;
+       u32 desc_list_sz;
        u32 *n_bytes;
        unsigned tt_buffer_dirty:1;
 };
@@ -340,6 +336,8 @@ struct dwc2_qtd {
        u8 isoc_split_pos;
        u16 isoc_frame_index;
        u16 isoc_split_offset;
+       u16 isoc_td_last;
+       u16 isoc_td_first;
        u32 ssplit_out_xfer_count;
        u8 error_count;
        u8 n_desc;
@@ -377,18 +375,6 @@ static inline void disable_hc_int(struct dwc2_hsotg *hsotg, int chnum, u32 intr)
        dwc2_writel(mask, hsotg->regs + HCINTMSK(chnum));
 }
 
-/*
- * Returns the mode of operation, host or device
- */
-static inline int dwc2_is_host_mode(struct dwc2_hsotg *hsotg)
-{
-       return (dwc2_readl(hsotg->regs + GINTSTS) & GINTSTS_CURMODE_HOST) != 0;
-}
-static inline int dwc2_is_device_mode(struct dwc2_hsotg *hsotg)
-{
-       return (dwc2_readl(hsotg->regs + GINTSTS) & GINTSTS_CURMODE_HOST) == 0;
-}
-
 /*
  * Reads HPRT0 in preparation to modify. It keeps the WC bits 0 so that if they
  * are read as 1, they won't clear when written back.
@@ -534,6 +520,19 @@ static inline bool dbg_perio(void) { return false; }
 /* Packet size for any kind of endpoint descriptor */
 #define dwc2_max_packet(wmaxpacketsize) ((wmaxpacketsize) & 0x07ff)
 
+/*
+ * Returns true if frame1 index is greater than frame2 index. The comparison
+ * is done modulo FRLISTEN_64_SIZE. This accounts for the rollover of the
+ * frame number when the max index frame number is reached.
+ */
+static inline bool dwc2_frame_idx_num_gt(u16 fr_idx1, u16 fr_idx2)
+{
+       u16 diff = fr_idx1 - fr_idx2;
+       u16 sign = diff & (FRLISTEN_64_SIZE >> 1);
+
+       return diff && !sign;
+}
+
 /*
  * Returns true if frame1 is less than or equal to frame2. The comparison is
  * done modulo HFNUM_MAX_FRNUM. This accounts for the rollover of the
@@ -564,6 +563,11 @@ static inline u16 dwc2_frame_num_inc(u16 frame, u16 inc)
        return (frame + inc) & HFNUM_MAX_FRNUM;
 }
 
+static inline u16 dwc2_frame_num_dec(u16 frame, u16 dec)
+{
+       return (frame + HFNUM_MAX_FRNUM + 1 - dec) & HFNUM_MAX_FRNUM;
+}
+
 static inline u16 dwc2_full_frame_num(u16 frame)
 {
        return (frame & HFNUM_MAX_FRNUM) >> 3;