+ ctrl_val = readw(rk_phy->ctrl_base + CTRL_OFFSET);
+ ctrl_val |= CTRL_INTER_CLKEN;
+ writew(ctrl_val, rk_phy->ctrl_base + CTRL_OFFSET);
+ /* Wait max 20 ms */
+ while (!((ctrl_val = readw(rk_phy->ctrl_base + CTRL_OFFSET))
+ & CTRL_INTER_CLKRDY)) {
+ if (timeout == 0) {
+ pr_err("rockchip_emmc_phy_power_on: inter_clk not rdy\n");
+ return -EINVAL;
+ }
+ timeout--;
+ mdelay(1);
+ }
+ ctrl_val |= CTRL_INTER_CLKOUT;
+ writew(ctrl_val, rk_phy->ctrl_base + CTRL_OFFSET);
+