#define GET_VERSION_TC(ic, txt) (ODM_GetVersion_TC_##ic##txt())\r
#define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic,txt):GET_VERSION_TC(ic,txt))\r
\r
-\r
u1Byte\r
odm_QueryRxPwrPercentage(\r
IN s1Byte AntPower\r
IN s4Byte CurrSig \r
)\r
{ \r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
if( (pDM_Odm->SupportPlatform == ODM_WIN) && \r
(pDM_Odm->SupportInterface != ODM_ITRF_PCIE) && //USB & SDIO\r
(pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore\r
(pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo)\r
{\r
return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig);\r
- }\r
- else{ \r
+ }else\r
+#endif\r
+ { \r
return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig);\r
}\r
\r
\r
//DbgPrint("Value=%d\n", Value);\r
//ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x \n", ret_val, ret_val));\r
+ #ifdef ODM_EVM_ENHANCE_ANTDIV\r
\r
if(ret_val >= 0)\r
ret_val = 0;\r
+ if(ret_val <= -40)\r
+ ret_val = -40;\r
+\r
+ ret_val = 0 - ret_val;\r
+ ret_val*=3;\r
+\r
+ #else\r
+ if(ret_val >= 0)\r
+ ret_val = 0;\r
if(ret_val <= -33)\r
ret_val = -33;\r
\r
\r
if(ret_val == 99)\r
ret_val = 100;\r
+ #endif\r
\r
return(ret_val);\r
}\r
u1Byte LNA_idx, VGA_idx;\r
PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;\r
\r
- isCCKrate = (pPktinfo->DataRate <= DESC_RATE11M)?TRUE :FALSE;\r
+ isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M) ? TRUE : FALSE;\r
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;\r
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
\r
VGA_idx = (cck_agc_rpt & 0x1F); \r
if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E))\r
{\r
- switch(LNA_idx)\r
+ if(pDM_Odm->cck_agc_report_type == 0 && (pDM_Odm->SupportICType & ODM_RTL8192E) )\r
{\r
- case 7:\r
- if(VGA_idx <= 27)\r
- rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2\r
- else\r
+ switch(LNA_idx)\r
+ {\r
+ case 7:\r
+ rx_pwr_all = -45 - 2*(VGA_idx);\r
+ break;\r
+ case 6:\r
+ rx_pwr_all = -43 -2*(VGA_idx); \r
+ break;\r
+ case 5:\r
+ rx_pwr_all = -27 - 2*(VGA_idx); \r
+ break;\r
+ case 4:\r
+ rx_pwr_all = -21 - 2*(VGA_idx); \r
+ break;\r
+ case 3:\r
+ rx_pwr_all = -18 - 2*(VGA_idx); \r
+ break;\r
+ case 2:\r
+ rx_pwr_all = -6 - 2*(VGA_idx);\r
+ break;\r
+ case 1:\r
+ rx_pwr_all = 9 -2*(VGA_idx);\r
+ break;\r
+ case 0:\r
+ rx_pwr_all = 15 -2*(VGA_idx);\r
+ break;\r
+ default:\r
+\r
+ break;\r
+ }\r
+\r
+ if(pDM_Odm->BoardType & ODM_BOARD_EXT_LNA)\r
+ {\r
+ rx_pwr_all -= pDM_Odm->ExtLNAGain;\r
+ }\r
+ \r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+ }\r
+ else\r
+ { \r
+ switch(LNA_idx)\r
+ {\r
+ case 7:\r
+ if(VGA_idx <= 27)\r
+ rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2\r
+ else\r
rx_pwr_all = -100;\r
- break;\r
- case 6:\r
+ break;\r
+ case 6:\r
rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0\r
- break;\r
- case 5:\r
+ break;\r
+ case 5:\r
rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5\r
- break;\r
- case 4:\r
+ break;\r
+ case 4:\r
rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4\r
- break;\r
- case 3:\r
+ break;\r
+ case 3:\r
//rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
- break;\r
- case 2:\r
- if(cck_highpwr)\r
- rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0\r
- else\r
- rx_pwr_all = -6+ 2*(5-VGA_idx);\r
- break;\r
- case 1:\r
- rx_pwr_all = 8-2*VGA_idx;\r
- break;\r
- case 0:\r
+ break;\r
+ case 2:\r
+ if(cck_highpwr)\r
+ rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0\r
+ else\r
+ rx_pwr_all = -6+ 2*(5-VGA_idx);\r
+ break;\r
+ case 1:\r
+ rx_pwr_all = 8-2*VGA_idx;\r
+ break;\r
+ case 0:\r
rx_pwr_all = 14-2*VGA_idx;\r
- break;\r
- default:\r
- //DbgPrint("CCK Exception default\n");\r
- break;\r
- }\r
- rx_pwr_all += 6;\r
+ break;\r
+ default:\r
+ //DbgPrint("CCK Exception default\n");\r
+ break;\r
+ }\r
+ rx_pwr_all += 8;\r
\r
- //2012.10.08 LukeLee: Modify for 92E CCK RSSI\r
- if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
- rx_pwr_all += 10;\r
+ //2012.10.08 LukeLee: Modify for 92E CCK RSSI\r
+ if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
+ rx_pwr_all += 8;\r
\r
- PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
- if(cck_highpwr == FALSE)\r
- {\r
- if(PWDB_ALL >= 80)\r
- PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;\r
- else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
- PWDB_ALL += 3;\r
- if(PWDB_ALL>100)\r
- PWDB_ALL = 100;\r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+ if(cck_highpwr == FALSE)\r
+ {\r
+ if(PWDB_ALL >= 80)\r
+ PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;\r
+ else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
+ PWDB_ALL += 3;\r
+ if(PWDB_ALL>100)\r
+ PWDB_ALL = 100;\r
+ }\r
}\r
}\r
else if(pDM_Odm->SupportICType & (ODM_RTL8723B))\r
{\r
u1Byte SQ,SQ_rpt; \r
\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) \r
if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
(pDM_Odm->PatchID==RT_CID_819x_Lenovo)){\r
SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
- }\r
- else if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
+ }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
(pDM_Odm->PatchID==RT_CID_819x_Acer))\r
{\r
SQ = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
- }\r
- else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){\r
+ }else \r
+#endif\r
+ if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){\r
SQ = 100;\r
}\r
else{ \r
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
}\r
}\r
- else //is OFDM rate\r
+ else //2 is OFDM rate\r
{\r
pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
\r
\r
rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110;\r
\r
-\r
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
pPhyInfo->RxPwr[i] = rx_pwr[i];\r
#endif \r
total_rssi += RSSI;\r
//RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));\r
\r
- //Modification for ext-LNA board\r
+\r
if(pDM_Odm->SupportICType&ODM_RTL8192C)\r
{ \r
+ //Modification for ext-LNA board \r
if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))\r
{\r
if((pPhyStaRpt->path_agc[i].trsw) == 1)\r
\r
pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;\r
\r
- #if (DM_ODM_SUPPORT_TYPE & (/*ODM_WIN|*/ODM_CE|ODM_AP|ODM_ADSL))\r
+ #if (DM_ODM_SUPPORT_TYPE & (/*ODM_WIN|*/ODM_CE|ODM_AP))\r
//Get Rx snr value in DB \r
pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2);\r
#endif\r
/* Record Signal Strength for next packet */\r
//if(pPktinfo->bPacketMatchBSSID)\r
{ \r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) \r
if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
(pDM_Odm->PatchID==RT_CID_819x_Lenovo))\r
{\r
{\r
pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,RSSI);\r
} \r
- \r
+#endif \r
}\r
}\r
\r
rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110; \r
\r
PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); \r
- //RT_DISP(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n",PWDB_ALL)); \r
+ \r
\r
pPhyInfo->RxPWDBAll = PWDB_ALL;\r
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));\r
//\r
// (3)EVM of HT rate\r
//\r
- if(pPktinfo->DataRate >=DESC_RATEMCS8 && pPktinfo->DataRate <=DESC_RATEMCS15)\r
+ if(pPktinfo->DataRate >=ODM_RATEMCS8 && pPktinfo->DataRate <=ODM_RATEMCS15)\r
Max_spatial_stream = 2; //both spatial stream make sense\r
else\r
Max_spatial_stream = 1; //only spatial stream 1 makes sense\r
// value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. \r
EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] )); //dbm\r
\r
- //RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", \r
//GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM));\r
\r
//if(pPktinfo->bPacketMatchBSSID)\r
{ \r
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
// 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ \r
+ if(pDM_Odm->PatchID == RT_CID_819x_Acer)\r
+ {\r
+ if(IS_HARDWARE_TYPE_8723BE(pDM_Odm->Adapter))\r
+ pPhyInfo->SignalStrength = (u1Byte) (PWDB_ALL - 4);\r
+ else if(IS_HARDWARE_TYPE_8188EE(pDM_Odm->Adapter))\r
+ pPhyInfo->SignalStrength = (u1Byte) (PWDB_ALL + 6);\r
+ else\r
+ pPhyInfo->SignalStrength = (u1Byte) (PWDB_ALL - 4);\r
+ }\r
+ else\r
pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL;\r
#else\r
-#ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING\r
+ #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING\r
pPhyInfo->SignalStrength = (u1Byte)PWDB_ALL;\r
-#else\r
+ #else\r
pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL;\r
-#endif\r
-#endif\r
+ #endif\r
+#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/\r
}\r
else\r
{ \r
if (rf_rx_num != 0)\r
{ \r
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
// 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ \r
- pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL;\r
-#else\r
-#ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING\r
+ if(pDM_Odm->PatchID == RT_CID_819x_Acer)\r
+ pPhyInfo->SignalStrength = (u1Byte) (total_rssi/=rf_rx_num);\r
+ else\r
+ pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));/*PWDB*/\r
+ #else\r
+ #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING\r
total_rssi/=rf_rx_num;\r
pPhyInfo->SignalStrength = (u1Byte)total_rssi;\r
-#else\r
+ #else\r
pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num));\r
-#endif\r
-#endif\r
+ #endif\r
+ #endif\r
}\r
}\r
-#endif\r
+#endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))*/\r
\r
//DbgPrint("isCCKrate = %d, pPhyInfo->RxPWDBAll = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", \r
//isCCKrate, pPhyInfo->RxPWDBAll, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a);\r
}\r
#endif\r
\r
-\r
#if ODM_IC_11AC_SERIES_SUPPORT\r
\r
VOID\r
-odm_RxPhyStatusJaguarSeries_Parsing(\r
- IN OUT PDM_ODM_T pDM_Odm,\r
- OUT PODM_PHY_INFO_T pPhyInfo, \r
- IN pu1Byte pPhyStatus,\r
- IN PODM_PACKET_INFO_T pPktinfo\r
- )\r
-{ \r
- u1Byte i, Max_spatial_stream;\r
- s1Byte rx_pwr[4], rx_pwr_all=0;\r
- u1Byte EVM = 0, EVMdbm, PWDB_ALL = 0, PWDB_ALL_BT;\r
- u1Byte RSSI, total_rssi=0;\r
- u1Byte isCCKrate=0; \r
- u1Byte rf_rx_num = 0;\r
- u1Byte cck_highpwr = 0;\r
- u1Byte LNA_idx, VGA_idx;\r
-\r
- \r
- PPHY_STATUS_RPT_8812_T pPhyStaRpt = (PPHY_STATUS_RPT_8812_T)pPhyStatus; \r
-\r
- if(pPktinfo->DataRate <= DESC_RATE54M)\r
- {\r
- switch(pPhyStaRpt->r_RFMOD){\r
- case 1:\r
- if(pPhyStaRpt->sub_chnl == 0)\r
- pPhyInfo->BandWidth = 1;\r
- else\r
- pPhyInfo->BandWidth = 0;\r
- break;\r
+odm_RxPhyBWJaguarSeries_Parsing(\r
+ OUT PODM_PHY_INFO_T pPhyInfo,\r
+ IN PODM_PACKET_INFO_T pPktinfo,\r
+ IN PPHY_STATUS_RPT_8812_T pPhyStaRpt\r
+)\r
+{\r
\r
- case 2:\r
- if(pPhyStaRpt->sub_chnl == 0)\r
- pPhyInfo->BandWidth = 2;\r
- else if(pPhyStaRpt->sub_chnl == 9 || pPhyStaRpt->sub_chnl == 10)\r
- pPhyInfo->BandWidth = 1;\r
- else \r
- pPhyInfo->BandWidth = 0;\r
- break;\r
+ if(pPktinfo->DataRate <= ODM_RATE54M) {\r
+ switch (pPhyStaRpt->r_RFMOD) {\r
+ case 1:\r
+ if (pPhyStaRpt->sub_chnl == 0)\r
+ pPhyInfo->BandWidth = 1;\r
+ else\r
+ pPhyInfo->BandWidth = 0;\r
+ break;\r
\r
- default: case 0:\r
+ case 2:\r
+ if (pPhyStaRpt->sub_chnl == 0)\r
+ pPhyInfo->BandWidth = 2;\r
+ else if (pPhyStaRpt->sub_chnl == 9 || pPhyStaRpt->sub_chnl == 10)\r
+ pPhyInfo->BandWidth = 1;\r
+ else\r
pPhyInfo->BandWidth = 0;\r
- break; \r
- } \r
+ break;\r
+\r
+ default:\r
+ case 0:\r
+ pPhyInfo->BandWidth = 0;\r
+ break;\r
+ }\r
}\r
\r
- if(pPktinfo->DataRate <= DESC_RATE11M)\r
+}\r
+\r
+VOID\r
+odm_RxPhyStatusJaguarSeries_Parsing(\r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ OUT PODM_PHY_INFO_T pPhyInfo,\r
+ IN pu1Byte pPhyStatus,\r
+ IN PODM_PACKET_INFO_T pPktinfo\r
+)\r
+{\r
+ u1Byte i, Max_spatial_stream;\r
+ s1Byte rx_pwr[4], rx_pwr_all = 0;\r
+ u1Byte EVM, EVMdbm, PWDB_ALL = 0, PWDB_ALL_BT;\r
+ u1Byte RSSI, total_rssi = 0;\r
+ u1Byte isCCKrate = 0;\r
+ u1Byte rf_rx_num = 0;\r
+ u1Byte cck_highpwr = 0;\r
+ u1Byte LNA_idx, VGA_idx;\r
+ PPHY_STATUS_RPT_8812_T pPhyStaRpt = (PPHY_STATUS_RPT_8812_T)pPhyStatus;\r
+\r
+ if (pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821)\r
+ odm_RxPhyBWJaguarSeries_Parsing(pPhyInfo, pPktinfo, pPhyStaRpt);\r
+\r
+ if (pPktinfo->DataRate <= ODM_RATE11M)\r
isCCKrate = TRUE;\r
else\r
isCCKrate = FALSE;\r
- \r
+\r
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;\r
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_C] = -1;\r
+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_D] = -1;\r
\r
-\r
- if(isCCKrate)\r
- {\r
+ if (isCCKrate) {\r
u1Byte cck_agc_rpt;\r
pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;\r
- // \r
- // (1)Hardware does not provide RSSI for CCK\r
- // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
- //\r
\r
- //if(pHalData->eRFPowerState == eRfOn)\r
- cck_highpwr = pDM_Odm->bCckHighPower;\r
- //else\r
- // cck_highpwr = FALSE;\r
+ /*(1)Hardware does not provide RSSI for CCK*/\r
+ /*(2)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/\r
+\r
+ /*if(pHalData->eRFPowerState == eRfOn)*/\r
+ cck_highpwr = pDM_Odm->bCckHighPower;\r
+ /*else*/\r
+ /*cck_highpwr = FALSE;*/\r
\r
cck_agc_rpt = pPhyStaRpt->cfosho[0] ;\r
- LNA_idx = ((cck_agc_rpt & 0xE0) >>5);\r
- VGA_idx = (cck_agc_rpt & 0x1F); \r
- \r
- if(pDM_Odm->SupportICType == ODM_RTL8812)\r
- {\r
- switch(LNA_idx)\r
- {\r
- case 7:\r
- if(VGA_idx <= 27)\r
- rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2\r
- else\r
- rx_pwr_all = -100;\r
- break;\r
- case 6:\r
- rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0\r
- break;\r
- case 5:\r
- rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5\r
- break;\r
- case 4:\r
- rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4\r
- break;\r
- case 3:\r
- //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
- rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
- break;\r
- case 2:\r
- if(cck_highpwr)\r
- rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0\r
- else\r
- rx_pwr_all = -6+ 2*(5-VGA_idx);\r
- break;\r
- case 1:\r
- rx_pwr_all = 8-2*VGA_idx;\r
- break;\r
- case 0:\r
- rx_pwr_all = 14-2*VGA_idx;\r
- break;\r
- default:\r
- //DbgPrint("CCK Exception default\n");\r
- break;\r
+ LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);\r
+ VGA_idx = (cck_agc_rpt & 0x1F);\r
+\r
+ if (pDM_Odm->SupportICType == ODM_RTL8812) {\r
+ switch (LNA_idx) {\r
+ case 7:\r
+ if (VGA_idx <= 27)\r
+ rx_pwr_all = -100 + 2 * (27 - VGA_idx); /*VGA_idx = 27~2*/\r
+ else\r
+ rx_pwr_all = -100;\r
+ break;\r
+ case 6:\r
+ rx_pwr_all = -48 + 2 * (2 - VGA_idx); /*VGA_idx = 2~0*/\r
+ break;\r
+ case 5:\r
+ rx_pwr_all = -42 + 2 * (7 - VGA_idx); /*VGA_idx = 7~5*/\r
+ break;\r
+ case 4:\r
+ rx_pwr_all = -36 + 2 * (7 - VGA_idx); /*VGA_idx = 7~4*/\r
+ break;\r
+ case 3:\r
+ /*rx_pwr_all = -28 + 2*(7-VGA_idx); VGA_idx = 7~0*/\r
+ rx_pwr_all = -24 + 2 * (7 - VGA_idx); /*VGA_idx = 7~0*/\r
+ break;\r
+ case 2:\r
+ if (cck_highpwr)\r
+ rx_pwr_all = -12 + 2 * (5 - VGA_idx); /*VGA_idx = 5~0*/\r
+ else\r
+ rx_pwr_all = -6 + 2 * (5 - VGA_idx);\r
+ break;\r
+ case 1:\r
+ rx_pwr_all = 8 - 2 * VGA_idx;\r
+ break;\r
+ case 0:\r
+ rx_pwr_all = 14 - 2 * VGA_idx;\r
+ break;\r
+ default:\r
+ /*DbgPrint("CCK Exception default\n");*/\r
+ break;\r
}\r
rx_pwr_all += 6;\r
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
- \r
- if(cck_highpwr == FALSE)\r
- {\r
- if(PWDB_ALL >= 80)\r
- PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;\r
- else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
+\r
+ if (cck_highpwr == FALSE) {\r
+ if (PWDB_ALL >= 80)\r
+ PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80;\r
+ else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
PWDB_ALL += 3;\r
- if(PWDB_ALL>100)\r
+ if (PWDB_ALL > 100)\r
PWDB_ALL = 100;\r
}\r
- }\r
- else if(pDM_Odm->SupportICType == ODM_RTL8821)\r
- {\r
+ } else if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8881A)) {\r
s1Byte Pout = -6;\r
- \r
- switch(LNA_idx)\r
- {\r
- case 5:\r
- rx_pwr_all = Pout -32 -(2*VGA_idx);\r
- break;\r
- case 4:\r
- rx_pwr_all = Pout -24 -(2*VGA_idx);\r
- break;\r
- case 2:\r
- rx_pwr_all = Pout -11 -(2*VGA_idx);\r
- break;\r
- case 1:\r
- rx_pwr_all = Pout + 5 -(2*VGA_idx);\r
- break;\r
- case 0:\r
- rx_pwr_all = Pout + 21 -(2*VGA_idx);\r
- break;\r
- }\r
+\r
+ switch (LNA_idx) {\r
+ case 5:\r
+ rx_pwr_all = Pout - 32 - (2 * VGA_idx);\r
+ break;\r
+ case 4:\r
+ rx_pwr_all = Pout - 24 - (2 * VGA_idx);\r
+ break;\r
+ case 2:\r
+ rx_pwr_all = Pout - 11 - (2 * VGA_idx);\r
+ break;\r
+ case 1:\r
+ rx_pwr_all = Pout + 5 - (2 * VGA_idx);\r
+ break;\r
+ case 0:\r
+ rx_pwr_all = Pout + 21 - (2 * VGA_idx);\r
+ break;\r
+ }\r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+ } else if (pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8822B) {\r
+ s1Byte Pout = -6;\r
+\r
+ switch (LNA_idx) {\r
+ /*CCK only use LNA: 2, 3, 5, 7*/\r
+ case 7:\r
+ rx_pwr_all = Pout - 32 - (2 * VGA_idx);\r
+ break;\r
+ case 5:\r
+ rx_pwr_all = Pout - 22 - (2 * VGA_idx);\r
+ break;\r
+ case 3:\r
+ rx_pwr_all = Pout - 2 - (2 * VGA_idx);\r
+ break;\r
+ case 2:\r
+ rx_pwr_all = Pout + 5 - (2 * VGA_idx);\r
+ break;\r
+ /*case 6:*/\r
+ /*rx_pwr_all = Pout -26 - (2*VGA_idx);*/\r
+ /*break;*/\r
+ /*case 4:*/\r
+ /*rx_pwr_all = Pout - 8 - (2*VGA_idx);*/\r
+ /*break;*/\r
+ /*case 1:*/\r
+ /*rx_pwr_all = Pout + 21 - (2*VGA_idx);*/\r
+ /*break;*/\r
+ /*case 0:*/\r
+ /*rx_pwr_all = Pout + 10 - (2*VGA_idx);*/\r
+/* // break;*/\r
+ default:\r
+/* //DbgPrint("CCK Exception default\n");*/\r
+ break;\r
+ }\r
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
}\r
- \r
+\r
pPhyInfo->RxPWDBAll = PWDB_ALL;\r
- //if(pPktinfo->StationID == 0)\r
- //{\r
- // DbgPrint("CCK: LNA_idx = %d, VGA_idx = %d, pPhyInfo->RxPWDBAll = %d\n", \r
- // LNA_idx, VGA_idx, pPhyInfo->RxPWDBAll);\r
- //}\r
+/* //if(pPktinfo->StationID == 0)*/\r
+/* //{*/\r
+/* // DbgPrint("CCK: LNA_idx = %d, VGA_idx = %d, pPhyInfo->RxPWDBAll = %d\n",*/\r
+/* // LNA_idx, VGA_idx, pPhyInfo->RxPWDBAll);*/\r
+/* //}*/\r
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;\r
pPhyInfo->RecvSignalPower = rx_pwr_all;\r
-#endif \r
- //\r
- // (3) Get Signal Quality (EVM)\r
- //\r
- //if(pPktinfo->bPacketMatchBSSID)\r
- {\r
- u1Byte SQ,SQ_rpt; \r
- \r
- if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
- (pDM_Odm->PatchID==RT_CID_819x_Lenovo))\r
- {\r
- SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
- }\r
- else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest)\r
- {\r
+#endif\r
+ /*(3) Get Signal Quality (EVM)*/\r
+ if (pPktinfo->bPacketMatchBSSID) {\r
+ u1Byte SQ, SQ_rpt;\r
+\r
+ if ((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
+ (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) {\r
+ SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, 0, 0);\r
+ } else if (pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest) {\r
SQ = 100;\r
- }\r
- else\r
- { \r
+ } else {\r
SQ_rpt = pPhyStaRpt->pwdb_all;\r
- \r
- if(SQ_rpt > 64)\r
+\r
+ if (SQ_rpt > 64)\r
SQ = 0;\r
else if (SQ_rpt < 20)\r
SQ = 100;\r
else\r
- SQ = ((64-SQ_rpt) * 100) / 44;\r
- \r
+ SQ = ((64 - SQ_rpt) * 100) / 44;\r
}\r
- \r
- //DbgPrint("cck SQ = %d\n", SQ);\r
+\r
+/* //DbgPrint("cck SQ = %d\n", SQ);*/\r
pPhyInfo->SignalQuality = SQ;\r
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;\r
- pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
}\r
- }\r
- else //is OFDM rate\r
- {\r
+ } else {\r
+ /*is OFDM rate*/\r
pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
\r
- // \r
- // (1)Get RSSI for OFDM rate\r
- //\r
- \r
- for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) \r
- {\r
- // 2008/01/30 MH we will judge RF RX path now.\r
- //DbgPrint("pDM_Odm->RFPathRxEnable = %x\n", pDM_Odm->RFPathRxEnable);\r
+ /*(1)Get RSSI for OFDM rate*/\r
+\r
+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {\r
+ /*2008/01/30 MH we will judge RF RX path now.*/\r
+/* //DbgPrint("pDM_Odm->RFPathRxEnable = %x\n", pDM_Odm->RFPathRxEnable);*/\r
if (pDM_Odm->RFPathRxEnable & BIT(i))\r
- { \r
rf_rx_num++;\r
- }\r
- //else\r
- //continue;\r
- //2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip\r
- //if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))\r
- rx_pwr[i] = (pPhyStaRpt->gain_trsw[i]&0x7F) - 110;\r
- //else\r
- // rx_pwr[i] = ((pPhyStaRpt->gain_trsw[i]& 0x3F)*2) - 110; //OLD FORMULA\r
+/* //else*/\r
+/* //continue;*/\r
+ /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/\r
+/* //if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))*/\r
+ if (i < ODM_RF_PATH_C)\r
+ rx_pwr[i] = (pPhyStaRpt->gain_trsw[i] & 0x7F) - 110;\r
+ else\r
+ rx_pwr[i] = (pPhyStaRpt->gain_trsw_cd[i - 2] & 0x7F) - 110;\r
+/* //else*/\r
+ /*rx_pwr[i] = ((pPhyStaRpt->gain_trsw[i]& 0x3F)*2) - 110; OLD FORMULA*/\r
\r
- #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
pPhyInfo->RxPwr[i] = rx_pwr[i];\r
- #endif \r
+#endif\r
\r
/* Translate DBM to percentage. */\r
- RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); \r
- \r
+ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);\r
+\r
total_rssi += RSSI;\r
- //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));\r
+/* //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));*/\r
\r
+ pPhyInfo->RxMIMOSignalStrength[i] = (u1Byte) RSSI;\r
\r
- \r
- pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;\r
\r
- #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE|ODM_AP|ODM_ADSL))\r
- //Get Rx snr value in DB \r
- pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->rxsnr[i]/2;\r
- #endif\r
+ /*Get Rx snr value in DB*/\r
+ if (i < ODM_RF_PATH_C)\r
+ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->rxsnr[i] / 2;\r
+ else if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B))\r
+ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->csi_current[i - 2] / 2;\r
\r
- //\r
- // (2) CFO_short & CFO_tail\r
- // \r
- pPhyInfo->Cfo_short[i] = odm_Cfo( (pPhyStaRpt->cfosho[i]) );\r
- pPhyInfo->Cfo_tail[i] = odm_Cfo( (pPhyStaRpt->cfotail[i]) );\r
+\r
+ /*(2) CFO_short & CFO_tail*/\r
+ if (i < ODM_RF_PATH_C) {\r
+ pPhyInfo->Cfo_short[i] = odm_Cfo((pPhyStaRpt->cfosho[i]));\r
+ pPhyInfo->Cfo_tail[i] = odm_Cfo((pPhyStaRpt->cfotail[i]));\r
+ }\r
\r
/* Record Signal Strength for next packet */\r
- //if(pPktinfo->bPacketMatchBSSID)\r
- { \r
- if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
- (pDM_Odm->PatchID==RT_CID_819x_Lenovo))\r
- {\r
- if(i==ODM_RF_PATH_A)\r
- pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI);\r
- \r
+ if (pPktinfo->bPacketMatchBSSID) {\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ if ((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
+ (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) {\r
+ if (i == ODM_RF_PATH_A)\r
+ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, i, RSSI);\r
+\r
}\r
+#endif\r
}\r
}\r
- \r
- \r
- //\r
- // (3)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
- //\r
- //2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip\r
- if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))\r
- rx_pwr_all = (pPhyStaRpt->pwdb_all& 0x7f) -110;\r
+\r
+ /*(3)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/\r
+\r
+ /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/\r
+ if ((pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) && (!pDM_Odm->bIsMPChip))\r
+ rx_pwr_all = (pPhyStaRpt->pwdb_all & 0x7f) - 110;\r
else\r
- rx_pwr_all = (((pPhyStaRpt->pwdb_all) >> 1 )& 0x7f) -110; //OLD FORMULA\r
+ rx_pwr_all = (((pPhyStaRpt->pwdb_all) >> 1) & 0x7f) - 110; /*OLD FORMULA*/\r
+\r
+ PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
\r
- PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); \r
- \r
pPhyInfo->RxPWDBAll = PWDB_ALL;\r
- //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));\r
- #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));*/\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;\r
pPhyInfo->RxPower = rx_pwr_all;\r
pPhyInfo->RecvSignalPower = rx_pwr_all;\r
- #endif\r
+#endif\r
\r
- //DbgPrint("OFDM: pPhyInfo->RxPWDBAll = %d, pPhyInfo->RxMIMOSignalStrength[0] = %d, pPhyInfo->RxMIMOSignalStrength[1] = %d\n",\r
- // pPhyInfo->RxPWDBAll, pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1]);\r
- \r
- \r
- if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19))\r
- {\r
- //do nothing \r
- }\r
- else\r
- { //pMgntInfo->CustomerID != RT_CID_819x_Lenovo\r
- //\r
- // (4)EVM of OFDM rate\r
- //\r
- if( (pPktinfo->DataRate>=DESC_RATEMCS8) &&\r
- (pPktinfo->DataRate <=DESC_RATEMCS15))\r
- Max_spatial_stream = 2;\r
- else if( (pPktinfo->DataRate>=DESC_RATEVHTSS2MCS0) &&\r
- (pPktinfo->DataRate <=DESC_RATEVHTSS2MCS9))\r
- Max_spatial_stream = 2;\r
+ if ((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID == 19)) {\r
+ /*do nothing*/\r
+ } else {\r
+ /*pMgntInfo->CustomerID != RT_CID_819x_Lenovo*/\r
+\r
+ /*(4)EVM of OFDM rate*/\r
+ \r
+ if ((pPktinfo->DataRate >= ODM_RATEMCS8) &&\r
+ (pPktinfo->DataRate <= ODM_RATEMCS15))\r
+ Max_spatial_stream = 2;\r
+ else if ((pPktinfo->DataRate >= ODM_RATEVHTSS2MCS0) &&\r
+ (pPktinfo->DataRate <= ODM_RATEVHTSS2MCS9))\r
+ Max_spatial_stream = 2;\r
+ else if ((pPktinfo->DataRate >= ODM_RATEMCS16) &&\r
+ (pPktinfo->DataRate <= ODM_RATEMCS23))\r
+ Max_spatial_stream = 3;\r
+ else if ((pPktinfo->DataRate >= ODM_RATEVHTSS3MCS0) &&\r
+ (pPktinfo->DataRate <= ODM_RATEVHTSS3MCS9))\r
+ Max_spatial_stream = 3;\r
else\r
- Max_spatial_stream = 1; \r
+ Max_spatial_stream = 1;\r
\r
- //if(pPktinfo->bPacketMatchBSSID)\r
- {\r
- //DbgPrint("pPktinfo->DataRate = %d\n", pPktinfo->DataRate);\r
+ if (pPktinfo->bPacketMatchBSSID) {\r
+ /*DbgPrint("pPktinfo->DataRate = %d\n", pPktinfo->DataRate);*/\r
\r
- for(i=0; i<Max_spatial_stream; i++)\r
- {\r
- // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment\r
- // fill most significant bit to "zero" when doing shifting operation which may change a negative \r
- // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. \r
- //\r
- // 2013/09/02 MH According to 8812AU test, when use RX evm the value sometimes\r
- // will be incorrect and 1SS-MCS-0-7 always incorrect. Only use LSIG the evm value\r
- // seems ok. This seems BB bug, we need use another way to display better SQ.\r
- //\r
- //if (pPktinfo->DataRate>=DESC8812_RATE6M && pPktinfo->DataRate<=DESC8812_RATE54M)\r
- {\r
- \r
- if(i==ODM_RF_PATH_A )\r
- {\r
- EVM = odm_EVMdbToPercentage( (pPhyStaRpt->sigevm )); //dbm\r
+ for (i = 0; i < Max_spatial_stream; i++) {\r
+ /*Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment*/\r
+ /*fill most significant bit to "zero" when doing shifting operation which may change a negative*/\r
+ /*value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.*/\r
+\r
+ if (pPktinfo->DataRate >= DESC_RATE6M && pPktinfo->DataRate <= DESC_RATE54M) {\r
+ if (i == ODM_RF_PATH_A) {\r
+ EVM = odm_EVMdbToPercentage((pPhyStaRpt->sigevm)); /*dbm*/\r
EVM += 20;\r
if (EVM > 100)\r
EVM = 100;\r
}\r
- }\r
-#if 0\r
- else\r
- {\r
- if (pPhyStaRpt->rxevm[i] == -128)\r
- {\r
- pPhyStaRpt->rxevm[i] = -25;\r
+ } else {\r
+ if (i < ODM_RF_PATH_C) {\r
+ if (pPhyStaRpt->rxevm[i] == -128)\r
+ pPhyStaRpt->rxevm[i] = -25;\r
+ EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm[i])); /*dbm*/\r
+ } else {\r
+ if (pPhyStaRpt->rxevm_cd[i - 2] == -128){\r
+ pPhyStaRpt->rxevm_cd[i - 2] = -25;\r
+ }\r
+ EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm_cd[i - 2])); /*dbm*/\r
}\r
- EVM = odm_EVMdbToPercentage( (pPhyStaRpt->rxevm[i] )); //dbm\r
}\r
-#endif\r
- EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm[i]);\r
- //RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", \r
- //pPktinfo->DataRate, pPhyStaRpt->rxevm[i], "%", EVM));\r
- \r
+\r
+ if (i < ODM_RF_PATH_C)\r
+ EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm[i]);\r
+ else\r
+ EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm_cd[i - 2]);\r
+ /*RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",*/\r
+ /*pPktinfo->DataRate, pPhyStaRpt->rxevm[i], "%", EVM));*/\r
+\r
{\r
- if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only\r
- {\r
+ if (i == ODM_RF_PATH_A) { \r
+ /*Fill value in RFD, Get the first spatial stream only*/\r
pPhyInfo->SignalQuality = EVM;\r
- } \r
+ }\r
pPhyInfo->RxMIMOSignalQuality[i] = EVM;\r
pPhyInfo->RxMIMOEVMdbm[i] = EVMdbm;\r
}\r
}\r
\r
ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->cfotail);\r
- \r
+\r
}\r
- //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num);\r
- \r
+/* //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num);*/\r
+\r
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
- //UI BSS List signal strength(in percentage), make it good looking, from 0~100.\r
- //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().\r
- if(isCCKrate)\r
- { \r
+ /*UI BSS List signal strength(in percentage), make it good looking, from 0~100.*/\r
+ /*It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().*/\r
+ if (isCCKrate) {\r
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
- // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ \r
- pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL;\r
+ /*2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/\r
+ pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));/*PWDB_ALL;*/\r
#else\r
- pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL;\r
+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/*PWDB_ALL;*/\r
#endif\r
- }\r
- else\r
- { \r
- if (rf_rx_num != 0)\r
- { \r
+ } else {\r
+ if (rf_rx_num != 0) {\r
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
- // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ \r
- pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL;\r
+ /*2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/\r
+ pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi /= rf_rx_num)); /*PWDB_ALL;*/\r
#else\r
- pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num));\r
+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi /= rf_rx_num));\r
#endif\r
}\r
}\r
#endif\r
pDM_Odm->RxPWDBAve = pDM_Odm->RxPWDBAve + pPhyInfo->RxPWDBAll;\r
- \r
+\r
pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->antidx_anta;\r
pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->antidx_antb;\r
-\r
- //DbgPrint("pPhyStaRpt->antidx_anta = %d, pPhyStaRpt->antidx_antb = %d, pPhyStaRpt->resvd_1 = %d", \r
- // pPhyStaRpt->antidx_anta, pPhyStaRpt->antidx_antb, pPhyStaRpt->resvd_1);\r
-\r
- //DbgPrint("----------------------------\n");\r
- //DbgPrint("pPktinfo->StationID=%d, pPktinfo->DataRate=0x%x\n",pPktinfo->StationID, pPktinfo->DataRate);\r
- //DbgPrint("pPhyStaRpt->gain_trsw[0]=0x%x, pPhyStaRpt->gain_trsw[1]=0x%x, pPhyStaRpt->pwdb_all=0x%x\n",\r
- // pPhyStaRpt->gain_trsw[0],pPhyStaRpt->gain_trsw[1], pPhyStaRpt->pwdb_all);\r
- //DbgPrint("pPhyInfo->RxMIMOSignalStrength[0]=%d, pPhyInfo->RxMIMOSignalStrength[1]=%d, RxPWDBAll=%d\n",\r
- // pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1], pPhyInfo->RxPWDBAll);\r
+ pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antidx_antc;\r
+ pDM_Odm->DM_FatTable.antsel_rx_keep_3 = pPhyStaRpt->antidx_antd;\r
+\r
+\r
+/* DbgPrint("pPhyStaRpt->antidx_anta = %d, pPhyStaRpt->antidx_antb = %d\n",*/\r
+/* pPhyStaRpt->antidx_anta, pPhyStaRpt->antidx_antb);*/\r
+/* DbgPrint("----------------------------\n");*/\r
+/* DbgPrint("pPktinfo->StationID=%d, pPktinfo->DataRate=0x%x\n",pPktinfo->StationID, pPktinfo->DataRate);*/\r
+/* DbgPrint("pPhyStaRpt->r_RFMOD = %d\n", pPhyStaRpt->r_RFMOD);*/\r
+/* DbgPrint("pPhyStaRpt->gain_trsw[0]=0x%x, pPhyStaRpt->gain_trsw[1]=0x%x\n",*/\r
+/* pPhyStaRpt->gain_trsw[0],pPhyStaRpt->gain_trsw[1]);*/\r
+/* DbgPrint("pPhyStaRpt->gain_trsw[2]=0x%x, pPhyStaRpt->gain_trsw[3]=0x%x\n",*/\r
+/* pPhyStaRpt->gain_trsw_cd[0],pPhyStaRpt->gain_trsw_cd[1]);*/\r
+/* DbgPrint("pPhyStaRpt->pwdb_all = 0x%x, pPhyInfo->RxPWDBAll = %d\n", pPhyStaRpt->pwdb_all, pPhyInfo->RxPWDBAll);*/\r
+/* DbgPrint("pPhyStaRpt->cfotail[i] = 0x%x, pPhyStaRpt->CFO_tail[i] = 0x%x\n", pPhyStaRpt->cfotail[0], pPhyStaRpt->cfotail[1]);*/\r
+/* DbgPrint("pPhyStaRpt->rxevm[0] = %d, pPhyStaRpt->rxevm[1] = %d\n", pPhyStaRpt->rxevm[0], pPhyStaRpt->rxevm[1]);*/\r
+/* DbgPrint("pPhyStaRpt->rxevm[2] = %d, pPhyStaRpt->rxevm[3] = %d\n", pPhyStaRpt->rxevm_cd[0], pPhyStaRpt->rxevm_cd[1]);*/\r
+/* DbgPrint("pPhyInfo->RxMIMOSignalStrength[0]=%d, pPhyInfo->RxMIMOSignalStrength[1]=%d, RxPWDBAll=%d\n",*/\r
+/* pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1], pPhyInfo->RxPWDBAll);*/\r
+/* DbgPrint("pPhyInfo->RxMIMOSignalStrength[2]=%d, pPhyInfo->RxMIMOSignalStrength[3]=%d\n",*/\r
+/* pPhyInfo->RxMIMOSignalStrength[2], pPhyInfo->RxMIMOSignalStrength[3]);*/\r
+/* DbgPrint("ppPhyInfo->RxMIMOSignalQuality[0]=%d, pPhyInfo->RxMIMOSignalQuality[1]=%d\n",*/\r
+/* pPhyInfo->RxMIMOSignalQuality[0], pPhyInfo->RxMIMOSignalQuality[1]);*/\r
+/* DbgPrint("ppPhyInfo->RxMIMOSignalQuality[2]=%d, pPhyInfo->RxMIMOSignalQuality[3]=%d\n",*/\r
+/* pPhyInfo->RxMIMOSignalQuality[2], pPhyInfo->RxMIMOSignalQuality[3]);*/\r
\r
}\r
\r
u4Byte Weighting=0;\r
PSTA_INFO_T pEntry;\r
\r
- if(pPktinfo->StationID == 0xFF)\r
+ if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM)\r
return;\r
\r
#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1)\r
if(pPktinfo->bPacketBeacon)\r
pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++;\r
\r
- isCCKrate = (pPktinfo->DataRate <= DESC_RATE11M)?TRUE :FALSE;\r
+ isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M )?TRUE :FALSE;\r
pDM_Odm->RxRate = pPktinfo->DataRate;\r
- /*\r
- if(!isCCKrate)\r
- {\r
- DbgPrint("OFDM: pPktinfo->StationID=%d, isCCKrate=%d, pPhyInfo->RxPWDBAll=%d\n",\r
- pPktinfo->StationID, isCCKrate, pPhyInfo->RxPWDBAll);\r
- }\r
- */\r
\r
//--------------Statistic for antenna/path diversity------------------\r
if(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)\r
ODM_Process_RSSIForAntDiv(pDM_Odm,pPhyInfo,pPktinfo);\r
#endif\r
}\r
+ #if(defined(CONFIG_PATH_DIVERSITY))\r
else if(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)\r
{\r
- #if (RTL8812A_SUPPORT == 1)\r
- if(pDM_Odm->SupportICType == ODM_RTL8812)\r
- {\r
- pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv;\r
- if(pPktinfo->bPacketToSelf || pPktinfo->bPacketMatchBSSID)\r
- {\r
- if(pPktinfo->DataRate > DESC_RATE11M)\r
- ODM_PathStatistics_8812A(pDM_Odm, pPktinfo->StationID, pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A], \r
- pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]);\r
- }\r
- }\r
- #endif\r
+ phydm_process_rssi_for_path_div(pDM_Odm,pPhyInfo,pPktinfo);\r
}\r
-\r
+ #endif\r
//-----------------Smart Antenna Debug Message------------------//\r
\r
UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;\r
}\r
#endif\r
\r
-#if(ODM_IC_11AC_SERIES_SUPPORT == 1)\r
+\r
//\r
// Endianness before calling this API\r
//\r
+#if ODM_IC_11AC_SERIES_SUPPORT\r
+\r
VOID\r
ODM_PhyStatusQuery_JaguarSeries(\r
IN OUT PDM_ODM_T pDM_Odm,\r
IN PODM_PACKET_INFO_T pPktinfo\r
)\r
{\r
-\r
odm_RxPhyStatusJaguarSeries_Parsing(\r
pDM_Odm,\r
pPhyInfo,\r
pPktinfo);\r
\r
odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo);\r
-\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ //phydm_sbd_check(pDM_Odm);\r
+#endif\r
}\r
#endif\r
\r
-\r
VOID\r
ODM_PhyStatusQuery(\r
IN OUT PDM_ODM_T pDM_Odm,\r
IN PODM_PACKET_INFO_T pPktinfo\r
)\r
{\r
-#if(ODM_IC_11AC_SERIES_SUPPORT == 1)\r
+\r
+#if ODM_IC_11AC_SERIES_SUPPORT\r
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES )\r
ODM_PhyStatusQuery_JaguarSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo);\r
#endif\r
\r
-#if(ODM_IC_11N_SERIES_SUPPORT ==1)\r
+#if ODM_IC_11N_SERIES_SUPPORT\r
if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES )\r
ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo);\r
#endif\r
IN ODM_RF_RADIO_PATH_E eRFPath\r
)\r
{\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) \r
PADAPTER Adapter = pDM_Odm->Adapter;\r
+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); \r
+#endif\r
\r
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
\r
+//1 AP doesn't use PHYDM power tracking table in these ICs\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
#if (RTL8723A_SUPPORT == 1)\r
if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
{\r
}\r
}\r
#endif\r
-\r
-#if (RTL8188E_SUPPORT == 1)\r
- if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
- {\r
- if(ConfigType == CONFIG_RF_RADIO) {\r
- if(eRFPath == ODM_RF_PATH_A)\r
- READ_AND_CONFIG_MP(8188E,_RadioA);\r
- }\r
- else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
- READ_AND_CONFIG_MP(8188E,_TXPWR_LMT);\r
- }\r
- }\r
-#endif\r
-\r
#if (RTL8812A_SUPPORT == 1)\r
if (pDM_Odm->SupportICType == ODM_RTL8812)\r
{\r
if(ConfigType == CONFIG_RF_RADIO) {\r
- if(eRFPath == ODM_RF_PATH_A)\r
- {\r
+ if(eRFPath == ODM_RF_PATH_A){\r
READ_AND_CONFIG_MP(8812A,_RadioA);\r
}\r
- else if(eRFPath == ODM_RF_PATH_B)\r
- {\r
+ else if(eRFPath == ODM_RF_PATH_B){\r
READ_AND_CONFIG_MP(8812A,_RadioB);\r
}\r
}\r
else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE)\r
+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);\r
+ if ((pHalData->EEPROMSVID == 0x17AA && pHalData->EEPROMSMID == 0xA811) ||\r
+ (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0xA812) ||\r
+ (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0x8812))\r
+ READ_AND_CONFIG_MP(8812A,_TXPWR_LMT_HM812A03);\r
+ #endif \r
READ_AND_CONFIG_MP(8812A,_TXPWR_LMT);\r
}\r
}\r
#endif\r
-\r
#if (RTL8821A_SUPPORT == 1)\r
if (pDM_Odm->SupportICType == ODM_RTL8821)\r
{\r
if(ConfigType == CONFIG_RF_RADIO) {\r
- if(eRFPath == ODM_RF_PATH_A)\r
- {\r
+ if(eRFPath == ODM_RF_PATH_A){\r
READ_AND_CONFIG_MP(8821A,_RadioA);\r
}\r
}\r
else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
\r
+ \r
+ \r
if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {\r
if (pDM_Odm->ExtPA5G || pDM_Odm->ExtLNA5G)\r
READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_FEM);\r
else\r
READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_IPA); \r
- } else {\r
- READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A); \r
+ } \r
+ else {\r
+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) \r
+ PADAPTER Adapter = pDM_Odm->Adapter;\r
+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); \r
+ if (pMgntInfo->CustomerID == RT_CID_8821AE_ASUS_MB)\r
+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_8mm);\r
+ else if (pMgntInfo->CustomerID == RT_CID_8821AE_ASUS_NB)\r
+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_5mm);\r
+ else\r
+ #endif\r
+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A); \r
}\r
}\r
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigRFWithHeaderFile\n"));\r
#if (RTL8723B_SUPPORT == 1)\r
if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
{\r
- if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(ConfigType == CONFIG_RF_RADIO)\r
READ_AND_CONFIG_MP(8723B,_RadioA);\r
- }\r
- else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
+ else if(ConfigType == CONFIG_RF_TXPWR_LMT)\r
READ_AND_CONFIG_MP(8723B,_TXPWR_LMT);\r
- }\r
}\r
#endif\r
\r
else if(eRFPath == ODM_RF_PATH_B)\r
READ_AND_CONFIG_MP(8192E,_RadioB);\r
}\r
- else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
+ else if(ConfigType == CONFIG_RF_TXPWR_LMT)\r
READ_AND_CONFIG_MP(8192E,_TXPWR_LMT);\r
- }\r
}\r
#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
\r
+//1 All platforms support\r
+#if (RTL8188E_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_MP(8188E,_RadioA);\r
+ }\r
+ else if(ConfigType == CONFIG_RF_TXPWR_LMT)\r
+ READ_AND_CONFIG_MP(8188E,_TXPWR_LMT);\r
+ }\r
+#endif\r
#if (RTL8814A_SUPPORT == 1)\r
if (pDM_Odm->SupportICType == ODM_RTL8814A)\r
{\r
- /*\r
- if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
- READ_AND_CONFIG(8813A,_TXPWR_LMT);\r
- }\r
- */ \r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_MP(8814A,_RadioA);\r
+ else if(eRFPath == ODM_RF_PATH_B)\r
+ READ_AND_CONFIG_MP(8814A,_RadioB);\r
+ else if(eRFPath == ODM_RF_PATH_C)\r
+ READ_AND_CONFIG_MP(8814A,_RadioC);\r
+ else if(eRFPath == ODM_RF_PATH_D)\r
+ READ_AND_CONFIG_MP(8814A,_RadioD);\r
+ } \r
+ else if(ConfigType == CONFIG_RF_TXPWR_LMT) \r
+ READ_AND_CONFIG_MP(8814A,_TXPWR_LMT);\r
}\r
#endif\r
- \r
+\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+#if (RTL8821B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8821B)\r
+ {\r
+ if (ConfigType == CONFIG_RF_RADIO) {\r
+ if (eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG(8821B, _RadioA);\r
+ } else if (ConfigType == CONFIG_RF_TXPWR_LMT)\r
+ READ_AND_CONFIG(8821B, _TXPWR_LMT);\r
+ }\r
+#endif\r
+#if (RTL8822B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_TC(8822B,_RadioA);\r
+ else if(eRFPath == ODM_RF_PATH_B)\r
+ READ_AND_CONFIG_TC(8822B,_RadioB);\r
+ } \r
+ }\r
+#endif\r
+#if (RTL8703B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8703B)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_TC(8703B,_RadioA);\r
+ } \r
+ }\r
+#endif\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if (RTL8188F_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_TC(8188F,_RadioA);\r
+ } \r
+ }\r
+#endif\r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+\r
return HAL_STATUS_SUCCESS;\r
}\r
\r
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
- if(0)\r
- {\r
- }\r
-#if (RTL8821A_SUPPORT == 1) \r
- else if(pDM_Odm->SupportICType == ODM_RTL8821)\r
+\r
+\r
+//1 AP doesn't use PHYDM power tracking table in these ICs\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+#if RTL8821A_SUPPORT\r
+ if(pDM_Odm->SupportICType == ODM_RTL8821)\r
{\r
if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE);\r
else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
- READ_AND_CONFIG_MP(8821A,_TxPowerTrack_USB);\r
- else\r
- READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE);\r
+ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_USB); \r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
+ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_SDIO);\r
}\r
-#endif\r
-#if (RTL8812A_SUPPORT == 1)\r
- else if(pDM_Odm->SupportICType == ODM_RTL8812)\r
+#endif \r
+#if RTL8812A_SUPPORT \r
+ if(pDM_Odm->SupportICType == ODM_RTL8812)\r
{\r
if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
READ_AND_CONFIG_MP(8812A,_TxPowerTrack_PCIE);\r
}\r
\r
}\r
-#endif\r
-#if (RTL8192E_SUPPORT == 1) \r
- else if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
+#endif \r
+#if RTL8192E_SUPPORT \r
+ if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
{\r
if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
READ_AND_CONFIG_MP(8192E,_TxPowerTrack_PCIE);\r
else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
READ_AND_CONFIG_MP(8192E,_TxPowerTrack_USB); \r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
+ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_SDIO); \r
}\r
#endif\r
#if RTL8723B_SUPPORT \r
- else if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
{\r
if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
READ_AND_CONFIG_MP(8723B,_TxPowerTrack_PCIE);\r
}\r
#endif \r
#if RTL8188E_SUPPORT \r
- else if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
{\r
if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE);\r
else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
READ_AND_CONFIG_MP(8188E,_TxPowerTrack_USB);\r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
+ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_SDIO);\r
+ }\r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+\r
+//1 All platforms support\r
+#if RTL8814A_SUPPORT\r
+ if(pDM_Odm->SupportICType == ODM_RTL8814A) \r
+ {\r
+ if(pDM_Odm->RFEType == 0)\r
+ READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type0);\r
+ else if(pDM_Odm->RFEType == 2)\r
+ READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type2);\r
else\r
- READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE);\r
+ READ_AND_CONFIG_MP(8814A,_TxPowerTrack);\r
}\r
+#endif \r
+\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+#if RTL8821B_SUPPORT\r
+ if(pDM_Odm->SupportICType == ODM_RTL8821B)\r
+ READ_AND_CONFIG(8821B,_TxPowerTrack); \r
+#endif \r
+#if RTL8822B_SUPPORT\r
+ if(pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ READ_AND_CONFIG_TC(8822B,_TxPowerTrack); \r
+#endif \r
+#if RTL8703B_SUPPORT\r
+ if(pDM_Odm->SupportICType == ODM_RTL8703B)\r
+ READ_AND_CONFIG_TC(8703B,_TxPowerTrack_PCIE); \r
+#endif \r
+\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if RTL8188F_SUPPORT\r
+ if(pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ READ_AND_CONFIG_TC(8188F,_TxPowerTrack_PCIE); \r
+#endif \r
#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+\r
\r
return HAL_STATUS_SUCCESS;\r
}\r
IN ODM_BB_Config_Type ConfigType\r
)\r
{\r
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) \r
PADAPTER Adapter = pDM_Odm->Adapter;\r
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); \r
#endif\r
-#endif\r
- \r
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
- ("===>ODM_ConfigBBWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
- ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
- pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
\r
+//1 AP doesn't use PHYDM initialization in these ICs\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) \r
#if (RTL8723A_SUPPORT == 1) \r
- if(pDM_Odm->SupportICType == ODM_RTL8723A)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8723A)\r
{\r
- if(ConfigType == CONFIG_BB_PHY_REG)\r
- {\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
READ_AND_CONFIG_MP(8723A,_PHY_REG);\r
- }\r
- else if(ConfigType == CONFIG_BB_AGC_TAB)\r
- {\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
READ_AND_CONFIG_MP(8723A,_AGC_TAB);\r
- }\r
+ } \r
} \r
#endif\r
-\r
-#if (RTL8188E_SUPPORT == 1)\r
- if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
- {\r
- if(ConfigType == CONFIG_BB_PHY_REG)\r
- {\r
- READ_AND_CONFIG_MP(8188E,_PHY_REG);\r
- }\r
- else if(ConfigType == CONFIG_BB_AGC_TAB)\r
- {\r
- READ_AND_CONFIG_MP(8188E,_AGC_TAB);\r
- }\r
- else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
- {\r
- READ_AND_CONFIG_MP(8188E,_PHY_REG_PG);\r
- }\r
- }\r
-#endif\r
-\r
#if (RTL8812A_SUPPORT == 1) \r
if(pDM_Odm->SupportICType == ODM_RTL8812)\r
{\r
- if(ConfigType == CONFIG_BB_PHY_REG)\r
- {\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
READ_AND_CONFIG_MP(8812A,_PHY_REG);\r
- }\r
- else if(ConfigType == CONFIG_BB_AGC_TAB)\r
- {\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
READ_AND_CONFIG_MP(8812A,_AGC_TAB);\r
}\r
else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
{\r
if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) \r
READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_ASUS);\r
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
else if (pMgntInfo->CustomerID == RT_CID_WNC_NEC && pDM_Odm->bIsMPChip) \r
READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_NEC);\r
-#endif \r
+ #endif \r
else\r
READ_AND_CONFIG_MP(8812A,_PHY_REG_PG);\r
}\r
- else if(ConfigType == CONFIG_BB_PHY_REG_MP)\r
- {\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_MP){\r
READ_AND_CONFIG_MP(8812A,_PHY_REG_MP);\r
}\r
else if(ConfigType == CONFIG_BB_AGC_TAB_DIFF)\r
else if (100 <= *pDM_Odm->pChannel) \r
AGC_DIFF_CONFIG_MP(8812A,HB);\r
}\r
+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8812AGCTABArray\n"));\r
+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8812PHY_REGArray\n"));\r
} \r
#endif\r
-\r
#if (RTL8821A_SUPPORT == 1) \r
if(pDM_Odm->SupportICType == ODM_RTL8821)\r
{\r
- if(ConfigType == CONFIG_BB_PHY_REG)\r
- {\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
READ_AND_CONFIG_MP(8821A,_PHY_REG);\r
- }\r
- else if(ConfigType == CONFIG_BB_AGC_TAB)\r
- {\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
READ_AND_CONFIG_MP(8821A,_AGC_TAB);\r
- }\r
- else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
- {\r
+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
READ_AND_CONFIG_MP(8821A,_PHY_REG_PG);\r
- }\r
- }\r
+ } \r
+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8821AGCTABArray\n"));\r
+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8821PHY_REGArray\n"));\r
+ } \r
#endif\r
#if (RTL8723B_SUPPORT == 1)\r
- if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
{\r
-\r
- if(ConfigType == CONFIG_BB_PHY_REG)\r
- {\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
READ_AND_CONFIG_MP(8723B,_PHY_REG);\r
- }\r
- else if(ConfigType == CONFIG_BB_AGC_TAB)\r
- {\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
READ_AND_CONFIG_MP(8723B,_AGC_TAB);\r
- }\r
- else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
- {\r
+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
READ_AND_CONFIG_MP(8723B,_PHY_REG_PG);\r
}\r
}\r
#endif\r
#if (RTL8192E_SUPPORT == 1)\r
- if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
{\r
-\r
- if(ConfigType == CONFIG_BB_PHY_REG)\r
- {\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
READ_AND_CONFIG_MP(8192E,_PHY_REG);\r
- }\r
- else if(ConfigType == CONFIG_BB_AGC_TAB)\r
- {\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
READ_AND_CONFIG_MP(8192E,_AGC_TAB);\r
- }\r
- else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
- {\r
+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
READ_AND_CONFIG_MP(8192E,_PHY_REG_PG);\r
}\r
}\r
#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+\r
+\r
+//1 All platforms support\r
+#if (RTL8188E_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG)\r
+ READ_AND_CONFIG_MP(8188E,_PHY_REG);\r
+ else if(ConfigType == CONFIG_BB_AGC_TAB)\r
+ READ_AND_CONFIG_MP(8188E,_AGC_TAB);\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
+ READ_AND_CONFIG_MP(8188E,_PHY_REG_PG);\r
+ }\r
+#endif\r
#if (RTL8814A_SUPPORT == 1)\r
- if(pDM_Odm->SupportICType == ODM_RTL8814A)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8814A)\r
{\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
+ READ_AND_CONFIG_MP(8814A,_PHY_REG);\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
+ READ_AND_CONFIG_MP(8814A,_AGC_TAB);\r
+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
+ READ_AND_CONFIG_MP(8814A,_PHY_REG_PG);\r
+ }else if(ConfigType == CONFIG_BB_PHY_REG_MP){\r
+ READ_AND_CONFIG_MP(8814A,_PHY_REG_MP);\r
+ }\r
+ }\r
+#endif\r
\r
- if(ConfigType == CONFIG_BB_PHY_REG)\r
- {\r
- READ_AND_CONFIG(8813A,_PHY_REG);\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+#if (RTL8821B_SUPPORT == 1) \r
+ if(pDM_Odm->SupportICType == ODM_RTL8821B)\r
+ {\r
+ if (ConfigType == CONFIG_BB_PHY_REG) {\r
+ READ_AND_CONFIG(8821B,_PHY_REG);\r
+ } else if (ConfigType == CONFIG_BB_AGC_TAB) { \r
+ READ_AND_CONFIG(8821B,_AGC_TAB);\r
+ } else if (ConfigType == CONFIG_BB_PHY_REG_PG) {\r
+ READ_AND_CONFIG(8821B,_PHY_REG_PG);\r
}\r
+ } \r
+#endif\r
+#if (RTL8822B_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG)\r
+ READ_AND_CONFIG_TC(8822B,_PHY_REG);\r
else if(ConfigType == CONFIG_BB_AGC_TAB)\r
- {\r
- READ_AND_CONFIG(8813A,_AGC_TAB);\r
- }\r
+ READ_AND_CONFIG_TC(8822B,_AGC_TAB);\r
else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
- {\r
- //READ_AND_CONFIG(8813A,_PHY_REG_PG);\r
- }\r
+ READ_AND_CONFIG_TC(8822B,_PHY_REG_PG);\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_MP)\r
+ READ_AND_CONFIG_TC(8822B,_PHY_REG_MP);\r
}\r
#endif\r
+#if (RTL8703B_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8703B)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG)\r
+ READ_AND_CONFIG_TC(8703B,_PHY_REG);\r
+ else if(ConfigType == CONFIG_BB_AGC_TAB)\r
+ READ_AND_CONFIG_TC(8703B,_AGC_TAB);\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
+ READ_AND_CONFIG_TC(8703B,_PHY_REG_PG);\r
+ }\r
+#endif\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if (RTL8188F_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG)\r
+ READ_AND_CONFIG_TC(8188F,_PHY_REG);\r
+ else if(ConfigType == CONFIG_BB_AGC_TAB)\r
+ READ_AND_CONFIG_TC(8188F,_AGC_TAB);\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
+ READ_AND_CONFIG_TC(8188F,_PHY_REG_PG);\r
+ }\r
+#endif\r
+#endif\r
+#if (RTL8195A_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8195A)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG)\r
+ READ_AND_CONFIG(8195A,_PHY_REG);\r
+ else if(ConfigType == CONFIG_BB_AGC_TAB)\r
+ READ_AND_CONFIG(8195A,_AGC_TAB);\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
+ READ_AND_CONFIG(8195A,_PHY_REG_PG);\r
+ }\r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+\r
return HAL_STATUS_SUCCESS; \r
} \r
\r
IN PDM_ODM_T pDM_Odm\r
)\r
{\r
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) \r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) \r
PADAPTER Adapter = pDM_Odm->Adapter;\r
+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); \r
#endif\r
- u1Byte result = HAL_STATUS_SUCCESS;\r
\r
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
("===>ODM_ConfigMACWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
- \r
+\r
+//1 AP doesn't use PHYDM initialization in these ICs\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) \r
#if (RTL8723A_SUPPORT == 1)\r
- if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
- {\r
+ if (pDM_Odm->SupportICType == ODM_RTL8723A){\r
READ_AND_CONFIG_MP(8723A,_MAC_REG);\r
}\r
#endif\r
-#if (RTL8188E_SUPPORT == 1) \r
- if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
- {\r
- READ_AND_CONFIG_MP(8188E,_MAC_REG);\r
- }\r
-#endif\r
#if (RTL8812A_SUPPORT == 1)\r
- if (pDM_Odm->SupportICType == ODM_RTL8812)\r
- {\r
+ if (pDM_Odm->SupportICType == ODM_RTL8812){\r
READ_AND_CONFIG_MP(8812A,_MAC_REG);\r
}\r
#endif\r
#if (RTL8821A_SUPPORT == 1)\r
- if (pDM_Odm->SupportICType == ODM_RTL8821)\r
- {\r
+ if (pDM_Odm->SupportICType == ODM_RTL8821){\r
READ_AND_CONFIG_MP(8821A,_MAC_REG);\r
\r
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n"));\r
}\r
#endif\r
#if (RTL8723B_SUPPORT == 1) \r
- if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
- {\r
+ if (pDM_Odm->SupportICType == ODM_RTL8723B){\r
READ_AND_CONFIG_MP(8723B,_MAC_REG);\r
}\r
#endif\r
#if (RTL8192E_SUPPORT == 1) \r
- if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
- {\r
+ if (pDM_Odm->SupportICType == ODM_RTL8192E){\r
READ_AND_CONFIG_MP(8192E,_MAC_REG);\r
}\r
#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+\r
+//1 All platforms support\r
+#if (RTL8188E_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8188E){\r
+ READ_AND_CONFIG_MP(8188E,_MAC_REG);\r
+ }\r
+#endif\r
+#if (RTL8814A_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8814A){\r
+ READ_AND_CONFIG_MP(8814A,_MAC_REG);\r
+ }\r
+#endif\r
+\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+#if (RTL8821B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8821B){\r
+ READ_AND_CONFIG(8821B,_MAC_REG);\r
+ }\r
+#endif\r
+#if (RTL8822B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ READ_AND_CONFIG_TC(8822B,_MAC_REG);\r
+#endif\r
+#if (RTL8703B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8703B)\r
+ READ_AND_CONFIG_TC(8703B,_MAC_REG);\r
+#endif\r
\r
- return result;\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if (RTL8188F_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ READ_AND_CONFIG_TC(8188F,_MAC_REG);\r
+#endif\r
+#endif\r
+#if (RTL8195A_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8195A)\r
+ READ_AND_CONFIG_MP(8195A,_MAC_REG);\r
+#endif\r
+#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/\r
+\r
+ return HAL_STATUS_SUCCESS; \r
} \r
\r
HAL_STATUS\r
OUT u4Byte *pSize\r
)\r
{\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
\r
#if (RTL8188E_SUPPORT == 1) \r
if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
{\r
#ifdef CONFIG_SFW_SUPPORTED\r
- if (ConfigType == CONFIG_FW_NIC)\r
- {\r
+ if (ConfigType == CONFIG_FW_NIC){\r
READ_FIRMWARE_MP(8188E,_FW_NIC_T);\r
- }\r
- else if (ConfigType == CONFIG_FW_WoWLAN)\r
- {\r
+ }else if (ConfigType == CONFIG_FW_WoWLAN){\r
READ_FIRMWARE_MP(8188E,_FW_WoWLAN_T);\r
- }\r
- else if(ConfigType == CONFIG_FW_NIC_2)\r
- {\r
+ }else if(ConfigType == CONFIG_FW_NIC_2){\r
READ_FIRMWARE_MP(8188E,_FW_NIC_S);\r
- }\r
- else if (ConfigType == CONFIG_FW_WoWLAN_2)\r
- {\r
+ }else if (ConfigType == CONFIG_FW_WoWLAN_2){\r
READ_FIRMWARE_MP(8188E,_FW_WoWLAN_S);\r
}\r
#else\r
if (ConfigType == CONFIG_FW_NIC)\r
- {\r
READ_FIRMWARE_MP(8188E,_FW_NIC);\r
- }\r
else if (ConfigType == CONFIG_FW_WoWLAN)\r
- {\r
READ_FIRMWARE_MP(8188E,_FW_WoWLAN);\r
- }\r
#endif\r
}\r
#endif\r
#if (RTL8723B_SUPPORT == 1) \r
if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
{\r
- if (ConfigType == CONFIG_FW_NIC)\r
- {\r
+ if (ConfigType == CONFIG_FW_NIC){\r
READ_FIRMWARE_MP(8723B,_FW_NIC);\r
- }\r
- else if (ConfigType == CONFIG_FW_WoWLAN)\r
- {\r
+ }else if (ConfigType == CONFIG_FW_WoWLAN){\r
READ_FIRMWARE_MP(8723B,_FW_WoWLAN);\r
- }\r
-#ifdef CONFIG_AP_WOWLAN\r
- else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
- {\r
+ #ifdef CONFIG_AP_WOWLAN\r
+ }else if (ConfigType == CONFIG_FW_AP_WoWLAN){\r
READ_FIRMWARE(8723B,_FW_AP_WoWLAN);\r
- }\r
-#endif\r
- else if (ConfigType == CONFIG_FW_BT)\r
- {\r
+ #endif\r
+ }else if (ConfigType == CONFIG_FW_BT){\r
READ_FIRMWARE_MP(8723B,_FW_BT);\r
- }\r
- else if (ConfigType == CONFIG_FW_MP)\r
- {\r
+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE)\r
+ }else if (ConfigType == CONFIG_FW_MP){\r
READ_FIRMWARE_MP(8723B,_FW_MP);\r
+ #endif\r
}\r
}\r
-#endif\r
+#endif //#if (RTL8723B_SUPPORT == 1) \r
#if (RTL8812A_SUPPORT == 1)\r
if (pDM_Odm->SupportICType == ODM_RTL8812)\r
{\r
- if (ConfigType == CONFIG_FW_NIC)\r
- {\r
+ if (ConfigType == CONFIG_FW_NIC){\r
READ_FIRMWARE_MP(8812A,_FW_NIC);\r
- }\r
- else if (ConfigType == CONFIG_FW_WoWLAN)\r
- {\r
+ }else if (ConfigType == CONFIG_FW_WoWLAN){\r
READ_FIRMWARE_MP(8812A,_FW_WoWLAN);\r
- }\r
- else if (ConfigType == CONFIG_FW_BT)\r
- {\r
+ }else if (ConfigType == CONFIG_FW_BT){\r
READ_FIRMWARE_MP(8812A,_FW_NIC_BT);\r
}\r
-\r
}\r
#endif\r
#if (RTL8821A_SUPPORT == 1)\r
- if (pDM_Odm->SupportICType == ODM_RTL8821)\r
- {\r
- if (ConfigType == CONFIG_FW_NIC)\r
- {\r
+ if (pDM_Odm->SupportICType == ODM_RTL8821){\r
+ if (ConfigType == CONFIG_FW_NIC){\r
READ_FIRMWARE_MP(8821A,_FW_NIC);\r
- }\r
- else if (ConfigType == CONFIG_FW_WoWLAN)\r
- {\r
+ }else if (ConfigType == CONFIG_FW_WoWLAN){\r
READ_FIRMWARE_MP(8821A,_FW_WoWLAN);\r
- }\r
- else if (ConfigType == CONFIG_FW_BT)\r
- {\r
+#ifdef CONFIG_AP_WOWLAN\r
+ } else if (ConfigType == CONFIG_FW_AP_WoWLAN) {\r
+ READ_FIRMWARE_MP(8821A , _FW_AP);\r
+#endif /*CONFIG_AP_WOWLAN*/\r
+ }else if (ConfigType == CONFIG_FW_BT){\r
READ_FIRMWARE_MP(8821A,_FW_NIC_BT);\r
}\r
}\r
#if (RTL8192E_SUPPORT == 1)\r
if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
{\r
- if (ConfigType == CONFIG_FW_NIC)\r
- {\r
+ if (ConfigType == CONFIG_FW_NIC){\r
READ_FIRMWARE_MP(8192E,_FW_NIC);\r
- }\r
- else if (ConfigType == CONFIG_FW_WoWLAN)\r
- {\r
+ }else if (ConfigType == CONFIG_FW_WoWLAN){\r
READ_FIRMWARE_MP(8192E,_FW_WoWLAN);\r
- }\r
-#ifdef CONFIG_AP_WOWLAN\r
+ #ifdef CONFIG_AP_WOWLAN\r
else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
- {\r
READ_FIRMWARE_MP(8192E,_FW_AP_WoWLAN);\r
+ #endif\r
}\r
+ }\r
+#endif\r
+#if (RTL8814A_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8814A)\r
+ {\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8814A,_FW_NIC);\r
+ }\r
#endif\r
\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+#if (RTL8821B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8821B)\r
+ {\r
+ }\r
+#endif\r
+#if (RTL8822B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ {\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8822B,_FW_NIC);\r
+ else if (ConfigType == CONFIG_FW_WoWLAN)\r
+ READ_FIRMWARE(8822B,_FW_WoWLAN);\r
}\r
#endif\r
+#if (RTL8703B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8703B)\r
+ {\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8703B,_FW_NIC);\r
+ }\r
+#endif\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if (RTL8188F_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ {\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8188F,_FW_NIC);\r
+ }\r
+#endif\r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+\r
+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
return HAL_STATUS_SUCCESS; \r
} \r
\r
-\r
u4Byte \r
ODM_GetHWImgVersion(\r
IN PDM_ODM_T pDM_Odm\r
{\r
u4Byte Version=0;\r
\r
+//1 AP doesn't use PHYDM initialization in these ICs\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
#if (RTL8723A_SUPPORT == 1) \r
if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
Version = GET_VERSION_MP(8723A,_MAC_REG);\r
#endif\r
-\r
#if (RTL8723B_SUPPORT == 1) \r
if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
Version = GET_VERSION_MP(8723B,_MAC_REG);\r
#endif\r
-\r
-#if (RTL8188E_SUPPORT == 1) \r
- if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
- Version = GET_VERSION_MP(8188E,_MAC_REG);\r
-#endif\r
-\r
#if (RTL8821A_SUPPORT == 1) \r
if (pDM_Odm->SupportICType == ODM_RTL8821)\r
Version = GET_VERSION_MP(8821A,_MAC_REG);\r
#endif\r
-\r
#if (RTL8192E_SUPPORT == 1) \r
if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
Version = GET_VERSION_MP(8192E,_MAC_REG);\r
#endif\r
-\r
#if (RTL8812A_SUPPORT == 1) \r
if (pDM_Odm->SupportICType == ODM_RTL8812)\r
Version = GET_VERSION_MP(8812A,_MAC_REG);\r
#endif\r
+#endif //(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
\r
- return Version;\r
-}\r
-\r
+/*1 All platforms support*/\r
+#if (RTL8188E_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
+ Version = GET_VERSION_MP(8188E,_MAC_REG);\r
+#endif\r
+#if (RTL8814A_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8814A)\r
+ Version = GET_VERSION_MP(8814A,_MAC_REG);\r
+#endif\r
\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+#if (RTL8821B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8821B)\r
+ Version = GET_VERSION(8821B,_MAC_REG);\r
+#endif\r
+#if (RTL8822B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ Version = GET_VERSION(8822B, _MAC_REG);\r
+#endif\r
+#if (RTL8703B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8703B)\r
+ Version = GET_VERSION_TC(8703B, _MAC_REG);\r
+#endif\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if (RTL8188F_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ Version = GET_VERSION_TC(8188F, _MAC_REG);\r
+#endif\r
+#endif\r
+#endif //(DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
\r
+ return Version;\r
+}\r
\r
\r
projects / firefly-linux-kernel-4.4.55.git / blobdiff