--- /dev/null
+/******************************************************************************\r
+ *\r
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
+ * \r
+ * This program is free software; you can redistribute it and/or modify it\r
+ * under the terms of version 2 of the GNU General Public License as\r
+ * published by the Free Software Foundation.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but WITHOUT\r
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ * more details.\r
+ *\r
+ * You should have received a copy of the GNU General Public License along with\r
+ * this program; if not, write to the Free Software Foundation, Inc.,\r
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
+ *\r
+ *\r
+ ******************************************************************************/\r
+\r
+//============================================================\r
+// include files\r
+//============================================================\r
+\r
+#include "mp_precomp.h"\r
+#include "phydm_precomp.h"\r
+\r
+#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm))\r
+#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC_##ic##txt(pDM_Odm))\r
+\r
+\r
+#if (PHYDM_TESTCHIP_SUPPORT == 1)\r
+#define READ_AND_CONFIG(ic, txt) do {\\r
+ if (pDM_Odm->bIsMPChip)\\r
+ READ_AND_CONFIG_MP(ic,txt);\\r
+ else\\r
+ READ_AND_CONFIG_TC(ic,txt);\\r
+ } while(0)\r
+#else\r
+ #define READ_AND_CONFIG READ_AND_CONFIG_MP\r
+#endif\r
+\r
+\r
+#define READ_FIRMWARE_MP(ic, txt) (ODM_ReadFirmware_MP_##ic##txt(pDM_Odm, pFirmware, pSize))\r
+#define READ_FIRMWARE_TC(ic, txt) (ODM_ReadFirmware_TC_##ic##txt(pDM_Odm, pFirmware, pSize)) \r
+\r
+#if (PHYDM_TESTCHIP_SUPPORT == 1)\r
+#define READ_FIRMWARE(ic, txt) do {\\r
+ if (pDM_Odm->bIsMPChip)\\r
+ READ_FIRMWARE_MP(ic,txt);\\r
+ else\\r
+ READ_FIRMWARE_TC(ic,txt);\\r
+ } while(0) \r
+#else\r
+#define READ_FIRMWARE READ_FIRMWARE_MP\r
+#endif\r
+ \r
+#define GET_VERSION_MP(ic, txt) (ODM_GetVersion_MP_##ic##txt())\r
+#define GET_VERSION_TC(ic, txt) (ODM_GetVersion_TC_##ic##txt())\r
+#define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic,txt):GET_VERSION_TC(ic,txt))\r
+\r
+u1Byte\r
+odm_QueryRxPwrPercentage(\r
+ IN s1Byte AntPower\r
+ )\r
+{\r
+ if ((AntPower <= -100) || (AntPower >= 20))\r
+ {\r
+ return 0;\r
+ }\r
+ else if (AntPower >= 0)\r
+ {\r
+ return 100;\r
+ }\r
+ else\r
+ {\r
+ return (100+AntPower);\r
+ }\r
+ \r
+}\r
+\r
+\r
+//\r
+// 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer.\r
+// IF other SW team do not support the feature, remove this section.??\r
+//\r
+s4Byte\r
+odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo( \r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ s4Byte CurrSig \r
+)\r
+{ \r
+ s4Byte RetSig = 0;\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ //if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) \r
+ {\r
+ // Step 1. Scale mapping.\r
+ // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.\r
+ // 20100426 Joseph: Modify Signal strength mapping.\r
+ // This modification makes the RSSI indication similar to Intel solution.\r
+ // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.\r
+ if(CurrSig >= 54 && CurrSig <= 100)\r
+ {\r
+ RetSig = 100;\r
+ }\r
+ else if(CurrSig>=42 && CurrSig <= 53 )\r
+ {\r
+ RetSig = 95;\r
+ }\r
+ else if(CurrSig>=36 && CurrSig <= 41 )\r
+ {\r
+ RetSig = 74 + ((CurrSig - 36) *20)/6;\r
+ }\r
+ else if(CurrSig>=33 && CurrSig <= 35 )\r
+ {\r
+ RetSig = 65 + ((CurrSig - 33) *8)/2;\r
+ }\r
+ else if(CurrSig>=18 && CurrSig <= 32 )\r
+ {\r
+ RetSig = 62 + ((CurrSig - 18) *2)/15;\r
+ }\r
+ else if(CurrSig>=15 && CurrSig <= 17 )\r
+ {\r
+ RetSig = 33 + ((CurrSig - 15) *28)/2;\r
+ }\r
+ else if(CurrSig>=10 && CurrSig <= 14 )\r
+ {\r
+ RetSig = 39;\r
+ }\r
+ else if(CurrSig>=8 && CurrSig <= 9 )\r
+ {\r
+ RetSig = 33;\r
+ }\r
+ else if(CurrSig <= 8 )\r
+ {\r
+ RetSig = 19;\r
+ }\r
+ }\r
+#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ return RetSig;\r
+}\r
+\r
+s4Byte\r
+odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore( \r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ s4Byte CurrSig \r
+)\r
+{\r
+ s4Byte RetSig = 0;\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ //if(pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
+ {\r
+ // Netcore request this modification because 2009.04.13 SU driver use it. \r
+ if(CurrSig >= 31 && CurrSig <= 100)\r
+ {\r
+ RetSig = 100;\r
+ } \r
+ else if(CurrSig >= 21 && CurrSig <= 30)\r
+ {\r
+ RetSig = 90 + ((CurrSig - 20) / 1);\r
+ }\r
+ else if(CurrSig >= 11 && CurrSig <= 20)\r
+ {\r
+ RetSig = 80 + ((CurrSig - 10) / 1);\r
+ }\r
+ else if(CurrSig >= 7 && CurrSig <= 10)\r
+ {\r
+ RetSig = 69 + (CurrSig - 7);\r
+ }\r
+ else if(CurrSig == 6)\r
+ {\r
+ RetSig = 54;\r
+ }\r
+ else if(CurrSig == 5)\r
+ {\r
+ RetSig = 45;\r
+ }\r
+ else if(CurrSig == 4)\r
+ {\r
+ RetSig = 36;\r
+ }\r
+ else if(CurrSig == 3)\r
+ {\r
+ RetSig = 27;\r
+ }\r
+ else if(CurrSig == 2)\r
+ {\r
+ RetSig = 18;\r
+ }\r
+ else if(CurrSig == 1)\r
+ {\r
+ RetSig = 9;\r
+ }\r
+ else\r
+ {\r
+ RetSig = CurrSig;\r
+ }\r
+ }\r
+#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ return RetSig;\r
+}\r
+\r
+\r
+s4Byte\r
+odm_SignalScaleMapping_92CSeries( \r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ IN s4Byte CurrSig \r
+)\r
+{\r
+ s4Byte RetSig = 0; \r
+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) \r
+ if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) \r
+ {\r
+ // Step 1. Scale mapping.\r
+ if(CurrSig >= 61 && CurrSig <= 100)\r
+ {\r
+ RetSig = 90 + ((CurrSig - 60) / 4);\r
+ }\r
+ else if(CurrSig >= 41 && CurrSig <= 60)\r
+ {\r
+ RetSig = 78 + ((CurrSig - 40) / 2);\r
+ }\r
+ else if(CurrSig >= 31 && CurrSig <= 40)\r
+ {\r
+ RetSig = 66 + (CurrSig - 30);\r
+ }\r
+ else if(CurrSig >= 21 && CurrSig <= 30)\r
+ {\r
+ RetSig = 54 + (CurrSig - 20);\r
+ }\r
+ else if(CurrSig >= 5 && CurrSig <= 20)\r
+ {\r
+ RetSig = 42 + (((CurrSig - 5) * 2) / 3);\r
+ }\r
+ else if(CurrSig == 4)\r
+ {\r
+ RetSig = 36;\r
+ }\r
+ else if(CurrSig == 3)\r
+ {\r
+ RetSig = 27;\r
+ }\r
+ else if(CurrSig == 2)\r
+ {\r
+ RetSig = 18;\r
+ }\r
+ else if(CurrSig == 1)\r
+ {\r
+ RetSig = 9;\r
+ }\r
+ else\r
+ {\r
+ RetSig = CurrSig;\r
+ }\r
+ }\r
+#endif\r
+\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+ if((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO))\r
+ {\r
+ if(CurrSig >= 51 && CurrSig <= 100)\r
+ {\r
+ RetSig = 100;\r
+ }\r
+ else if(CurrSig >= 41 && CurrSig <= 50)\r
+ {\r
+ RetSig = 80 + ((CurrSig - 40)*2);\r
+ }\r
+ else if(CurrSig >= 31 && CurrSig <= 40)\r
+ {\r
+ RetSig = 66 + (CurrSig - 30);\r
+ }\r
+ else if(CurrSig >= 21 && CurrSig <= 30)\r
+ {\r
+ RetSig = 54 + (CurrSig - 20);\r
+ }\r
+ else if(CurrSig >= 10 && CurrSig <= 20)\r
+ {\r
+ RetSig = 42 + (((CurrSig - 10) * 2) / 3);\r
+ }\r
+ else if(CurrSig >= 5 && CurrSig <= 9)\r
+ {\r
+ RetSig = 22 + (((CurrSig - 5) * 3) / 2);\r
+ }\r
+ else if(CurrSig >= 1 && CurrSig <= 4)\r
+ {\r
+ RetSig = 6 + (((CurrSig - 1) * 3) / 2);\r
+ }\r
+ else\r
+ {\r
+ RetSig = CurrSig;\r
+ }\r
+ }\r
+\r
+#endif\r
+ return RetSig;\r
+}\r
+s4Byte\r
+odm_SignalScaleMapping( \r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ IN s4Byte CurrSig \r
+)\r
+{ \r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ if( (pDM_Odm->SupportPlatform == ODM_WIN) && \r
+ (pDM_Odm->SupportInterface != ODM_ITRF_PCIE) && //USB & SDIO\r
+ (pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore\r
+ {\r
+ return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig);\r
+ }\r
+ else if( (pDM_Odm->SupportPlatform == ODM_WIN) && \r
+ (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) &&\r
+ (pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo)\r
+ {\r
+ return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig);\r
+ }else\r
+#endif\r
+ { \r
+ return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig);\r
+ }\r
+ \r
+}\r
+\r
+\r
+\r
+static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(\r
+ IN PDM_ODM_T pDM_Odm,\r
+ IN u1Byte isCCKrate,\r
+ IN u1Byte PWDB_ALL,\r
+ IN u1Byte path,\r
+ IN u1Byte RSSI\r
+)\r
+{\r
+ u1Byte SQ = 0;\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) \r
+\r
+ if(isCCKrate){\r
+ \r
+ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter))\r
+ {\r
+\r
+ //\r
+ // <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11\r
+ // 802.11n, 802.11b, 802.11g only at channel 6\r
+ //\r
+ // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm)\r
+ // 50 5 -52\r
+ // 55 5 -54\r
+ // 60 5 -55\r
+ // 65 5 -59\r
+ // 70 5 -63\r
+ // 75 5 -66\r
+ // 80 4 -72\r
+ // 85 3 -75\r
+ // 90 3 -80\r
+ // 95 2 -85\r
+ // 100 1 -89\r
+ // 102 1 -90\r
+ // 104 1 -91\r
+ //\r
+ RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_CID_819x_Lenovo\n"));\r
+ \r
+#if OS_WIN_FROM_WIN8(OS_VERSION) \r
+ if(PWDB_ALL >= 50)\r
+ SQ = 100;\r
+ else if(PWDB_ALL >= 23 && PWDB_ALL < 50) \r
+ SQ = 80;\r
+ else if(PWDB_ALL >= 18 && PWDB_ALL < 23)\r
+ SQ = 60;\r
+ else if(PWDB_ALL >= 8 && PWDB_ALL < 18)\r
+ SQ = 40;\r
+ else\r
+ SQ = 10;\r
+#else\r
+ if(PWDB_ALL >= 34)\r
+ SQ = 100;\r
+ else if(PWDB_ALL >= 23 && PWDB_ALL < 34) \r
+ SQ = 80;\r
+ else if(PWDB_ALL >= 18 && PWDB_ALL < 23)\r
+ SQ = 60;\r
+ else if(PWDB_ALL >= 8 && PWDB_ALL < 18)\r
+ SQ = 40;\r
+ else\r
+ SQ = 10; \r
+\r
+ if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7\r
+ SQ = 20;\r
+#endif \r
+\r
+ }\r
+ else if(IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)){\r
+\r
+ //\r
+ // <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11\r
+ // 802.11n, 802.11b, 802.11g only at channel 6\r
+ //\r
+ // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm)\r
+ // 50 5 -49\r
+ // 55 5 -49\r
+ // 60 5 -50\r
+ // 65 5 -51\r
+ // 70 5 -52\r
+ // 75 5 -54\r
+ // 80 5 -55\r
+ // 85 4 -60\r
+ // 90 3 -63\r
+ // 95 3 -65\r
+ // 100 2 -67\r
+ // 102 2 -67\r
+ // 104 1 -70\r
+ // \r
+\r
+ if(PWDB_ALL >= 50)\r
+ SQ = 100;\r
+ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) \r
+ SQ = 80;\r
+ else if(PWDB_ALL >= 31 && PWDB_ALL < 35)\r
+ SQ = 60;\r
+ else if(PWDB_ALL >= 22 && PWDB_ALL < 31)\r
+ SQ = 40;\r
+ else if(PWDB_ALL >= 18 && PWDB_ALL < 22)\r
+ SQ = 20;\r
+ else\r
+ SQ = 10;\r
+ } else {\r
+ if (PWDB_ALL >= 50)\r
+ SQ = 100;\r
+ else if (PWDB_ALL >= 35 && PWDB_ALL < 50) \r
+ SQ = 80;\r
+ else if (PWDB_ALL >= 22 && PWDB_ALL < 35)\r
+ SQ = 60;\r
+ else if (PWDB_ALL >= 18 && PWDB_ALL < 22)\r
+ SQ = 40;\r
+ else\r
+ SQ = 10;\r
+ }\r
+ \r
+ }\r
+ else\r
+ {//OFDM rate \r
+\r
+ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||\r
+ IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))\r
+ {\r
+ if(RSSI >= 45)\r
+ SQ = 100;\r
+ else if(RSSI >= 22 && RSSI < 45)\r
+ SQ = 80;\r
+ else if(RSSI >= 18 && RSSI < 22)\r
+ SQ = 40;\r
+ else\r
+ SQ = 20;\r
+ } else {\r
+ if(RSSI >= 45)\r
+ SQ = 100;\r
+ else if(RSSI >= 22 && RSSI < 45)\r
+ SQ = 80;\r
+ else if(RSSI >= 18 && RSSI < 22)\r
+ SQ = 40;\r
+ else\r
+ SQ = 20; \r
+ }\r
+ }\r
+\r
+ RT_TRACE(COMP_DBG, DBG_TRACE, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));\r
+ \r
+#endif\r
+ return SQ;\r
+}\r
+\r
+static u1Byte odm_SQ_process_patch_RT_CID_819x_Acer(\r
+ IN PDM_ODM_T pDM_Odm,\r
+ IN u1Byte isCCKrate,\r
+ IN u1Byte PWDB_ALL,\r
+ IN u1Byte path,\r
+ IN u1Byte RSSI\r
+)\r
+{\r
+ u1Byte SQ = 0;\r
+ \r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) \r
+\r
+ if(isCCKrate){\r
+\r
+ RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n"));\r
+ \r
+#if OS_WIN_FROM_WIN8(OS_VERSION) \r
+\r
+ if(PWDB_ALL >= 50)\r
+ SQ = 100;\r
+ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) \r
+ SQ = 80;\r
+ else if(PWDB_ALL >= 30 && PWDB_ALL < 35)\r
+ SQ = 60;\r
+ else if(PWDB_ALL >= 25 && PWDB_ALL < 30)\r
+ SQ = 40;\r
+ else if(PWDB_ALL >= 20 && PWDB_ALL < 25)\r
+ SQ = 20;\r
+ else\r
+ SQ = 10; \r
+#else\r
+ if(PWDB_ALL >= 50)\r
+ SQ = 100;\r
+ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) \r
+ SQ = 80;\r
+ else if(PWDB_ALL >= 30 && PWDB_ALL < 35)\r
+ SQ = 60;\r
+ else if(PWDB_ALL >= 25 && PWDB_ALL < 30)\r
+ SQ = 40;\r
+ else if(PWDB_ALL >= 20 && PWDB_ALL < 25)\r
+ SQ = 20;\r
+ else\r
+ SQ = 10; \r
+\r
+ if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7\r
+ SQ = 20;\r
+#endif \r
+\r
+ \r
+ \r
+ }\r
+ else\r
+ {//OFDM rate \r
+\r
+ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||\r
+ IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))\r
+ {\r
+ if(RSSI >= 45)\r
+ SQ = 100;\r
+ else if(RSSI >= 22 && RSSI < 45)\r
+ SQ = 80;\r
+ else if(RSSI >= 18 && RSSI < 22)\r
+ SQ = 40;\r
+ else\r
+ SQ = 20;\r
+ }\r
+ else\r
+ {\r
+ if(RSSI >= 35)\r
+ SQ = 100;\r
+ else if(RSSI >= 30 && RSSI < 35)\r
+ SQ = 80;\r
+ else if(RSSI >= 25 && RSSI < 30)\r
+ SQ = 40;\r
+ else\r
+ SQ = 20; \r
+ }\r
+ }\r
+\r
+ RT_TRACE(COMP_DBG, DBG_LOUD, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));\r
+ \r
+#endif\r
+ return SQ;\r
+}\r
+ \r
+static u1Byte \r
+odm_EVMdbToPercentage(\r
+ IN s1Byte Value\r
+ )\r
+{\r
+ //\r
+ // -33dB~0dB to 0%~99%\r
+ //\r
+ s1Byte ret_val;\r
+ \r
+ ret_val = Value;\r
+ ret_val /= 2;\r
+\r
+ /*DbgPrint("Value=%d\n", Value);*/\r
+ /*ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x\n", ret_val, ret_val));*/\r
+#ifdef ODM_EVM_ENHANCE_ANTDIV\r
+ if (ret_val >= 0)\r
+ ret_val = 0;\r
+\r
+ if (ret_val <= -40)\r
+ ret_val = -40;\r
+\r
+ ret_val = 0 - ret_val;\r
+ ret_val *= 3;\r
+#else\r
+ if (ret_val >= 0)\r
+ ret_val = 0;\r
+\r
+ if (ret_val <= -33)\r
+ ret_val = -33;\r
+\r
+ ret_val = 0 - ret_val;\r
+ ret_val *= 3;\r
+\r
+ if (ret_val == 99)\r
+ ret_val = 100;\r
+#endif\r
+\r
+ return (u1Byte)ret_val;\r
+}\r
+ \r
+static u1Byte \r
+odm_EVMdbm_JaguarSeries(\r
+ IN s1Byte Value\r
+ )\r
+{\r
+ s1Byte ret_val = Value;\r
+ \r
+ // -33dB~0dB to 33dB ~ 0dB\r
+ if(ret_val == -128)\r
+ ret_val = 127;\r
+ else if (ret_val < 0)\r
+ ret_val = 0 - ret_val;\r
+ \r
+ ret_val = ret_val >> 1;\r
+ return (u1Byte)ret_val;\r
+}\r
+\r
+static s2Byte\r
+odm_Cfo(\r
+ IN s1Byte Value\r
+)\r
+{\r
+ s2Byte ret_val;\r
+\r
+ if (Value < 0)\r
+ {\r
+ ret_val = 0 - Value;\r
+ ret_val = (ret_val << 1) + (ret_val >> 1) ; // *2.5~=312.5/2^7\r
+ ret_val = ret_val | BIT12; // set bit12 as 1 for negative cfo\r
+ }\r
+ else\r
+ {\r
+ ret_val = Value;\r
+ ret_val = (ret_val << 1) + (ret_val>>1) ; // *2.5~=312.5/2^7\r
+ }\r
+ return ret_val;\r
+}\r
+\r
+#if(ODM_IC_11N_SERIES_SUPPORT == 1)\r
+\r
+s1Byte\r
+odm_CCKRSSI_8703B(\r
+ IN u2Byte LNA_idx,\r
+ IN u1Byte VGA_idx\r
+ )\r
+{\r
+ s1Byte rx_pwr_all = 0x00;\r
+ \r
+ switch (LNA_idx) {\r
+ case 0xf:\r
+ rx_pwr_all = -48 - (2 * VGA_idx);\r
+ break; \r
+ case 0xb:\r
+ rx_pwr_all = -42 - (2 * VGA_idx); /*TBD*/\r
+ break;\r
+ case 0xa:\r
+ rx_pwr_all = -36 - (2 * VGA_idx);\r
+ break;\r
+ case 8:\r
+ rx_pwr_all = -32 - (2 * VGA_idx);\r
+ break;\r
+ case 7: \r
+ rx_pwr_all = -28 - (2 * VGA_idx); /*TBD*/\r
+ break;\r
+ case 4: \r
+ rx_pwr_all = -16 - (2 * VGA_idx);\r
+ break;\r
+ case 0: \r
+ rx_pwr_all = -2 - (2 * VGA_idx);\r
+ break;\r
+ default:\r
+ /*rx_pwr_all = -53+(2*(31-VGA_idx));*/\r
+ /*DbgPrint("wrong LNA index\n");*/\r
+ break;\r
+ \r
+ }\r
+ return rx_pwr_all;\r
+}\r
+\r
+VOID\r
+odm_RxPhyStatus92CSeries_Parsing(\r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ OUT PODM_PHY_INFO_T pPhyInfo, \r
+ IN pu1Byte pPhyStatus,\r
+ IN PODM_PACKET_INFO_T pPktinfo\r
+ )\r
+{ \r
+ SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;\r
+ u1Byte i, Max_spatial_stream;\r
+ s1Byte rx_pwr[4], rx_pwr_all=0;\r
+ u1Byte EVM, PWDB_ALL = 0, PWDB_ALL_BT;\r
+ u1Byte RSSI, total_rssi=0;\r
+ BOOLEAN isCCKrate=FALSE; \r
+ u1Byte rf_rx_num = 0;\r
+ u1Byte cck_highpwr = 0;\r
+ u1Byte LNA_idx = 0;\r
+ u1Byte VGA_idx = 0;\r
+ PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;\r
+\r
+ isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M) ? TRUE : FALSE;\r
+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;\r
+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
+\r
+\r
+ if(isCCKrate)\r
+ {\r
+ u1Byte report;\r
+ u1Byte cck_agc_rpt;\r
+ \r
+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;\r
+ // \r
+ // (1)Hardware does not provide RSSI for CCK\r
+ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
+ //\r
+\r
+ //if(pHalData->eRFPowerState == eRfOn)\r
+ cck_highpwr = pDM_Odm->bCckHighPower;\r
+ //else\r
+ // cck_highpwr = FALSE;\r
+\r
+ cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;\r
+ \r
+ //2011.11.28 LukeLee: 88E use different LNA & VGA gain table\r
+ //The RSSI formula should be modified according to the gain table\r
+ //In 88E, cck_highpwr is always set to 1\r
+ if (pDM_Odm->SupportICType & (ODM_RTL8703B)) {\r
+ \r
+ #if (RTL8703B_SUPPORT == 1)\r
+ if (pDM_Odm->cck_agc_report_type == 1) { /*4 bit LNA*/\r
+\r
+ u1Byte cck_agc_rpt_b = (pPhyStaRpt->cck_rpt_b_ofdm_cfosho_b & BIT7) ? 1 : 0;\r
+ \r
+ LNA_idx = (cck_agc_rpt_b << 3) | ((cck_agc_rpt & 0xE0) >> 5);\r
+ VGA_idx = (cck_agc_rpt & 0x1F);\r
+ \r
+ rx_pwr_all = odm_CCKRSSI_8703B(LNA_idx, VGA_idx);\r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+ if (PWDB_ALL > 100)\r
+ PWDB_ALL = 100; \r
+ \r
+ }\r
+ #endif\r
+ } else if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8188F)) /*3 bit LNA*/\r
+ {\r
+ LNA_idx = ((cck_agc_rpt & 0xE0) >>5);\r
+ VGA_idx = (cck_agc_rpt & 0x1F); \r
+ if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E))\r
+ {\r
+ if(pDM_Odm->cck_agc_report_type == 0 && (pDM_Odm->SupportICType & ODM_RTL8192E) )\r
+ {\r
+ switch(LNA_idx)\r
+ {\r
+ case 7:\r
+ rx_pwr_all = -45 - 2*(VGA_idx);\r
+ break;\r
+ case 6:\r
+ rx_pwr_all = -43 -2*(VGA_idx); \r
+ break;\r
+ case 5:\r
+ rx_pwr_all = -27 - 2*(VGA_idx); \r
+ break;\r
+ case 4:\r
+ rx_pwr_all = -21 - 2*(VGA_idx); \r
+ break;\r
+ case 3:\r
+ rx_pwr_all = -18 - 2*(VGA_idx); \r
+ break;\r
+ case 2:\r
+ rx_pwr_all = -6 - 2*(VGA_idx);\r
+ break;\r
+ case 1:\r
+ rx_pwr_all = 9 -2*(VGA_idx);\r
+ break;\r
+ case 0:\r
+ rx_pwr_all = 15 -2*(VGA_idx);\r
+ break;\r
+ default:\r
+\r
+ break;\r
+ }\r
+\r
+ if(pDM_Odm->BoardType & ODM_BOARD_EXT_LNA)\r
+ {\r
+ rx_pwr_all -= pDM_Odm->ExtLNAGain;\r
+ }\r
+ \r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+ }\r
+ else\r
+ { \r
+ switch(LNA_idx)\r
+ {\r
+ case 7:\r
+ if(VGA_idx <= 27)\r
+ rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2\r
+ else\r
+ rx_pwr_all = -100;\r
+ break;\r
+ case 6:\r
+ rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0\r
+ break;\r
+ case 5:\r
+ rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5\r
+ break;\r
+ case 4:\r
+ rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4\r
+ break;\r
+ case 3:\r
+ //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
+ rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
+ break;\r
+ case 2:\r
+ if(cck_highpwr)\r
+ rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0\r
+ else\r
+ rx_pwr_all = -6+ 2*(5-VGA_idx);\r
+ break;\r
+ case 1:\r
+ rx_pwr_all = 8-2*VGA_idx;\r
+ break;\r
+ case 0:\r
+ rx_pwr_all = 14-2*VGA_idx;\r
+ break;\r
+ default:\r
+ //DbgPrint("CCK Exception default\n");\r
+ break;\r
+ }\r
+ rx_pwr_all += 8;\r
+\r
+ //2012.10.08 LukeLee: Modify for 92E CCK RSSI\r
+ if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
+ rx_pwr_all += 8;\r
+ \r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+ if(cck_highpwr == FALSE)\r
+ {\r
+ if(PWDB_ALL >= 80)\r
+ PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;\r
+ else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
+ PWDB_ALL += 3;\r
+ if(PWDB_ALL>100)\r
+ PWDB_ALL = 100;\r
+ }\r
+ }\r
+ }\r
+ else if(pDM_Odm->SupportICType & (ODM_RTL8723B))\r
+ {\r
+#if (RTL8723B_SUPPORT == 1) \r
+ rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx,VGA_idx);\r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+ if(PWDB_ALL>100)\r
+ PWDB_ALL = 100; \r
+#endif \r
+ } else if (pDM_Odm->SupportICType & (ODM_RTL8188F)) {\r
+#if (RTL8188F_SUPPORT == 1)\r
+ rx_pwr_all = odm_CCKRSSI_8188F(LNA_idx, VGA_idx);\r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+ if (PWDB_ALL > 100)\r
+ PWDB_ALL = 100;\r
+#endif\r
+ }\r
+ }\r
+ else\r
+ {\r
+ if(!cck_highpwr)\r
+ { \r
+ report =( cck_agc_rpt & 0xc0 )>>6;\r
+ switch(report)\r
+ {\r
+ // 03312009 modified by cosa\r
+ // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion\r
+ // Note: different RF with the different RNA gain.\r
+ case 0x3:\r
+ rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);\r
+ break;\r
+ case 0x2:\r
+ rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);\r
+ break;\r
+ case 0x1:\r
+ rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);\r
+ break;\r
+ case 0x0:\r
+ rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);\r
+ break;\r
+ }\r
+ }\r
+ else\r
+ {\r
+ //report = pDrvInfo->cfosho[0] & 0x60; \r
+ //report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60;\r
+ \r
+ report = (cck_agc_rpt & 0x60)>>5;\r
+ switch(report)\r
+ {\r
+ case 0x3:\r
+ rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ;\r
+ break;\r
+ case 0x2:\r
+ rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1);\r
+ break;\r
+ case 0x1:\r
+ rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ;\r
+ break;\r
+ case 0x0:\r
+ rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ;\r
+ break;\r
+ }\r
+ }\r
+\r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+\r
+ //Modification for ext-LNA board\r
+ if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))\r
+ {\r
+ if((cck_agc_rpt>>7) == 0){\r
+ PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6);\r
+ }\r
+ else \r
+ {\r
+ if(PWDB_ALL > 38)\r
+ PWDB_ALL -= 16;\r
+ else\r
+ PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12);\r
+ } \r
+\r
+ //CCK modification\r
+ if(PWDB_ALL > 25 && PWDB_ALL <= 60)\r
+ PWDB_ALL += 6;\r
+ //else if (PWDB_ALL <= 25)\r
+ // PWDB_ALL += 8;\r
+ }\r
+ else//Modification for int-LNA board\r
+ {\r
+ if(PWDB_ALL > 99)\r
+ PWDB_ALL -= 8;\r
+ else if(PWDB_ALL > 50 && PWDB_ALL <= 68)\r
+ PWDB_ALL += 4;\r
+ }\r
+ }\r
+\r
+ pDM_Odm->cck_lna_idx = LNA_idx;\r
+ pDM_Odm->cck_vga_idx = VGA_idx;\r
+ pPhyInfo->RxPWDBAll = PWDB_ALL;\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;\r
+ pPhyInfo->RecvSignalPower = rx_pwr_all;\r
+#endif \r
+ //\r
+ // (3) Get Signal Quality (EVM)\r
+ //\r
+ //if(pPktinfo->bPacketMatchBSSID)\r
+ {\r
+ u1Byte SQ,SQ_rpt; \r
+ \r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) \r
+ if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
+ (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){\r
+ SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
+ }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
+ (pDM_Odm->PatchID==RT_CID_819x_Acer))\r
+ {\r
+ SQ = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
+ }else \r
+#endif\r
+ if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){\r
+ SQ = 100;\r
+ }\r
+ else{ \r
+ SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;\r
+ \r
+ if(SQ_rpt > 64)\r
+ SQ = 0;\r
+ else if (SQ_rpt < 20)\r
+ SQ = 100;\r
+ else\r
+ SQ = ((64-SQ_rpt) * 100) / 44;\r
+ \r
+ }\r
+ \r
+ //DbgPrint("cck SQ = %d\n", SQ);\r
+ pPhyInfo->SignalQuality = SQ;\r
+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;\r
+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
+ }\r
+\r
+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {\r
+ if (i == 0)\r
+ pPhyInfo->RxMIMOSignalStrength[0] = PWDB_ALL;\r
+ else\r
+ pPhyInfo->RxMIMOSignalStrength[1] = 0;\r
+ }\r
+ }\r
+ else //2 is OFDM rate\r
+ {\r
+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
+\r
+ // \r
+ // (1)Get RSSI for HT rate\r
+ //\r
+ \r
+ for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) \r
+ {\r
+ // 2008/01/30 MH we will judge RF RX path now.\r
+ if (pDM_Odm->RFPathRxEnable & BIT(i))\r
+ rf_rx_num++;\r
+ //else\r
+ //continue;\r
+\r
+ rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110;\r
+ pDM_Odm->ofdm_agc_idx[i] = (pPhyStaRpt->path_agc[i].gain & 0x3F);\r
+\r
+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ pPhyInfo->RxPwr[i] = rx_pwr[i];\r
+ #endif \r
+\r
+ /* Translate DBM to percentage. */\r
+ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);\r
+ total_rssi += RSSI;\r
+ //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));\r
+\r
+\r
+ if(pDM_Odm->SupportICType&ODM_RTL8192C)\r
+ { \r
+ //Modification for ext-LNA board \r
+ if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))\r
+ {\r
+ if((pPhyStaRpt->path_agc[i].trsw) == 1)\r
+ RSSI = (RSSI>94)?100:(RSSI +6);\r
+ else\r
+ RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16);\r
+\r
+ if((RSSI <= 34) && (RSSI >=4))\r
+ RSSI -= 4;\r
+ } \r
+ }\r
+ \r
+ pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;\r
+\r
+ #if (DM_ODM_SUPPORT_TYPE & (/*ODM_WIN|*/ODM_CE|ODM_AP))\r
+ //Get Rx snr value in DB \r
+ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2);\r
+ #endif\r
+ \r
+ /* Record Signal Strength for next packet */\r
+ //if(pPktinfo->bPacketMatchBSSID)\r
+ { \r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) \r
+ if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
+ (pDM_Odm->PatchID==RT_CID_819x_Lenovo))\r
+ {\r
+ if(i==ODM_RF_PATH_A)\r
+ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI);\r
+ \r
+ } \r
+ else if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
+ (pDM_Odm->PatchID==RT_CID_819x_Acer))\r
+ {\r
+ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,RSSI);\r
+ } \r
+#endif \r
+ }\r
+ }\r
+ \r
+ \r
+ //\r
+ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
+ //\r
+ rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110; \r
+ \r
+ PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); \r
+ \r
+ \r
+ pPhyInfo->RxPWDBAll = PWDB_ALL;\r
+ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));\r
+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;\r
+ pPhyInfo->RxPower = rx_pwr_all;\r
+ pPhyInfo->RecvSignalPower = rx_pwr_all;\r
+ #endif\r
+ \r
+ if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){\r
+ //do nothing \r
+ }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==25)){\r
+ //do nothing \r
+ }\r
+ else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo\r
+ //\r
+ // (3)EVM of HT rate\r
+ //\r
+ if(pPktinfo->DataRate >=ODM_RATEMCS8 && pPktinfo->DataRate <=ODM_RATEMCS15)\r
+ Max_spatial_stream = 2; //both spatial stream make sense\r
+ else\r
+ Max_spatial_stream = 1; //only spatial stream 1 makes sense\r
+\r
+ for(i=0; i<Max_spatial_stream; i++)\r
+ {\r
+ // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment\r
+ // fill most significant bit to "zero" when doing shifting operation which may change a negative \r
+ // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. \r
+ EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] )); //dbm\r
+\r
+ //GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM));\r
+ \r
+ //if(pPktinfo->bPacketMatchBSSID)\r
+ {\r
+ if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only\r
+ { \r
+ pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff);\r
+ } \r
+ pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff);\r
+ }\r
+ }\r
+ }\r
+\r
+ ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail);\r
+ \r
+ }\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ //UI BSS List signal strength(in percentage), make it good looking, from 0~100.\r
+ //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().\r
+ if(isCCKrate)\r
+ { \r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ \r
+ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, PWDB_ALL, TRUE, TRUE);\r
+#else\r
+ #ifdef CONFIG_SIGNAL_SCALE_MAPPING\r
+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/*PWDB_ALL;*/\r
+ #else\r
+ pPhyInfo->SignalStrength = (u1Byte)PWDB_ALL;\r
+ #endif\r
+#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/\r
+ }\r
+ else\r
+ { \r
+ if (rf_rx_num != 0)\r
+ { \r
+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ \r
+ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, (total_rssi /= rf_rx_num), TRUE, FALSE);\r
+ #else\r
+ #ifdef CONFIG_SIGNAL_SCALE_MAPPING\r
+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi /= rf_rx_num));\r
+ #else\r
+ total_rssi/=rf_rx_num;\r
+ pPhyInfo->SignalStrength = (u1Byte)total_rssi;\r
+ #endif\r
+ #endif\r
+ }\r
+ }\r
+#endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))*/\r
+\r
+ //DbgPrint("isCCKrate = %d, pPhyInfo->RxPWDBAll = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", \r
+ //isCCKrate, pPhyInfo->RxPWDBAll, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a);\r
+\r
+ //For 92C/92D HW (Hybrid) Antenna Diversity\r
+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))\r
+ //For 88E HW Antenna Diversity\r
+ pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;\r
+ pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;\r
+ pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;\r
+#endif\r
+}\r
+#endif\r
+\r
+#if ODM_IC_11AC_SERIES_SUPPORT\r
+\r
+VOID\r
+odm_RxPhyBWJaguarSeries_Parsing(\r
+ OUT PODM_PHY_INFO_T pPhyInfo,\r
+ IN PODM_PACKET_INFO_T pPktinfo,\r
+ IN PPHY_STATUS_RPT_8812_T pPhyStaRpt\r
+)\r
+{\r
+\r
+ if(pPktinfo->DataRate <= ODM_RATE54M) {\r
+ switch (pPhyStaRpt->r_RFMOD) {\r
+ case 1:\r
+ if (pPhyStaRpt->sub_chnl == 0)\r
+ pPhyInfo->BandWidth = 1;\r
+ else\r
+ pPhyInfo->BandWidth = 0;\r
+ break;\r
+\r
+ case 2:\r
+ if (pPhyStaRpt->sub_chnl == 0)\r
+ pPhyInfo->BandWidth = 2;\r
+ else if (pPhyStaRpt->sub_chnl == 9 || pPhyStaRpt->sub_chnl == 10)\r
+ pPhyInfo->BandWidth = 1;\r
+ else\r
+ pPhyInfo->BandWidth = 0;\r
+ break;\r
+\r
+ default:\r
+ case 0:\r
+ pPhyInfo->BandWidth = 0;\r
+ break;\r
+ }\r
+ }\r
+\r
+}\r
+\r
+VOID\r
+odm_RxPhyStatusJaguarSeries_Parsing(\r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ OUT PODM_PHY_INFO_T pPhyInfo,\r
+ IN pu1Byte pPhyStatus,\r
+ IN PODM_PACKET_INFO_T pPktinfo\r
+)\r
+{\r
+ u1Byte i, Max_spatial_stream;\r
+ s1Byte rx_pwr[4], rx_pwr_all = 0;\r
+ u1Byte EVM, EVMdbm, PWDB_ALL = 0, PWDB_ALL_BT;\r
+ u1Byte RSSI, avg_rssi = 0, best_rssi = 0, second_rssi = 0;\r
+ u1Byte isCCKrate = 0; \r
+ u1Byte rf_rx_num = 0;\r
+ u1Byte cck_highpwr = 0;\r
+ u1Byte LNA_idx, VGA_idx;\r
+ PPHY_STATUS_RPT_8812_T pPhyStaRpt = (PPHY_STATUS_RPT_8812_T)pPhyStatus;\r
+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;\r
+\r
+ odm_RxPhyBWJaguarSeries_Parsing(pPhyInfo, pPktinfo, pPhyStaRpt);\r
+\r
+ if (pPktinfo->DataRate <= ODM_RATE11M)\r
+ isCCKrate = TRUE;\r
+ else\r
+ isCCKrate = FALSE;\r
+\r
+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;\r
+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_C] = -1;\r
+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_D] = -1;\r
+\r
+ if (isCCKrate) {\r
+ u1Byte cck_agc_rpt;\r
+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;\r
+\r
+ /*(1)Hardware does not provide RSSI for CCK*/\r
+ /*(2)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/\r
+\r
+ /*if(pHalData->eRFPowerState == eRfOn)*/\r
+ cck_highpwr = pDM_Odm->bCckHighPower;\r
+ /*else*/\r
+ /*cck_highpwr = FALSE;*/\r
+\r
+ cck_agc_rpt = pPhyStaRpt->cfosho[0] ;\r
+ LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);\r
+ VGA_idx = (cck_agc_rpt & 0x1F);\r
+\r
+ if (pDM_Odm->SupportICType == ODM_RTL8812) {\r
+ switch (LNA_idx) {\r
+ case 7:\r
+ if (VGA_idx <= 27)\r
+ rx_pwr_all = -100 + 2 * (27 - VGA_idx); /*VGA_idx = 27~2*/\r
+ else\r
+ rx_pwr_all = -100;\r
+ break;\r
+ case 6:\r
+ rx_pwr_all = -48 + 2 * (2 - VGA_idx); /*VGA_idx = 2~0*/\r
+ break;\r
+ case 5:\r
+ rx_pwr_all = -42 + 2 * (7 - VGA_idx); /*VGA_idx = 7~5*/\r
+ break;\r
+ case 4:\r
+ rx_pwr_all = -36 + 2 * (7 - VGA_idx); /*VGA_idx = 7~4*/\r
+ break;\r
+ case 3:\r
+ /*rx_pwr_all = -28 + 2*(7-VGA_idx); VGA_idx = 7~0*/\r
+ rx_pwr_all = -24 + 2 * (7 - VGA_idx); /*VGA_idx = 7~0*/\r
+ break;\r
+ case 2:\r
+ if (cck_highpwr)\r
+ rx_pwr_all = -12 + 2 * (5 - VGA_idx); /*VGA_idx = 5~0*/\r
+ else\r
+ rx_pwr_all = -6 + 2 * (5 - VGA_idx);\r
+ break;\r
+ case 1:\r
+ rx_pwr_all = 8 - 2 * VGA_idx;\r
+ break;\r
+ case 0:\r
+ rx_pwr_all = 14 - 2 * VGA_idx;\r
+ break;\r
+ default:\r
+ /*DbgPrint("CCK Exception default\n");*/\r
+ break;\r
+ }\r
+ rx_pwr_all += 6;\r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+\r
+ if (cck_highpwr == FALSE) {\r
+ if (PWDB_ALL >= 80)\r
+ PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80;\r
+ else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
+ PWDB_ALL += 3;\r
+ if (PWDB_ALL > 100)\r
+ PWDB_ALL = 100;\r
+ }\r
+ } else if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8881A)) {\r
+ s1Byte Pout = -6;\r
+\r
+ switch (LNA_idx) {\r
+ case 5:\r
+ rx_pwr_all = Pout - 32 - (2 * VGA_idx);\r
+ break;\r
+ case 4:\r
+ rx_pwr_all = Pout - 24 - (2 * VGA_idx);\r
+ break;\r
+ case 2:\r
+ rx_pwr_all = Pout - 11 - (2 * VGA_idx);\r
+ break;\r
+ case 1:\r
+ rx_pwr_all = Pout + 5 - (2 * VGA_idx);\r
+ break;\r
+ case 0:\r
+ rx_pwr_all = Pout + 21 - (2 * VGA_idx);\r
+ break;\r
+ }\r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+ } else if (pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8822B) {\r
+ s1Byte Pout = -6;\r
+\r
+ switch (LNA_idx) {\r
+ /*CCK only use LNA: 2, 3, 5, 7*/\r
+ case 7:\r
+ rx_pwr_all = Pout - 32 - (2 * VGA_idx);\r
+ break;\r
+ case 5:\r
+ rx_pwr_all = Pout - 22 - (2 * VGA_idx);\r
+ break;\r
+ case 3:\r
+ rx_pwr_all = Pout - 2 - (2 * VGA_idx);\r
+ break;\r
+ case 2:\r
+ rx_pwr_all = Pout + 5 - (2 * VGA_idx);\r
+ break;\r
+ /*case 6:*/\r
+ /*rx_pwr_all = Pout -26 - (2*VGA_idx);*/\r
+ /*break;*/\r
+ /*case 4:*/\r
+ /*rx_pwr_all = Pout - 8 - (2*VGA_idx);*/\r
+ /*break;*/\r
+ /*case 1:*/\r
+ /*rx_pwr_all = Pout + 21 - (2*VGA_idx);*/\r
+ /*break;*/\r
+ /*case 0:*/\r
+ /*rx_pwr_all = Pout + 10 - (2*VGA_idx);*/\r
+/* // break;*/\r
+ default:\r
+/* //DbgPrint("CCK Exception default\n");*/\r
+ break;\r
+ }\r
+ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+ }\r
+\r
+ pPhyInfo->RxPWDBAll = PWDB_ALL;\r
+/* //if(pPktinfo->StationID == 0)*/\r
+/* //{*/\r
+/* // DbgPrint("CCK: LNA_idx = %d, VGA_idx = %d, pPhyInfo->RxPWDBAll = %d\n",*/\r
+/* // LNA_idx, VGA_idx, pPhyInfo->RxPWDBAll);*/\r
+/* //}*/\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;\r
+ pPhyInfo->RecvSignalPower = rx_pwr_all;\r
+#endif\r
+ /*(3) Get Signal Quality (EVM)*/\r
+ if (pPktinfo->bPacketMatchBSSID) {\r
+ u1Byte SQ, SQ_rpt;\r
+\r
+ if ((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
+ (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) {\r
+ SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, 0, 0);\r
+ } else if (pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest) {\r
+ SQ = 100;\r
+ } else {\r
+ SQ_rpt = pPhyStaRpt->pwdb_all;\r
+\r
+ if (SQ_rpt > 64)\r
+ SQ = 0;\r
+ else if (SQ_rpt < 20)\r
+ SQ = 100;\r
+ else\r
+ SQ = ((64 - SQ_rpt) * 100) / 44;\r
+ }\r
+\r
+/* //DbgPrint("cck SQ = %d\n", SQ);*/\r
+ pPhyInfo->SignalQuality = SQ;\r
+ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;\r
+ }\r
+\r
+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {\r
+ if (i == 0)\r
+ pPhyInfo->RxMIMOSignalStrength[0] = PWDB_ALL;\r
+ else\r
+ pPhyInfo->RxMIMOSignalStrength[i] = 0;\r
+ }\r
+ } else { \r
+ /*is OFDM rate*/\r
+ pDM_FatTable->hw_antsw_occur = pPhyStaRpt->hw_antsw_occur;\r
+ \r
+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
+\r
+ /*(1)Get RSSI for OFDM rate*/\r
+\r
+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {\r
+ /*2008/01/30 MH we will judge RF RX path now.*/\r
+/* //DbgPrint("pDM_Odm->RFPathRxEnable = %x\n", pDM_Odm->RFPathRxEnable);*/\r
+ if (pDM_Odm->RFPathRxEnable & BIT(i))\r
+ rf_rx_num++;\r
+/* //else*/\r
+/* //continue;*/\r
+ /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/\r
+/* //if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))*/\r
+ if (i < ODM_RF_PATH_C)\r
+ rx_pwr[i] = (pPhyStaRpt->gain_trsw[i] & 0x7F) - 110;\r
+ else\r
+ rx_pwr[i] = (pPhyStaRpt->gain_trsw_cd[i - 2] & 0x7F) - 110;\r
+/* //else*/\r
+ /*rx_pwr[i] = ((pPhyStaRpt->gain_trsw[i]& 0x3F)*2) - 110; OLD FORMULA*/\r
+\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ pPhyInfo->RxPwr[i] = rx_pwr[i];\r
+#endif\r
+\r
+ /* Translate DBM to percentage. */\r
+ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); \r
+ \r
+ /*total_rssi += RSSI;*/\r
+ /*Get the best two RSSI*/\r
+ if (RSSI > best_rssi && RSSI > second_rssi) {\r
+ second_rssi = best_rssi;\r
+ best_rssi = RSSI;\r
+ } else if (RSSI > second_rssi && RSSI <= best_rssi)\r
+ second_rssi = RSSI;\r
+\r
+ /*RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));*/\r
+\r
+ pPhyInfo->RxMIMOSignalStrength[i] = (u1Byte) RSSI;\r
+\r
+\r
+ /*Get Rx snr value in DB*/\r
+ if (i < ODM_RF_PATH_C)\r
+ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->rxsnr[i] / 2;\r
+ else if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B))\r
+ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->csi_current[i - 2] / 2;\r
+\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+ /*(2) CFO_short & CFO_tail*/\r
+ if (i < ODM_RF_PATH_C) {\r
+ pPhyInfo->Cfo_short[i] = odm_Cfo((pPhyStaRpt->cfosho[i]));\r
+ pPhyInfo->Cfo_tail[i] = odm_Cfo((pPhyStaRpt->cfotail[i]));\r
+ }\r
+#endif\r
+ /* Record Signal Strength for next packet */\r
+ if (pPktinfo->bPacketMatchBSSID) {\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ if ((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
+ (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) {\r
+ if (i == ODM_RF_PATH_A)\r
+ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, i, RSSI);\r
+\r
+ }\r
+#endif\r
+ }\r
+ }\r
+\r
+ /*(3)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/\r
+\r
+ /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/\r
+ if ((pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) && (!pDM_Odm->bIsMPChip))\r
+ rx_pwr_all = (pPhyStaRpt->pwdb_all & 0x7f) - 110;\r
+ else\r
+ rx_pwr_all = (((pPhyStaRpt->pwdb_all) >> 1) & 0x7f) - 110; /*OLD FORMULA*/\r
+\r
+ PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
+\r
+ pPhyInfo->RxPWDBAll = PWDB_ALL;\r
+ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));*/\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;\r
+ pPhyInfo->RxPower = rx_pwr_all;\r
+ pPhyInfo->RecvSignalPower = rx_pwr_all;\r
+#endif\r
+\r
+ if ((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID == 19)) {\r
+ /*do nothing*/\r
+ } else {\r
+ /*pMgntInfo->CustomerID != RT_CID_819x_Lenovo*/\r
+\r
+ /*(4)EVM of OFDM rate*/\r
+ \r
+ if ((pPktinfo->DataRate >= ODM_RATEMCS8) &&\r
+ (pPktinfo->DataRate <= ODM_RATEMCS15))\r
+ Max_spatial_stream = 2;\r
+ else if ((pPktinfo->DataRate >= ODM_RATEVHTSS2MCS0) &&\r
+ (pPktinfo->DataRate <= ODM_RATEVHTSS2MCS9))\r
+ Max_spatial_stream = 2;\r
+ else if ((pPktinfo->DataRate >= ODM_RATEMCS16) &&\r
+ (pPktinfo->DataRate <= ODM_RATEMCS23))\r
+ Max_spatial_stream = 3;\r
+ else if ((pPktinfo->DataRate >= ODM_RATEVHTSS3MCS0) &&\r
+ (pPktinfo->DataRate <= ODM_RATEVHTSS3MCS9))\r
+ Max_spatial_stream = 3;\r
+ else\r
+ Max_spatial_stream = 1;\r
+\r
+ if (pPktinfo->bPacketMatchBSSID) {\r
+ /*DbgPrint("pPktinfo->DataRate = %d\n", pPktinfo->DataRate);*/\r
+\r
+ for (i = 0; i < Max_spatial_stream; i++) {\r
+ /*Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment*/\r
+ /*fill most significant bit to "zero" when doing shifting operation which may change a negative*/\r
+ /*value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.*/\r
+\r
+ if (pPktinfo->DataRate >= ODM_RATE6M && pPktinfo->DataRate <= ODM_RATE54M) {\r
+ if (i == ODM_RF_PATH_A) {\r
+ EVM = odm_EVMdbToPercentage((pPhyStaRpt->sigevm)); /*dbm*/\r
+ EVM += 20;\r
+ if (EVM > 100)\r
+ EVM = 100;\r
+ }\r
+ } else {\r
+ if (i < ODM_RF_PATH_C) {\r
+ if (pPhyStaRpt->rxevm[i] == -128)\r
+ pPhyStaRpt->rxevm[i] = -25;\r
+ EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm[i])); /*dbm*/\r
+ } else {\r
+ if (pPhyStaRpt->rxevm_cd[i - 2] == -128){\r
+ pPhyStaRpt->rxevm_cd[i - 2] = -25;\r
+ }\r
+ EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm_cd[i - 2])); /*dbm*/\r
+ }\r
+ }\r
+\r
+ if (i < ODM_RF_PATH_C)\r
+ EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm[i]);\r
+ else\r
+ EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm_cd[i - 2]);\r
+ /*RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",*/\r
+ /*pPktinfo->DataRate, pPhyStaRpt->rxevm[i], "%", EVM));*/\r
+\r
+ {\r
+ if (i == ODM_RF_PATH_A) { \r
+ /*Fill value in RFD, Get the first spatial stream only*/\r
+ pPhyInfo->SignalQuality = EVM;\r
+ }\r
+ pPhyInfo->RxMIMOSignalQuality[i] = EVM;\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+ pPhyInfo->RxMIMOEVMdbm[i] = EVMdbm;\r
+#endif\r
+ }\r
+ }\r
+ }\r
+ }\r
+\r
+ ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->cfotail);\r
+\r
+ }\r
+/* //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num);*/\r
+\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ /*UI BSS List signal strength(in percentage), make it good looking, from 0~100.*/\r
+ /*It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().*/\r
+ if (isCCKrate) {\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ /*2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/\r
+ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, PWDB_ALL, FALSE, TRUE);\r
+#else\r
+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/*PWDB_ALL;*/\r
+#endif\r
+ } else { \r
+ if (rf_rx_num != 0) {\r
+ /* 2015/01 Sean, use the best two RSSI only, suggested by Ynlin and ChenYu.*/\r
+ if (rf_rx_num == 1)\r
+ avg_rssi = best_rssi;\r
+ else\r
+ avg_rssi = (best_rssi + second_rssi)/2;\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ /* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/ \r
+ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, avg_rssi, FALSE, FALSE);\r
+#else\r
+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, avg_rssi));\r
+#endif\r
+ }\r
+ }\r
+#endif\r
+ pDM_Odm->RxPWDBAve = pDM_Odm->RxPWDBAve + pPhyInfo->RxPWDBAll;\r
+\r
+ pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->antidx_anta;\r
+ pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->antidx_antb;\r
+ pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antidx_antc;\r
+ pDM_Odm->DM_FatTable.antsel_rx_keep_3 = pPhyStaRpt->antidx_antd;\r
+ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]: antidx_anta = ((%d)), MatchBSSID = ((%d))\n", pPktinfo->StationID, pPhyStaRpt->antidx_anta, pPktinfo->bPacketMatchBSSID));*/\r
+\r
+\r
+/* DbgPrint("pPhyStaRpt->antidx_anta = %d, pPhyStaRpt->antidx_antb = %d\n",*/\r
+/* pPhyStaRpt->antidx_anta, pPhyStaRpt->antidx_antb);*/\r
+/* DbgPrint("----------------------------\n");*/\r
+/* DbgPrint("pPktinfo->StationID=%d, pPktinfo->DataRate=0x%x\n",pPktinfo->StationID, pPktinfo->DataRate);*/\r
+/* DbgPrint("pPhyStaRpt->r_RFMOD = %d\n", pPhyStaRpt->r_RFMOD);*/\r
+/* DbgPrint("pPhyStaRpt->gain_trsw[0]=0x%x, pPhyStaRpt->gain_trsw[1]=0x%x\n",*/\r
+/* pPhyStaRpt->gain_trsw[0],pPhyStaRpt->gain_trsw[1]);*/\r
+/* DbgPrint("pPhyStaRpt->gain_trsw[2]=0x%x, pPhyStaRpt->gain_trsw[3]=0x%x\n",*/\r
+/* pPhyStaRpt->gain_trsw_cd[0],pPhyStaRpt->gain_trsw_cd[1]);*/\r
+/* DbgPrint("pPhyStaRpt->pwdb_all = 0x%x, pPhyInfo->RxPWDBAll = %d\n", pPhyStaRpt->pwdb_all, pPhyInfo->RxPWDBAll);*/\r
+/* DbgPrint("pPhyStaRpt->cfotail[i] = 0x%x, pPhyStaRpt->CFO_tail[i] = 0x%x\n", pPhyStaRpt->cfotail[0], pPhyStaRpt->cfotail[1]);*/\r
+/* DbgPrint("pPhyStaRpt->rxevm[0] = %d, pPhyStaRpt->rxevm[1] = %d\n", pPhyStaRpt->rxevm[0], pPhyStaRpt->rxevm[1]);*/\r
+/* DbgPrint("pPhyStaRpt->rxevm[2] = %d, pPhyStaRpt->rxevm[3] = %d\n", pPhyStaRpt->rxevm_cd[0], pPhyStaRpt->rxevm_cd[1]);*/\r
+/* DbgPrint("pPhyInfo->RxMIMOSignalStrength[0]=%d, pPhyInfo->RxMIMOSignalStrength[1]=%d, RxPWDBAll=%d\n",*/\r
+/* pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1], pPhyInfo->RxPWDBAll);*/\r
+/* DbgPrint("pPhyInfo->RxMIMOSignalStrength[2]=%d, pPhyInfo->RxMIMOSignalStrength[3]=%d\n",*/\r
+/* pPhyInfo->RxMIMOSignalStrength[2], pPhyInfo->RxMIMOSignalStrength[3]);*/\r
+/* DbgPrint("ppPhyInfo->RxMIMOSignalQuality[0]=%d, pPhyInfo->RxMIMOSignalQuality[1]=%d\n",*/\r
+/* pPhyInfo->RxMIMOSignalQuality[0], pPhyInfo->RxMIMOSignalQuality[1]);*/\r
+/* DbgPrint("ppPhyInfo->RxMIMOSignalQuality[2]=%d, pPhyInfo->RxMIMOSignalQuality[3]=%d\n",*/\r
+/* pPhyInfo->RxMIMOSignalQuality[2], pPhyInfo->RxMIMOSignalQuality[3]);*/\r
+\r
+}\r
+\r
+#endif\r
+\r
+VOID\r
+odm_Init_RSSIForDM(\r
+ IN OUT PDM_ODM_T pDM_Odm\r
+ )\r
+{\r
+\r
+}\r
+\r
+VOID\r
+odm_Process_RSSIForDM( \r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ IN PODM_PHY_INFO_T pPhyInfo,\r
+ IN PODM_PACKET_INFO_T pPktinfo\r
+ )\r
+{\r
+ \r
+ s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave;\r
+ u1Byte i, isCCKrate=0; \r
+ u1Byte RSSI_max, RSSI_min;\r
+ u4Byte OFDM_pkt=0; \r
+ u4Byte Weighting=0;\r
+ PSTA_INFO_T pEntry;\r
+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) \r
+ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;\r
+ #endif\r
+\r
+ if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM)\r
+ return;\r
+\r
+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY\r
+ odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI(pDM_Odm, pPhyInfo, pPktinfo);\r
+ #endif\r
+\r
+ //\r
+ // 2012/05/30 MH/Luke.Lee Add some description \r
+ // In windows driver: AP/IBSS mode STA\r
+ //\r
+ //if (pDM_Odm->SupportPlatform == ODM_WIN)\r
+ //{\r
+ // pEntry = pDM_Odm->pODM_StaInfo[pDM_Odm->pAidMap[pPktinfo->StationID-1]]; \r
+ //}\r
+ //else\r
+ pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID]; \r
+\r
+ if(!IS_STA_VALID(pEntry) )\r
+ { \r
+ return;\r
+ }\r
+\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) \r
+ if ((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) &&\r
+ (pDM_FatTable->enable_ctrl_frame_antdiv)\r
+ )\r
+ {\r
+ if (pPktinfo->bPacketMatchBSSID)\r
+ pDM_Odm->data_frame_num++;\r
+ \r
+ if ((pDM_FatTable->use_ctrl_frame_antdiv)) {\r
+ if (!pPktinfo->bToSelf)/*data frame + CTRL frame*/\r
+ return;\r
+ } else {\r
+ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/\r
+ return;\r
+ } \r
+ } else\r
+#endif\r
+ {\r
+ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/\r
+ return;\r
+ }\r
+\r
+ if(pPktinfo->bPacketBeacon)\r
+ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++;\r
+ \r
+ isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M )?TRUE :FALSE;\r
+ pDM_Odm->RxRate = pPktinfo->DataRate;\r
+\r
+ //--------------Statistic for antenna/path diversity------------------\r
+ if(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)\r
+ {\r
+ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))\r
+ ODM_Process_RSSIForAntDiv(pDM_Odm,pPhyInfo,pPktinfo);\r
+ #endif\r
+ }\r
+ #if(defined(CONFIG_PATH_DIVERSITY))\r
+ else if(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)\r
+ {\r
+ phydm_process_rssi_for_path_div(pDM_Odm,pPhyInfo,pPktinfo);\r
+ }\r
+ #endif\r
+ //-----------------Smart Antenna Debug Message------------------//\r
+ \r
+ UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;\r
+ UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;\r
+ UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; \r
+ \r
+ if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)\r
+ {\r
+\r
+ if(!isCCKrate)//ofdm rate\r
+ {\r
+#if (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) {\r
+ u1Byte RX_count = 0;\r
+ u4Byte RSSI_linear = 0;\r
+\r
+ if (pDM_Odm->RXAntStatus & ODM_RF_A) {\r
+ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
+ RX_count++;\r
+ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]);\r
+ } else\r
+ pDM_Odm->RSSI_A = 0;\r
+\r
+ if (pDM_Odm->RXAntStatus & ODM_RF_B) {\r
+ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
+ RX_count++;\r
+ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]);\r
+ } else\r
+ pDM_Odm->RSSI_B = 0;\r
+ \r
+ if (pDM_Odm->RXAntStatus & ODM_RF_C) {\r
+ pDM_Odm->RSSI_C = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C];\r
+ RX_count++;\r
+ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C]);\r
+ } else\r
+ pDM_Odm->RSSI_C = 0;\r
+\r
+ if (pDM_Odm->RXAntStatus & ODM_RF_D) {\r
+ pDM_Odm->RSSI_D = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D];\r
+ RX_count++;\r
+ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D]);\r
+ } else\r
+ pDM_Odm->RSSI_D = 0;\r
+\r
+ /* Calculate average RSSI */\r
+ switch (RX_count) {\r
+ case 2:\r
+ RSSI_linear = (RSSI_linear >> 1);\r
+ break;\r
+ case 3:\r
+ RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5; /* RSSI_linear/3 ~ RSSI_linear*11/32 */\r
+ break;\r
+ case 4:\r
+ RSSI_linear = (RSSI_linear >> 2);\r
+ break;\r
+ } \r
+ RSSI_Ave = odm_ConvertTo_dB(RSSI_linear);\r
+ } else\r
+#endif\r
+ {\r
+ if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) {\r
+ RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
+ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
+ pDM_Odm->RSSI_B = 0;\r
+ } else {\r
+ /*DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d\n",*/ \r
+ /*pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]);*/\r
+ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
+ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
+ \r
+ if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) {\r
+ RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
+ RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
+ } else {\r
+ RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
+ RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
+ }\r
+ if ((RSSI_max - RSSI_min) < 3)\r
+ RSSI_Ave = RSSI_max;\r
+ else if ((RSSI_max - RSSI_min) < 6)\r
+ RSSI_Ave = RSSI_max - 1;\r
+ else if ((RSSI_max - RSSI_min) < 10)\r
+ RSSI_Ave = RSSI_max - 2;\r
+ else\r
+ RSSI_Ave = RSSI_max - 3;\r
+ }\r
+ }\r
+ \r
+ //1 Process OFDM RSSI\r
+ if(UndecoratedSmoothedOFDM <= 0) // initialize\r
+ {\r
+ UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;\r
+ }\r
+ else\r
+ {\r
+ if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM)\r
+ {\r
+ UndecoratedSmoothedOFDM = \r
+ ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + \r
+ (RSSI_Ave)) /(Rx_Smooth_Factor);\r
+ UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;\r
+ }\r
+ else\r
+ {\r
+ UndecoratedSmoothedOFDM = \r
+ ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + \r
+ (RSSI_Ave)) /(Rx_Smooth_Factor);\r
+ }\r
+ } \r
+ if (pEntry->rssi_stat.OFDM_pkt != 64) {\r
+ i = 63;\r
+ pEntry->rssi_stat.OFDM_pkt -= (u4Byte)(((pEntry->rssi_stat.PacketMap>>i)&BIT0)-1);\r
+ }\r
+ pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0; \r
+ \r
+ }\r
+ else\r
+ {\r
+ RSSI_Ave = pPhyInfo->RxPWDBAll;\r
+ pDM_Odm->RSSI_A = (u1Byte) pPhyInfo->RxPWDBAll;\r
+ pDM_Odm->RSSI_B = 0xFF;\r
+ pDM_Odm->RSSI_C = 0xFF;\r
+ pDM_Odm->RSSI_D = 0xFF;\r
+\r
+ //1 Process CCK RSSI\r
+ if(UndecoratedSmoothedCCK <= 0) // initialize\r
+ {\r
+ UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;\r
+ }\r
+ else\r
+ {\r
+ if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK)\r
+ {\r
+ UndecoratedSmoothedCCK = \r
+ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + \r
+ (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor);\r
+ UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;\r
+ }\r
+ else\r
+ {\r
+ UndecoratedSmoothedCCK = \r
+ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + \r
+ (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor);\r
+ }\r
+ }\r
+ i = 63;\r
+ pEntry->rssi_stat.OFDM_pkt -= (u4Byte)((pEntry->rssi_stat.PacketMap>>i)&BIT0); \r
+ pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1; \r
+ }\r
+\r
+ //if(pEntry)\r
+ {\r
+ //2011.07.28 LukeLee: modified to prevent unstable CCK RSSI\r
+ if (pEntry->rssi_stat.OFDM_pkt == 64) { /* speed up when all packets are OFDM*/\r
+ UndecoratedSmoothedPWDB = UndecoratedSmoothedOFDM;\r
+ } else {\r
+ if (pEntry->rssi_stat.ValidBit < 64)\r
+ pEntry->rssi_stat.ValidBit++;\r
+\r
+ if (pEntry->rssi_stat.ValidBit == 64) {\r
+ Weighting = ((pEntry->rssi_stat.OFDM_pkt<<4) > 64)?64:(pEntry->rssi_stat.OFDM_pkt<<4);\r
+ UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;\r
+ } else {\r
+ if (pEntry->rssi_stat.ValidBit != 0)\r
+ UndecoratedSmoothedPWDB = (pEntry->rssi_stat.OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-pEntry->rssi_stat.OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;\r
+ else\r
+ UndecoratedSmoothedPWDB = 0;\r
+ }\r
+ }\r
+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE)\r
+ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == -1)\r
+ phydm_ra_rssi_rpt_wk(pDM_Odm);\r
+ #endif\r
+ pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;\r
+ pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;\r
+ pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;\r
+\r
+ //DbgPrint("OFDM_pkt=%d, Weighting=%d\n", OFDM_pkt, Weighting);\r
+ //DbgPrint("UndecoratedSmoothedOFDM=%d, UndecoratedSmoothedPWDB=%d, UndecoratedSmoothedCCK=%d\n", \r
+ // UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK);\r
+ \r
+ }\r
+ \r
+ }\r
+}\r
+\r
+\r
+#if(ODM_IC_11N_SERIES_SUPPORT ==1)\r
+//\r
+// Endianness before calling this API\r
+//\r
+VOID\r
+ODM_PhyStatusQuery_92CSeries(\r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ OUT PODM_PHY_INFO_T pPhyInfo,\r
+ IN pu1Byte pPhyStatus, \r
+ IN PODM_PACKET_INFO_T pPktinfo\r
+ )\r
+{\r
+ odm_RxPhyStatus92CSeries_Parsing(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo);\r
+ odm_Process_RSSIForDM(pDM_Odm, pPhyInfo, pPktinfo);\r
+}\r
+#endif\r
+\r
+\r
+//\r
+// Endianness before calling this API\r
+//\r
+#if ODM_IC_11AC_SERIES_SUPPORT\r
+\r
+VOID\r
+ODM_PhyStatusQuery_JaguarSeries(\r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ OUT PODM_PHY_INFO_T pPhyInfo,\r
+ IN pu1Byte pPhyStatus, \r
+ IN PODM_PACKET_INFO_T pPktinfo\r
+ )\r
+{\r
+ odm_RxPhyStatusJaguarSeries_Parsing(\r
+ pDM_Odm,\r
+ pPhyInfo,\r
+ pPhyStatus,\r
+ pPktinfo);\r
+ \r
+ odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo);\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ //phydm_sbd_check(pDM_Odm);\r
+#endif\r
+}\r
+#endif\r
+\r
+VOID\r
+ODM_PhyStatusQuery(\r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ OUT PODM_PHY_INFO_T pPhyInfo,\r
+ IN pu1Byte pPhyStatus, \r
+ IN PODM_PACKET_INFO_T pPktinfo\r
+ )\r
+{\r
+#if (RTL8822B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType & ODM_RTL8822B) {\r
+ phydm_RxPhyStatusJaguarSeries2(pDM_Odm, pPhyStatus, pPktinfo, pPhyInfo);\r
+ return;\r
+ }\r
+#endif\r
+\r
+#if ODM_IC_11AC_SERIES_SUPPORT\r
+ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)\r
+ ODM_PhyStatusQuery_JaguarSeries(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo);\r
+#endif\r
+\r
+#if ODM_IC_11N_SERIES_SUPPORT\r
+ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES )\r
+ ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo);\r
+#endif\r
+}\r
+ \r
+// For future use.\r
+VOID\rODM_MacStatusQuery(\r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ IN pu1Byte pMacStatus,\r
+ IN u1Byte MacID, \r
+ IN BOOLEAN bPacketMatchBSSID,\r
+ IN BOOLEAN bPacketToSelf,\r
+ IN BOOLEAN bPacketBeacon\r
+ )\r
+{\r
+ // 2011/10/19 Driver team will handle in the future.\r
+ \r
+}\r
+\r
+\r
+//\r
+// If you want to add a new IC, Please follow below template and generate a new one.\r
+// \r
+//\r
+\r
+HAL_STATUS\r
+ODM_ConfigRFWithHeaderFile(\r
+ IN PDM_ODM_T pDM_Odm,\r
+ IN ODM_RF_Config_Type ConfigType,\r
+ IN ODM_RF_RADIO_PATH_E eRFPath\r
+ )\r
+{\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) \r
+ PADAPTER Adapter = pDM_Odm->Adapter;\r
+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); \r
+#endif\r
+\r
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
+ ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
+ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
+ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
+\r
+//1 AP doesn't use PHYDM power tracking table in these ICs\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+#if (RTL8723A_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_MP(8723A,_RadioA);\r
+ }\r
+ }\r
+#endif\r
+#if (RTL8812A_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8812)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A){\r
+ READ_AND_CONFIG_MP(8812A,_RadioA);\r
+ }\r
+ else if(eRFPath == ODM_RF_PATH_B){\r
+ READ_AND_CONFIG_MP(8812A,_RadioB);\r
+ }\r
+ }\r
+ else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE)\r
+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);\r
+ if ((pHalData->EEPROMSVID == 0x17AA && pHalData->EEPROMSMID == 0xA811) ||\r
+ (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0xA812) ||\r
+ (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0x8812))\r
+ READ_AND_CONFIG_MP(8812A,_TXPWR_LMT_HM812A03);\r
+ else\r
+ #endif \r
+ READ_AND_CONFIG_MP(8812A,_TXPWR_LMT);\r
+ }\r
+ }\r
+#endif\r
+#if (RTL8821A_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8821)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A){\r
+ READ_AND_CONFIG_MP(8821A,_RadioA);\r
+ }\r
+ }\r
+ else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
+ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {\r
+ if (pDM_Odm->ExtPA5G || pDM_Odm->ExtLNA5G)\r
+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_FEM);\r
+ else\r
+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_IPA); \r
+ } \r
+ else {\r
+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+ if (pMgntInfo->CustomerID == RT_CID_8821AE_ASUS_MB)\r
+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_8mm);\r
+ else if (pMgntInfo->CustomerID == RT_CID_ASUS_NB)\r
+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_5mm);\r
+ else\r
+ #endif\r
+ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A); \r
+ }\r
+ }\r
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigRFWithHeaderFile\n"));\r
+ }\r
+#endif\r
+\r
+#if (RTL8723B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO)\r
+ READ_AND_CONFIG_MP(8723B,_RadioA);\r
+ else if(ConfigType == CONFIG_RF_TXPWR_LMT)\r
+ READ_AND_CONFIG_MP(8723B,_TXPWR_LMT);\r
+ }\r
+#endif\r
+\r
+#if (RTL8192E_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_MP(8192E,_RadioA);\r
+ else if(eRFPath == ODM_RF_PATH_B)\r
+ READ_AND_CONFIG_MP(8192E,_RadioB);\r
+ } else if (ConfigType == CONFIG_RF_TXPWR_LMT) {\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/\r
+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);\r
+\r
+ if ((pHalData->EEPROMSVID == 0x11AD && pHalData->EEPROMSMID == 0x8192) || \r
+ (pHalData->EEPROMSVID == 0x11AD && pHalData->EEPROMSMID == 0x8193))\r
+ READ_AND_CONFIG_MP(8192E, _TXPWR_LMT_8192E_SAR_5mm);\r
+ else\r
+#endif \r
+ READ_AND_CONFIG_MP(8192E,_TXPWR_LMT);\r
+ }\r
+ }\r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+\r
+//1 All platforms support\r
+#if (RTL8188E_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_MP(8188E,_RadioA);\r
+ }\r
+ else if(ConfigType == CONFIG_RF_TXPWR_LMT)\r
+ READ_AND_CONFIG_MP(8188E,_TXPWR_LMT);\r
+ }\r
+#endif\r
+#if (RTL8814A_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8814A)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_MP(8814A,_RadioA);\r
+ else if(eRFPath == ODM_RF_PATH_B)\r
+ READ_AND_CONFIG_MP(8814A,_RadioB);\r
+ else if(eRFPath == ODM_RF_PATH_C)\r
+ READ_AND_CONFIG_MP(8814A,_RadioC);\r
+ else if(eRFPath == ODM_RF_PATH_D)\r
+ READ_AND_CONFIG_MP(8814A,_RadioD);\r
+ } \r
+ else if(ConfigType == CONFIG_RF_TXPWR_LMT) \r
+ READ_AND_CONFIG_MP(8814A,_TXPWR_LMT);\r
+ }\r
+#endif\r
+#if (RTL8703B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8703B) {\r
+ if (ConfigType == CONFIG_RF_RADIO) {\r
+ if (eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_MP(8703B, _RadioA);\r
+ } \r
+ }\r
+#endif\r
+\r
+#if (RTL8188F_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F) {\r
+ if (ConfigType == CONFIG_RF_RADIO) {\r
+ if (eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_MP(8188F, _RadioA);\r
+ } else if (ConfigType == CONFIG_RF_TXPWR_LMT)\r
+ READ_AND_CONFIG_MP(8188F, _TXPWR_LMT);\r
+ }\r
+#endif\r
+\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+#if (RTL8821B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8821B)\r
+ {\r
+ if (ConfigType == CONFIG_RF_RADIO) {\r
+ if (eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG(8821B, _RadioA);\r
+ } else if (ConfigType == CONFIG_RF_TXPWR_LMT)\r
+ READ_AND_CONFIG(8821B, _TXPWR_LMT);\r
+ }\r
+#endif\r
+#if (RTL8822B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_MP(8822B, _RadioA);\r
+ else if(eRFPath == ODM_RF_PATH_B)\r
+ READ_AND_CONFIG_MP(8822B, _RadioB);\r
+ } \r
+ }\r
+#endif\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if (RTL8188F_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ {\r
+ if(ConfigType == CONFIG_RF_RADIO) {\r
+ if(eRFPath == ODM_RF_PATH_A)\r
+ READ_AND_CONFIG_TC(8188F,_RadioA);\r
+ } \r
+ }\r
+#endif\r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+\r
+ return HAL_STATUS_SUCCESS;\r
+}\r
+\r
+HAL_STATUS\r
+ODM_ConfigRFWithTxPwrTrackHeaderFile(\r
+ IN PDM_ODM_T pDM_Odm\r
+ )\r
+{\r
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
+ ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
+ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
+ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
+\r
+\r
+//1 AP doesn't use PHYDM power tracking table in these ICs\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+#if RTL8821A_SUPPORT\r
+ if(pDM_Odm->SupportICType == ODM_RTL8821)\r
+ {\r
+ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
+ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE);\r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
+ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_USB); \r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
+ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_SDIO);\r
+ }\r
+#endif \r
+#if RTL8812A_SUPPORT \r
+ if(pDM_Odm->SupportICType == ODM_RTL8812)\r
+ {\r
+ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
+ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_PCIE);\r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {\r
+ if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) \r
+ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_RFE3); \r
+ else\r
+ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_USB); \r
+ }\r
+ \r
+ }\r
+#endif \r
+#if RTL8192E_SUPPORT \r
+ if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
+ {\r
+ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
+ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_PCIE);\r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
+ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_USB); \r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
+ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_SDIO); \r
+ }\r
+#endif\r
+#if RTL8723B_SUPPORT \r
+ if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
+ {\r
+ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
+ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_PCIE);\r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
+ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_USB);\r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
+ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_SDIO); \r
+ }\r
+#endif \r
+#if RTL8188E_SUPPORT \r
+ if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
+ {\r
+ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
+ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE);\r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
+ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_USB);\r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
+ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_SDIO);\r
+ }\r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+\r
+//1 All platforms support\r
+#if RTL8814A_SUPPORT\r
+ if(pDM_Odm->SupportICType == ODM_RTL8814A) \r
+ {\r
+ if(pDM_Odm->RFEType == 0)\r
+ READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type0);\r
+ else if(pDM_Odm->RFEType == 2)\r
+ READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type2);\r
+ else if (pDM_Odm->RFEType == 5)\r
+ READ_AND_CONFIG_MP(8814A, _TxPowerTrack_Type5);\r
+ else\r
+ READ_AND_CONFIG_MP(8814A,_TxPowerTrack);\r
+ }\r
+#endif \r
+#if RTL8703B_SUPPORT\r
+ if (pDM_Odm->SupportICType == ODM_RTL8703B) {\r
+ if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
+ READ_AND_CONFIG_MP(8703B, _TxPowerTrack_USB);\r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
+ READ_AND_CONFIG_MP(8703B, _TxPowerTrack_SDIO); \r
+ }\r
+#endif\r
+\r
+#if RTL8188F_SUPPORT\r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F) {\r
+ if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
+ READ_AND_CONFIG_MP(8188F, _TxPowerTrack_USB);\r
+ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
+ READ_AND_CONFIG_MP(8188F, _TxPowerTrack_SDIO);\r
+ }\r
+#endif\r
+\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+#if RTL8821B_SUPPORT\r
+ if(pDM_Odm->SupportICType == ODM_RTL8821B)\r
+ READ_AND_CONFIG(8821B,_TxPowerTrack); \r
+#endif \r
+#if RTL8822B_SUPPORT\r
+/* if(pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ READ_AND_CONFIG_MP(8822B, _TxPowerTrack); */\r
+#endif \r
+\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if RTL8188F_SUPPORT\r
+ if(pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ READ_AND_CONFIG_TC(8188F,_TxPowerTrack_PCIE); \r
+#endif \r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+\r
+\r
+ return HAL_STATUS_SUCCESS;\r
+}\r
+\r
+HAL_STATUS\r
+ODM_ConfigBBWithHeaderFile(\r
+ IN PDM_ODM_T pDM_Odm,\r
+ IN ODM_BB_Config_Type ConfigType\r
+ )\r
+{\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) \r
+ PADAPTER Adapter = pDM_Odm->Adapter;\r
+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); \r
+#endif\r
+\r
+//1 AP doesn't use PHYDM initialization in these ICs\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) \r
+#if (RTL8723A_SUPPORT == 1) \r
+ if(pDM_Odm->SupportICType == ODM_RTL8723A)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
+ READ_AND_CONFIG_MP(8723A,_PHY_REG);\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
+ READ_AND_CONFIG_MP(8723A,_AGC_TAB);\r
+ } \r
+ } \r
+#endif\r
+#if (RTL8812A_SUPPORT == 1) \r
+ if(pDM_Odm->SupportICType == ODM_RTL8812)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
+ READ_AND_CONFIG_MP(8812A,_PHY_REG);\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
+ READ_AND_CONFIG_MP(8812A,_AGC_TAB);\r
+ }\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
+ {\r
+ if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) \r
+ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_ASUS);\r
+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+ else if (pMgntInfo->CustomerID == RT_CID_WNC_NEC && pDM_Odm->bIsMPChip) \r
+ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_NEC);\r
+ #endif \r
+ else\r
+ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG);\r
+ }\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_MP){\r
+ READ_AND_CONFIG_MP(8812A,_PHY_REG_MP);\r
+ }\r
+ else if(ConfigType == CONFIG_BB_AGC_TAB_DIFF)\r
+ {\r
+ if ((36 <= *pDM_Odm->pChannel) && (*pDM_Odm->pChannel <= 64)) \r
+ AGC_DIFF_CONFIG_MP(8812A,LB);\r
+ else if (100 <= *pDM_Odm->pChannel) \r
+ AGC_DIFF_CONFIG_MP(8812A,HB);\r
+ }\r
+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8812AGCTABArray\n"));\r
+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8812PHY_REGArray\n"));\r
+ } \r
+#endif\r
+#if (RTL8821A_SUPPORT == 1) \r
+ if(pDM_Odm->SupportICType == ODM_RTL8821)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
+ READ_AND_CONFIG_MP(8821A,_PHY_REG);\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
+ READ_AND_CONFIG_MP(8821A,_AGC_TAB);\r
+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
+ READ_AND_CONFIG_MP(8821A,_PHY_REG_PG);\r
+ } \r
+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8821AGCTABArray\n"));\r
+ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8821PHY_REGArray\n"));\r
+ } \r
+#endif\r
+#if (RTL8723B_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
+ READ_AND_CONFIG_MP(8723B,_PHY_REG);\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
+ READ_AND_CONFIG_MP(8723B,_AGC_TAB);\r
+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
+ READ_AND_CONFIG_MP(8723B,_PHY_REG_PG);\r
+ }\r
+ }\r
+#endif\r
+#if (RTL8192E_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
+ READ_AND_CONFIG_MP(8192E,_PHY_REG);\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
+ READ_AND_CONFIG_MP(8192E,_AGC_TAB);\r
+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
+ READ_AND_CONFIG_MP(8192E,_PHY_REG_PG);\r
+ }\r
+ }\r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+\r
+\r
+//1 All platforms support\r
+#if (RTL8188E_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG)\r
+ READ_AND_CONFIG_MP(8188E,_PHY_REG);\r
+ else if(ConfigType == CONFIG_BB_AGC_TAB)\r
+ READ_AND_CONFIG_MP(8188E,_AGC_TAB);\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
+ READ_AND_CONFIG_MP(8188E,_PHY_REG_PG);\r
+ }\r
+#endif\r
+#if (RTL8814A_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8814A)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG){\r
+ READ_AND_CONFIG_MP(8814A,_PHY_REG);\r
+ }else if(ConfigType == CONFIG_BB_AGC_TAB){\r
+ READ_AND_CONFIG_MP(8814A,_AGC_TAB);\r
+ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){\r
+ READ_AND_CONFIG_MP(8814A,_PHY_REG_PG);\r
+ }else if(ConfigType == CONFIG_BB_PHY_REG_MP){\r
+ READ_AND_CONFIG_MP(8814A,_PHY_REG_MP);\r
+ }\r
+ }\r
+#endif\r
+#if (RTL8703B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8703B) {\r
+ if (ConfigType == CONFIG_BB_PHY_REG)\r
+ READ_AND_CONFIG_MP(8703B, _PHY_REG);\r
+ else if (ConfigType == CONFIG_BB_AGC_TAB)\r
+ READ_AND_CONFIG_MP(8703B, _AGC_TAB);\r
+ else if (ConfigType == CONFIG_BB_PHY_REG_PG)\r
+ READ_AND_CONFIG_MP(8703B, _PHY_REG_PG);\r
+ }\r
+#endif\r
+\r
+#if (RTL8188F_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F) {\r
+ if (ConfigType == CONFIG_BB_PHY_REG) \r
+ READ_AND_CONFIG_MP(8188F, _PHY_REG);\r
+ else if (ConfigType == CONFIG_BB_AGC_TAB) \r
+ READ_AND_CONFIG_MP(8188F, _AGC_TAB);\r
+ else if (ConfigType == CONFIG_BB_PHY_REG_PG) \r
+ READ_AND_CONFIG_MP(8188F, _PHY_REG_PG);\r
+ }\r
+#endif\r
+\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+#if (RTL8821B_SUPPORT == 1) \r
+ if(pDM_Odm->SupportICType == ODM_RTL8821B)\r
+ {\r
+ if (ConfigType == CONFIG_BB_PHY_REG) {\r
+ READ_AND_CONFIG(8821B,_PHY_REG);\r
+ } else if (ConfigType == CONFIG_BB_AGC_TAB) { \r
+ READ_AND_CONFIG(8821B,_AGC_TAB);\r
+ } else if (ConfigType == CONFIG_BB_PHY_REG_PG) {\r
+ READ_AND_CONFIG(8821B,_PHY_REG_PG);\r
+ }\r
+ } \r
+#endif\r
+#if (RTL8822B_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG)\r
+ READ_AND_CONFIG_MP(8822B, _PHY_REG);\r
+ else if(ConfigType == CONFIG_BB_AGC_TAB)\r
+ READ_AND_CONFIG_MP(8822B, _AGC_TAB);\r
+/* else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
+ READ_AND_CONFIG_MP(8822B, _PHY_REG_PG);\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_MP)\r
+ READ_AND_CONFIG_MP(8822B, _PHY_REG_MP); */\r
+ }\r
+#endif\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if (RTL8188F_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG)\r
+ READ_AND_CONFIG_TC(8188F,_PHY_REG);\r
+ else if(ConfigType == CONFIG_BB_AGC_TAB)\r
+ READ_AND_CONFIG_TC(8188F,_AGC_TAB);\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
+ READ_AND_CONFIG_TC(8188F,_PHY_REG_PG);\r
+ }\r
+#endif\r
+#endif\r
+#if (RTL8195A_SUPPORT == 1)\r
+ if(pDM_Odm->SupportICType == ODM_RTL8195A)\r
+ {\r
+ if(ConfigType == CONFIG_BB_PHY_REG)\r
+ READ_AND_CONFIG(8195A,_PHY_REG);\r
+ else if(ConfigType == CONFIG_BB_AGC_TAB)\r
+ READ_AND_CONFIG(8195A,_AGC_TAB);\r
+ else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
+ READ_AND_CONFIG(8195A,_PHY_REG_PG);\r
+ }\r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+\r
+ return HAL_STATUS_SUCCESS; \r
+} \r
+\r
+HAL_STATUS\r
+ODM_ConfigMACWithHeaderFile(\r
+ IN PDM_ODM_T pDM_Odm\r
+ )\r
+{\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) \r
+ PADAPTER Adapter = pDM_Odm->Adapter;\r
+ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); \r
+#endif\r
+\r
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
+ ("===>ODM_ConfigMACWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
+ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
+ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
+\r
+//1 AP doesn't use PHYDM initialization in these ICs\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) \r
+#if (RTL8723A_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8723A){\r
+ READ_AND_CONFIG_MP(8723A,_MAC_REG);\r
+ }\r
+#endif\r
+#if (RTL8812A_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8812){\r
+ READ_AND_CONFIG_MP(8812A,_MAC_REG);\r
+ }\r
+#endif\r
+#if (RTL8821A_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8821){\r
+ READ_AND_CONFIG_MP(8821A,_MAC_REG);\r
+\r
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n"));\r
+ }\r
+#endif\r
+#if (RTL8723B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8723B){\r
+ READ_AND_CONFIG_MP(8723B,_MAC_REG);\r
+ }\r
+#endif\r
+#if (RTL8192E_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8192E){\r
+ READ_AND_CONFIG_MP(8192E,_MAC_REG);\r
+ }\r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+\r
+//1 All platforms support\r
+#if (RTL8188E_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8188E){\r
+ READ_AND_CONFIG_MP(8188E,_MAC_REG);\r
+ }\r
+#endif\r
+#if (RTL8814A_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8814A){\r
+ READ_AND_CONFIG_MP(8814A,_MAC_REG);\r
+ }\r
+#endif\r
+#if (RTL8703B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8703B)\r
+ READ_AND_CONFIG_MP(8703B, _MAC_REG);\r
+#endif\r
+\r
+#if (RTL8188F_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F) \r
+ READ_AND_CONFIG_MP(8188F, _MAC_REG);\r
+#endif\r
+\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)\r
+#if (RTL8821B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8821B){\r
+ READ_AND_CONFIG(8821B,_MAC_REG);\r
+ }\r
+#endif\r
+#if (RTL8822B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ READ_AND_CONFIG_MP(8822B, _MAC_REG);\r
+#endif\r
+\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if (RTL8188F_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ READ_AND_CONFIG_TC(8188F,_MAC_REG);\r
+#endif\r
+#endif\r
+#if (RTL8195A_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8195A)\r
+ READ_AND_CONFIG_MP(8195A,_MAC_REG);\r
+#endif\r
+#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/\r
+\r
+ return HAL_STATUS_SUCCESS; \r
+} \r
+\r
+HAL_STATUS\r
+ODM_ConfigFWWithHeaderFile(\r
+ IN PDM_ODM_T pDM_Odm,\r
+ IN ODM_FW_Config_Type ConfigType,\r
+ OUT u1Byte *pFirmware,\r
+ OUT u4Byte *pSize\r
+ )\r
+{\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+\r
+#if (RTL8188E_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
+ {\r
+ #ifdef CONFIG_SFW_SUPPORTED\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8188E_T,_FW_NIC);\r
+ else if (ConfigType == CONFIG_FW_WoWLAN)\r
+ READ_FIRMWARE_MP(8188E_T,_FW_WoWLAN);\r
+ else if(ConfigType == CONFIG_FW_NIC_2)\r
+ READ_FIRMWARE_MP(8188E_S,_FW_NIC);\r
+ else if (ConfigType == CONFIG_FW_WoWLAN_2)\r
+ READ_FIRMWARE_MP(8188E_S,_FW_WoWLAN);\r
+ #ifdef CONFIG_AP_WOWLAN\r
+ if (ConfigType == CONFIG_FW_AP)\r
+ READ_FIRMWARE_MP(8188E_T,_FW_AP);\r
+ else if (ConfigType == CONFIG_FW_AP_2)\r
+ READ_FIRMWARE_MP(8188E_S,_FW_AP);\r
+ #endif //CONFIG_AP_WOWLAN\r
+ #else\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8188E_T,_FW_NIC);\r
+ else if (ConfigType == CONFIG_FW_WoWLAN)\r
+ READ_FIRMWARE_MP(8188E_T,_FW_WoWLAN);\r
+ #ifdef CONFIG_AP_WOWLAN\r
+ else if (ConfigType == CONFIG_FW_AP)\r
+ READ_FIRMWARE_MP(8188E_T,_FW_AP);\r
+ #endif //CONFIG_AP_WOWLAN\r
+ #endif\r
+ }\r
+#endif\r
+#if (RTL8723B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
+ {\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8723B,_FW_NIC);\r
+ else if (ConfigType == CONFIG_FW_WoWLAN)\r
+ READ_FIRMWARE_MP(8723B,_FW_WoWLAN);\r
+ #ifdef CONFIG_AP_WOWLAN\r
+ else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
+ READ_FIRMWARE(8723B,_FW_AP_WoWLAN);\r
+ #endif\r
+ \r
+ }\r
+#endif //#if (RTL8723B_SUPPORT == 1) \r
+#if (RTL8812A_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8812)\r
+ {\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8812A,_FW_NIC);\r
+ else if (ConfigType == CONFIG_FW_WoWLAN)\r
+ READ_FIRMWARE_MP(8812A,_FW_WoWLAN);\r
+ else if (ConfigType == CONFIG_FW_BT)\r
+ READ_FIRMWARE_MP(8812A,_FW_NIC_BT);\r
+ #ifdef CONFIG_AP_WOWLAN\r
+ else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
+ READ_FIRMWARE(8812A,_FW_AP);\r
+ #endif\r
+ }\r
+#endif\r
+#if (RTL8821A_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8821){\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8821A,_FW_NIC);\r
+ else if (ConfigType == CONFIG_FW_WoWLAN)\r
+ READ_FIRMWARE_MP(8821A,_FW_WoWLAN);\r
+ #ifdef CONFIG_AP_WOWLAN\r
+ else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
+ READ_FIRMWARE_MP(8821A , _FW_AP);\r
+ #endif /*CONFIG_AP_WOWLAN*/\r
+ else if (ConfigType == CONFIG_FW_BT)\r
+ READ_FIRMWARE_MP(8821A,_FW_NIC_BT);\r
+ }\r
+#endif\r
+#if (RTL8192E_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
+ {\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8192E,_FW_NIC);\r
+ else if (ConfigType == CONFIG_FW_WoWLAN)\r
+ READ_FIRMWARE_MP(8192E,_FW_WoWLAN);\r
+ #ifdef CONFIG_AP_WOWLAN\r
+ else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
+ READ_FIRMWARE_MP(8192E,_FW_AP);\r
+ #endif\r
+ }\r
+#endif\r
+#if (RTL8814A_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8814A)\r
+ {\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8814A,_FW_NIC);\r
+ #ifdef CONFIG_AP_WOWLAN\r
+ else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
+ READ_FIRMWARE_MP(8814A,_FW_AP);\r
+ #endif\r
+ }\r
+#endif\r
+#if (RTL8703B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8703B) {\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8703B, _FW_NIC);\r
+ else if (ConfigType == CONFIG_FW_WoWLAN)\r
+ READ_FIRMWARE_MP(8703B, _FW_WoWLAN);\r
+ #ifdef CONFIG_AP_WOWLAN\r
+ else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
+ READ_FIRMWARE(8703B, _FW_AP_WoWLAN);\r
+ #endif\r
+ }\r
+#endif\r
+\r
+#if (RTL8188F_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F) {\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8188F, _FW_NIC);\r
+ else if (ConfigType == CONFIG_FW_WoWLAN)\r
+ READ_FIRMWARE_MP(8188F, _FW_WoWLAN);\r
+ #ifdef CONFIG_AP_WOWLAN\r
+ else if (ConfigType == CONFIG_FW_AP)\r
+ READ_FIRMWARE_MP(8188F,_FW_AP);\r
+ #endif\r
+ }\r
+#endif\r
+\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+#if (RTL8821B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8821B)\r
+ {\r
+ }\r
+#endif\r
+#if (RTL8822B_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ {\r
+ /*\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8822B,_FW_NIC);\r
+ #ifdef CONFIG_AP_WOWLAN\r
+ else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
+ READ_FIRMWARE(8822B,_FW_AP);\r
+ #endif */\r
+ }\r
+#endif\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if (RTL8188F_SUPPORT == 1)\r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ {\r
+ if (ConfigType == CONFIG_FW_NIC)\r
+ READ_FIRMWARE_MP(8188F,_FW_NIC);\r
+ }\r
+#endif\r
+#endif\r
+#endif//(DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+\r
+#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+ return HAL_STATUS_SUCCESS; \r
+} \r
+\r
+u4Byte \r
+ODM_GetHWImgVersion(\r
+ IN PDM_ODM_T pDM_Odm\r
+ )\r
+{\r
+ u4Byte Version=0;\r
+\r
+//1 AP doesn't use PHYDM initialization in these ICs\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+#if (RTL8723A_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
+ Version = GET_VERSION_MP(8723A,_MAC_REG);\r
+#endif\r
+#if (RTL8723B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
+ Version = GET_VERSION_MP(8723B,_MAC_REG);\r
+#endif\r
+#if (RTL8821A_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8821)\r
+ Version = GET_VERSION_MP(8821A,_MAC_REG);\r
+#endif\r
+#if (RTL8192E_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
+ Version = GET_VERSION_MP(8192E,_MAC_REG);\r
+#endif\r
+#if (RTL8812A_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8812)\r
+ Version = GET_VERSION_MP(8812A,_MAC_REG);\r
+#endif\r
+#endif //(DM_ODM_SUPPORT_TYPE != ODM_AP)\r
+\r
+/*1 All platforms support*/\r
+#if (RTL8188E_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
+ Version = GET_VERSION_MP(8188E,_MAC_REG);\r
+#endif\r
+#if (RTL8814A_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8814A)\r
+ Version = GET_VERSION_MP(8814A,_MAC_REG);\r
+#endif\r
+#if (RTL8703B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8703B)\r
+ Version = GET_VERSION_MP(8703B, _MAC_REG);\r
+#endif\r
+#if (RTL8188F_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ Version = GET_VERSION_MP(8188F, _MAC_REG);\r
+#endif\r
+\r
+//1 New ICs (WIN only)\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+#if (RTL8821B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8821B)\r
+ Version = GET_VERSION(8821B,_MAC_REG);\r
+#endif\r
+#if (RTL8822B_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8822B)\r
+ Version = GET_VERSION(8822B, _MAC_REG);\r
+#endif\r
+#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
+#if (RTL8188F_SUPPORT == 1) \r
+ if (pDM_Odm->SupportICType == ODM_RTL8188F)\r
+ Version = GET_VERSION_TC(8188F, _MAC_REG);\r
+#endif\r
+#endif\r
+#endif //(DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+\r
+ return Version;\r
+}\r
+\r
+#if (RTL8822B_SUPPORT == 1)\r
+/* For 8822B only!! need to move to FW finally */\r
+/*==============================================*/\r
+\r
+VOID\r
+phydm_ResetPhyInfo(\r
+ IN PDM_ODM_T pPhydm,\r
+ OUT PODM_PHY_INFO_T pPhyInfo\r
+)\r
+{\r
+ pPhyInfo->RxPWDBAll = 0;\r
+ pPhyInfo->SignalQuality = 0;\r
+ pPhyInfo->BandWidth = 0;\r
+#if (RTL8822B_SUPPORT == 1)\r
+ pPhyInfo->RxCount = 0;\r
+#endif\r
+ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOSignalQuality, 0 , 4);\r
+ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOSignalStrength, 0, 4);\r
+ ODM_Memory_Set(pPhydm, pPhyInfo->RxSNR, 0, 4);\r
+\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) \r
+ pPhyInfo->RxPower = -110;\r
+ pPhyInfo->RecvSignalPower = -110;\r
+ pPhyInfo->BTRxRSSIPercentage = 0;\r
+ pPhyInfo->SignalStrength = 0;\r
+ pPhyInfo->btCoexPwrAdjust = 0;\r
+#if (RTL8822B_SUPPORT == 1)\r
+ pPhyInfo->channel = 0;\r
+ pPhyInfo->bMuPacket = 0;\r
+ pPhyInfo->bBeamformed = 0;\r
+ pPhyInfo->rxsc = 0;\r
+#endif\r
+ ODM_Memory_Set(pPhydm, pPhyInfo->RxPwr, -110, 4);\r
+ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOEVMdbm, 0, 4);\r
+ ODM_Memory_Set(pPhydm, pPhyInfo->Cfo_short, 0, 8);\r
+ ODM_Memory_Set(pPhydm, pPhyInfo->Cfo_tail, 0, 8);\r
+#endif\r
+}\r
+\r
+VOID\r
+phydm_SetPerPathPhyInfo(\r
+ IN u1Byte RxPath,\r
+ IN s1Byte RxPwr,\r
+ IN s1Byte RxEVM,\r
+ IN s1Byte Cfo_tail,\r
+ IN s1Byte RxSNR,\r
+ OUT PODM_PHY_INFO_T pPhyInfo\r
+)\r
+{\r
+ u1Byte EVMdBm = 0;\r
+ u1Byte EVMPercentage = 0;\r
+\r
+ /* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */\r
+ \r
+ if (RxEVM < 0) {\r
+ /* Calculate EVM in dBm */\r
+ EVMdBm = ((u1Byte)(0 - RxEVM) >> 1);\r
+\r
+ /* Calculate EVM in percentage */\r
+ if (EVMdBm >= 33)\r
+ EVMPercentage = 100;\r
+ else \r
+ EVMPercentage = (EVMdBm << 1) + (EVMdBm);\r
+ }\r
+ \r
+\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ pPhyInfo->RxPwr[RxPath] = RxPwr;\r
+ pPhyInfo->RxMIMOEVMdbm[RxPath] = EVMdBm;\r
+\r
+ /* CFO = CFO_tail * 312.5 / 2^7 ~= CFO tail * 39/512 (kHz)*/\r
+ pPhyInfo->Cfo_tail[RxPath] = Cfo_tail;\r
+ pPhyInfo->Cfo_tail[RxPath] = ((pPhyInfo->Cfo_tail[RxPath] << 5) + (pPhyInfo->Cfo_tail[RxPath] << 2) +\r
+ (pPhyInfo->Cfo_tail[RxPath] << 1) + (pPhyInfo->Cfo_tail[RxPath])) >> 9;\r
+#endif\r
+\r
+ pPhyInfo->RxMIMOSignalStrength[RxPath] = odm_QueryRxPwrPercentage(RxPwr);\r
+ pPhyInfo->RxMIMOSignalQuality[RxPath] = EVMPercentage;\r
+ pPhyInfo->RxSNR[RxPath] = RxSNR >> 1;\r
+\r
+/*\r
+ //if (pPktinfo->bPacketMatchBSSID) \r
+ {\r
+ DbgPrint("Path (%d)--------\n", RxPath);\r
+ DbgPrint("RxPwr = %d, Signal strength = %d\n", pPhyInfo->RxPwr[RxPath], pPhyInfo->RxMIMOSignalStrength[RxPath]);\r
+ DbgPrint("EVMdBm = %d, Signal quality = %d\n", pPhyInfo->RxMIMOEVMdbm[RxPath], pPhyInfo->RxMIMOSignalQuality[RxPath]);\r
+ DbgPrint("CFO = %d, SNR = %d\n", pPhyInfo->Cfo_tail[RxPath], pPhyInfo->RxSNR[RxPath]);\r
+ } \r
+*/\r
+}\r
+\r
+VOID\r
+phydm_SetCommonPhyInfo(\r
+ IN s1Byte RxPower,\r
+ IN u1Byte channel,\r
+ IN BOOLEAN bBeamformed,\r
+ IN BOOLEAN bMuPacket,\r
+ IN u1Byte bandwidth,\r
+ IN u1Byte signalQuality,\r
+ IN u1Byte rxsc,\r
+ OUT PODM_PHY_INFO_T pPhyInfo\r
+)\r
+{\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ pPhyInfo->RxPower = RxPower; /* RSSI in dB */\r
+ pPhyInfo->RecvSignalPower = RxPower; /* RSSI in dB */\r
+ pPhyInfo->channel = channel; /* channel number */\r
+ pPhyInfo->bBeamformed = bBeamformed; /* apply BF */\r
+ pPhyInfo->bMuPacket = bMuPacket; /* MU packet */\r
+ pPhyInfo->rxsc = rxsc;\r
+#endif\r
+ pPhyInfo->RxPWDBAll = odm_QueryRxPwrPercentage(RxPower); /* RSSI in percentage */\r
+ pPhyInfo->SignalQuality = signalQuality; /* signal quality */\r
+ pPhyInfo->BandWidth = bandwidth; /* bandwidth */\r
+\r
+/*\r
+ //if (pPktinfo->bPacketMatchBSSID)\r
+ {\r
+ DbgPrint("RxPWDBAll = %d, RxPower = %d, RecvSignalPower = %d\n", pPhyInfo->RxPWDBAll, pPhyInfo->RxPower, pPhyInfo->RecvSignalPower);\r
+ DbgPrint("SignalQuality = %d\n", pPhyInfo->SignalQuality);\r
+ DbgPrint("bBeamformed = %d, bMuPacket = %d, RxCount = %d\n", pPhyInfo->bBeamformed, pPhyInfo->bMuPacket, pPhyInfo->RxCount + 1);\r
+ DbgPrint("channel = %d, rxsc = %d, BandWidth = %d\n", channel, rxsc, bandwidth);\r
+ }\r
+*/\r
+}\r
+\r
+VOID\r
+phydm_GetRxPhyStatusType0(\r
+ IN PDM_ODM_T pDM_Odm,\r
+ IN pu1Byte pPhyStatus,\r
+ IN PODM_PACKET_INFO_T pPktinfo,\r
+ OUT PODM_PHY_INFO_T pPhyInfo\r
+)\r
+{\r
+ /* Type 0 is used for cck packet */\r
+ \r
+ PPHY_STATUS_RPT_JAGUAR2_TYPE0 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE0)pPhyStatus;\r
+ u1Byte i, SQ = 0;\r
+\r
+ /* Calculate Signal Quality*/\r
+ if (pPktinfo->bPacketMatchBSSID) {\r
+ if (pPhyStaRpt->signal_quality >= 64)\r
+ SQ = 0;\r
+ else if (pPhyStaRpt->signal_quality <= 20)\r
+ SQ = 100;\r
+ else {\r
+ /* mapping to 2~99% */\r
+ SQ = 64 - pPhyStaRpt->signal_quality;\r
+ SQ = ((SQ << 3) + SQ) >> 2;\r
+ }\r
+ }\r
+\r
+ /* Update CCK packet counter */\r
+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;\r
+\r
+ /* Update Common information */\r
+ phydm_SetCommonPhyInfo((pPhyStaRpt->pwdb - 110), pPhyStaRpt->channel, FALSE, \r
+ FALSE, ODM_BW20M, SQ, pPhyStaRpt->rxsc, pPhyInfo);\r
+\r
+ /* Update CCK pwdb */\r
+ phydm_SetPerPathPhyInfo(ODM_RF_PATH_A, (pPhyStaRpt->pwdb - 110), 0, 0, 0, pPhyInfo); /* Update per-path information */\r
+\r
+/*\r
+ //if (pPktinfo->bPacketMatchBSSID)\r
+ {\r
+ DbgPrint("pwdb = 0x%x, MP gain index = 0x%x, TRSW = 0x%x\n", pPhyStaRpt->pwdb, pPhyStaRpt->gain, pPhyStaRpt->trsw);\r
+ DbgPrint("channel = %d, band = %d, rxsc = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->rxsc);\r
+ DbgPrint("agc_table = 0x%x, agc_rpt 0x%x, bb_power = 0x%x\n", pPhyStaRpt->agc_table, pPhyStaRpt->agc_rpt, pPhyStaRpt->bb_power);\r
+ DbgPrint("length = %d, SQ = %d\n", pPhyStaRpt->length, pPhyStaRpt->signal_quality);\r
+ DbgPrint("antidx a = 0x%x, b = 0x%x, c = 0x%x, d = 0x%x\n", pPhyStaRpt->antidx_a, pPhyStaRpt->antidx_b, pPhyStaRpt->antidx_c, pPhyStaRpt->antidx_d);\r
+ DbgPrint("rsvd_0 = 0x%x, rsvd_1 = 0x%x, rsvd_2 = 0x%x\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2);\r
+ DbgPrint("rsvd_3 = 0x%x, rsvd_4 = 0x%x, rsvd_5 = 0x%x\n", pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4, pPhyStaRpt->rsvd_5);\r
+ DbgPrint("rsvd_6 = 0x%x, rsvd_7 = 0x%x, rsvd_8 = 0x%x\n", pPhyStaRpt->rsvd_6, pPhyStaRpt->rsvd_7, pPhyStaRpt->rsvd_8);\r
+ }\r
+*/\r
+}\r
+\r
+VOID\r
+phydm_GetRxPhyStatusType1(\r
+ IN PDM_ODM_T pDM_Odm,\r
+ IN pu1Byte pPhyStatus,\r
+ IN PODM_PACKET_INFO_T pPktinfo,\r
+ OUT PODM_PHY_INFO_T pPhyInfo\r
+)\r
+{\r
+ /* Type 1 is used for ofdm packet */\r
+\r
+ PPHY_STATUS_RPT_JAGUAR2_TYPE1 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE1)pPhyStatus;\r
+ s1Byte rx_pwr_db = -120;\r
+ u1Byte i, rxsc, bw, RxCount = 0;\r
+ BOOLEAN bMU;\r
+\r
+ /* Update OFDM packet counter */\r
+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
+\r
+ /* Update per-path information */\r
+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {\r
+ if (pDM_Odm->RXAntStatus & BIT(i)) {\r
+ s1Byte rx_path_pwr_db;\r
+\r
+ /* RX path counter */\r
+ RxCount++;\r
+\r
+ /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */\r
+ /* EVM report is reported by stream, not path */\r
+ rx_path_pwr_db = pPhyStaRpt->pwdb[i] - 110; /* per-path pwdb in dB domain */\r
+ phydm_SetPerPathPhyInfo(i, rx_path_pwr_db, pPhyStaRpt->rxevm[RxCount - 1], \r
+ pPhyStaRpt->cfo_tail[i], pPhyStaRpt->rxsnr[i], pPhyInfo);\r
+\r
+ /* search maximum pwdb */\r
+ if (rx_path_pwr_db > rx_pwr_db)\r
+ rx_pwr_db = rx_path_pwr_db;\r
+ }\r
+ }\r
+\r
+ /* mapping RX counter from 1~4 to 0~3 */\r
+ if (RxCount > 0)\r
+ pPhyInfo->RxCount = RxCount - 1;\r
+ \r
+ /* Check if MU packet or not */\r
+ if ((pPhyStaRpt->gid != 0) && (pPhyStaRpt->gid != 63)) {\r
+ bMU = TRUE;\r
+ pDM_Odm->PhyDbgInfo.NumQryMuPkt++;\r
+ } else\r
+ bMU = FALSE;\r
+\r
+ /* Count BF packet */\r
+ pDM_Odm->PhyDbgInfo.NumQryBfPkt = pDM_Odm->PhyDbgInfo.NumQryBfPkt + pPhyStaRpt->beamformed;\r
+\r
+ /* Check sub-channel */\r
+ if ((pPktinfo->DataRate > ODM_RATE11M) && (pPktinfo->DataRate < ODM_RATEMCS0))\r
+ rxsc = pPhyStaRpt->l_rxsc;\r
+ else\r
+ rxsc = pPhyStaRpt->ht_rxsc;\r
+\r
+ /* Check RX bandwidth */\r
+ if ((rxsc >= 1) && (rxsc <= 8))\r
+ bw = ODM_BW20M;\r
+ else if ((rxsc >= 9) && (rxsc <= 12))\r
+ bw = ODM_BW40M;\r
+ else if (rxsc >= 13)\r
+ bw = ODM_BW80M;\r
+ else\r
+ bw = pPhyStaRpt->rf_mode;\r
+\r
+ /* Update packet information */\r
+ phydm_SetCommonPhyInfo(rx_pwr_db, pPhyStaRpt->channel, (BOOLEAN)pPhyStaRpt->beamformed,\r
+ bMU, bw, odm_EVMdbToPercentage(pPhyStaRpt->rxevm[0]), rxsc, pPhyInfo);\r
+\r
+/*\r
+ //if (pPktinfo->bPacketMatchBSSID)\r
+ {\r
+ DbgPrint("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d, rf_mode = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->l_rxsc, pPhyStaRpt->ht_rxsc, pPhyStaRpt->rf_mode);\r
+ DbgPrint("Antidx A = %d, B = %d, C = %d, D = %d\n", pPhyStaRpt->antidx_a, pPhyStaRpt->antidx_b, pPhyStaRpt->antidx_c, pPhyStaRpt->antidx_d);\r
+ DbgPrint("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->pwdb[0], pPhyStaRpt->pwdb[1], pPhyStaRpt->pwdb[2], pPhyStaRpt->pwdb[3]);\r
+ DbgPrint("EVM A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->rxevm[0], pPhyStaRpt->rxevm[1], pPhyStaRpt->rxevm[2], pPhyStaRpt->rxevm[3]);\r
+ DbgPrint("SNR A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->rxsnr[0], pPhyStaRpt->rxsnr[1], pPhyStaRpt->rxsnr[2], pPhyStaRpt->rxsnr[3]);\r
+ DbgPrint("CFO A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->cfo_tail[0], pPhyStaRpt->cfo_tail[1], pPhyStaRpt->cfo_tail[2], pPhyStaRpt->cfo_tail[3]);\r
+ DbgPrint("paid = %d, gid = %d, length = %d\n", (pPhyStaRpt->paid + (pPhyStaRpt->paid_msb<<8)), pPhyStaRpt->gid, pPhyStaRpt->lsig_length);\r
+ DbgPrint("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", pPhyStaRpt->ldpc, pPhyStaRpt->stbc, pPhyStaRpt->beamformed, pPhyStaRpt->gnt_bt, pPhyStaRpt->hw_antsw_occu);\r
+ DbgPrint("NBI: %d, pos: %d\n", pPhyStaRpt->nb_intf_flag, (pPhyStaRpt->intf_pos + (pPhyStaRpt->intf_pos_msb<<8)));\r
+ DbgPrint("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2, pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4, pPhyStaRpt->rsvd_5);\r
+ }\r
+ DbgPrint("phydm_GetRxPhyStatusType1 pPktinfo->bPacketMatchBSSID = %d\n", pPktinfo->bPacketMatchBSSID);\r
+ DbgPrint("pPktinfo->DataRate = 0x%x\n", pPktinfo->DataRate);\r
+*/\r
+}\r
+\r
+VOID\r
+phydm_GetRxPhyStatusType2(\r
+ IN PDM_ODM_T pDM_Odm,\r
+ IN pu1Byte pPhyStatus,\r
+ IN PODM_PACKET_INFO_T pPktinfo,\r
+ OUT PODM_PHY_INFO_T pPhyInfo\r
+)\r
+{\r
+ PPHY_STATUS_RPT_JAGUAR2_TYPE2 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE2)pPhyStatus;\r
+ s1Byte rx_pwr_db = -120;\r
+ u1Byte i, rxsc, bw, RxCount = 0;\r
+\r
+ /* Update OFDM packet counter */\r
+ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
+\r
+ /* Update per-path information */\r
+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {\r
+ if (pDM_Odm->RXAntStatus & BIT(i)) {\r
+ s1Byte rx_path_pwr_db;\r
+\r
+ /* RX path counter */\r
+ RxCount++;\r
+\r
+ /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */\r
+ rx_path_pwr_db = pPhyStaRpt->pwdb[i] - 110; /* per-path pwdb in dB domain */\r
+ phydm_SetPerPathPhyInfo(i, rx_path_pwr_db, 0, 0, 0, pPhyInfo);\r
+\r
+ /* search maximum pwdb */\r
+ if (rx_path_pwr_db > rx_pwr_db)\r
+ rx_pwr_db = rx_path_pwr_db;\r
+ }\r
+ }\r
+\r
+ /* mapping RX counter from 1~4 to 0~3 */\r
+ if (RxCount > 0)\r
+ pPhyInfo->RxCount = RxCount - 1;\r
+ \r
+ /* Check RX sub-channel */\r
+ if ((pPktinfo->DataRate > ODM_RATE11M) && (pPktinfo->DataRate < ODM_RATEMCS0))\r
+ rxsc = pPhyStaRpt->l_rxsc;\r
+ else\r
+ rxsc = pPhyStaRpt->ht_rxsc;\r
+\r
+ /* Check RX bandwidth */\r
+ /* the BW information of sc=0 is useless, because there is no information of RF mode*/\r
+ if ((rxsc >= 1) && (rxsc <= 8))\r
+ bw = ODM_BW20M;\r
+ else if ((rxsc >= 9) && (rxsc <= 12))\r
+ bw = ODM_BW40M;\r
+ else if (rxsc >= 13)\r
+ bw = ODM_BW80M;\r
+ else\r
+ bw = ODM_BW20M;\r
+\r
+ /* Update packet information */\r
+ phydm_SetCommonPhyInfo(rx_pwr_db, pPhyStaRpt->channel, (BOOLEAN)pPhyStaRpt->beamformed,\r
+ FALSE, bw, 0, rxsc, pPhyInfo);\r
+\r
+/*\r
+ //if (pPktinfo->bPacketMatchBSSID)\r
+ {\r
+ DbgPrint("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->l_rxsc, pPhyStaRpt->ht_rxsc);\r
+ DbgPrint("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->pwdb[0], pPhyStaRpt->pwdb[1], pPhyStaRpt->pwdb[2], pPhyStaRpt->pwdb[3]);\r
+ DbgPrint("Agc table A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->agc_table_a, pPhyStaRpt->agc_table_b, pPhyStaRpt->agc_table_c, pPhyStaRpt->agc_table_d);\r
+ DbgPrint("Gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->gain_a, pPhyStaRpt->gain_b, pPhyStaRpt->gain_c, pPhyStaRpt->gain_d);\r
+ DbgPrint("TRSW A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->trsw_a, pPhyStaRpt->trsw_b, pPhyStaRpt->trsw_c, pPhyStaRpt->trsw_d);\r
+ DbgPrint("AAGC step A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->aagc_step_a, pPhyStaRpt->aagc_step_b, pPhyStaRpt->aagc_step_c, pPhyStaRpt->aagc_step_d);\r
+ DbgPrint("HT AAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->ht_aagc_gain[0], pPhyStaRpt->ht_aagc_gain[1], pPhyStaRpt->ht_aagc_gain[2], pPhyStaRpt->ht_aagc_gain[3]);\r
+ DbgPrint("DAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->dagc_gain[0], pPhyStaRpt->dagc_gain[1], pPhyStaRpt->dagc_gain[2], pPhyStaRpt->dagc_gain[3]);\r
+ DbgPrint("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", pPhyStaRpt->ldpc, pPhyStaRpt->stbc, pPhyStaRpt->beamformed, pPhyStaRpt->gnt_bt, pPhyStaRpt->hw_antsw_occu);\r
+ DbgPrint("counter: %d, syn_count: %d\n", pPhyStaRpt->counter, pPhyStaRpt->syn_count);\r
+ DbgPrint("cnt_cca2agc_rdy: %d, cnt_pw2cca: %d, shift_l_map\n", pPhyStaRpt->cnt_cca2agc_rdy, pPhyStaRpt->cnt_pw2cca, pPhyStaRpt->shift_l_map);\r
+ DbgPrint("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2, pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4);\r
+ DbgPrint("rsvd_5 = %d, rsvd_6 = %d, rsvd_6 = %d\n", pPhyStaRpt->rsvd_5, pPhyStaRpt->rsvd_6, pPhyStaRpt->rsvd_7);\r
+ }\r
+*/\r
+}\r
+\r
+VOID\r
+phydm_GetRxPhyStatusType5(\r
+ IN pu1Byte pPhyStatus\r
+)\r
+{\r
+/*\r
+ DbgPrint("DW0: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 3), *(pPhyStatus + 2), *(pPhyStatus + 1), *(pPhyStatus + 0));\r
+ DbgPrint("DW1: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 7), *(pPhyStatus + 6), *(pPhyStatus + 5), *(pPhyStatus + 4));\r
+ DbgPrint("DW2: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 11), *(pPhyStatus + 10), *(pPhyStatus + 9), *(pPhyStatus + 8));\r
+ DbgPrint("DW3: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 15), *(pPhyStatus + 14), *(pPhyStatus + 13), *(pPhyStatus + 12));\r
+ DbgPrint("DW4: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 19), *(pPhyStatus + 18), *(pPhyStatus + 17), *(pPhyStatus + 16));\r
+ DbgPrint("DW5: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 23), *(pPhyStatus + 22), *(pPhyStatus + 21), *(pPhyStatus + 20));\r
+ DbgPrint("DW6: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 27), *(pPhyStatus + 26), *(pPhyStatus + 25), *(pPhyStatus + 24));\r
+*/\r
+}\r
+\r
+VOID\r
+phydm_Process_RSSIForDM_Jaguar2( \r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ IN PODM_PHY_INFO_T pPhyInfo,\r
+ IN PODM_PACKET_INFO_T pPktinfo\r
+ )\r
+{\r
+ u4Byte UndecoratedSmoothedPWDB, RSSI_Ave;\r
+ u1Byte i;\r
+ PSTA_INFO_T pEntry;\r
+\r
+ if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM)\r
+ return;\r
+\r
+ pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID]; \r
+\r
+ if (!IS_STA_VALID(pEntry))\r
+ return;\r
+\r
+ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/\r
+ return;\r
+\r
+ if (pPktinfo->bPacketBeacon)\r
+ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++;\r
+ \r
+ if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {\r
+ u4Byte RSSI_linear = 0;\r
+\r
+ UndecoratedSmoothedPWDB = (u4Byte)pEntry->rssi_stat.UndecoratedSmoothedPWDB;\r
+ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
+ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
+ pDM_Odm->RSSI_C = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C];\r
+ pDM_Odm->RSSI_D = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D];\r
+\r
+ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {\r
+ if (pPhyInfo->RxMIMOSignalStrength[i] != 0)\r
+ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[i]);\r
+ }\r
+\r
+ switch (pPhyInfo->RxCount + 1) {\r
+ case 2:\r
+ RSSI_linear = (RSSI_linear >> 1);\r
+ break;\r
+ case 3:\r
+ RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5; /* RSSI_linear/3 ~ RSSI_linear*11/32 */\r
+ break;\r
+ case 4:\r
+ RSSI_linear = (RSSI_linear >> 2);\r
+ break;\r
+ }\r
+ RSSI_Ave = odm_ConvertTo_dB(RSSI_linear);\r
+\r
+ if (UndecoratedSmoothedPWDB <= 0)\r
+ UndecoratedSmoothedPWDB = pPhyInfo->RxPWDBAll;\r
+ else\r
+ UndecoratedSmoothedPWDB = (RSSI_Ave + ((UndecoratedSmoothedPWDB<<4) - UndecoratedSmoothedPWDB))>>4;\r
+\r
+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE)\r
+ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == -1)\r
+ phydm_ra_rssi_rpt_wk(pDM_Odm);\r
+ #endif\r
+\r
+ pEntry->rssi_stat.UndecoratedSmoothedPWDB = (s4Byte)UndecoratedSmoothedPWDB;\r
+ }\r
+}\r
+\r
+VOID\r
+phydm_RxPhyStatusJaguarSeries2(\r
+ IN PDM_ODM_T pPhydm,\r
+ IN pu1Byte pPhyStatus,\r
+ IN PODM_PACKET_INFO_T pPktinfo,\r
+ OUT PODM_PHY_INFO_T pPhyInfo\r
+)\r
+{\r
+ u1Byte phy_status_type = (*pPhyStatus & 0xf);\r
+\r
+ /*DbgPrint("phydm_RxPhyStatusJaguarSeries2================> (page: %d)\n", phy_status_type);*/\r
+ \r
+ /* Memory reset */\r
+ phydm_ResetPhyInfo(pPhydm, pPhyInfo);\r
+\r
+ /* Phy status parsing */\r
+ switch (phy_status_type) {\r
+ case 0:\r
+ {\r
+ phydm_GetRxPhyStatusType0(pPhydm, pPhyStatus, pPktinfo, pPhyInfo);\r
+ break;\r
+ }\r
+ case 1:\r
+ {\r
+ phydm_GetRxPhyStatusType1(pPhydm, pPhyStatus, pPktinfo, pPhyInfo);\r
+ break;\r
+ }\r
+ case 2:\r
+ {\r
+ phydm_GetRxPhyStatusType2(pPhydm, pPhyStatus, pPktinfo, pPhyInfo);\r
+ break;\r
+ }\r
+ case 5:\r
+ {\r
+ phydm_GetRxPhyStatusType5(pPhyStatus);\r
+ return;\r
+ }\r
+ default:\r
+ return;\r
+ }\r
+\r
+ /* Update signal strength to UI, and pPhyInfo->RxPWDBAll is the maximum RSSI of all path */\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ pPhyInfo->SignalStrength = SignalScaleProc(pPhydm->Adapter, pPhyInfo->RxPWDBAll, FALSE, FALSE);\r
+#else\r
+ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pPhydm, pPhyInfo->RxPWDBAll));\r
+#endif\r
+\r
+ /* Calculate average RSSI and smoothed RSSI */\r
+ phydm_Process_RSSIForDM_Jaguar2(pPhydm, pPhyInfo, pPktinfo);\r
+\r
+}\r
+/*==============================================*/\r
+#endif\r
+\r
projects / firefly-linux-kernel-4.4.55.git / blobdiff