}
}
+ /*
+ * The EXT_CSD format is meant to be forward compatible. As long
+ * as CSD_STRUCTURE does not change, all values for EXT_CSD_REV
+ * are authorized, see JEDEC JESD84-B50 section B.8.
+ */
card->ext_csd.rev = ext_csd[EXT_CSD_REV];
- if (card->ext_csd.rev > 7) {
- pr_err("%s: unrecognised EXT_CSD revision %d\n",
- mmc_hostname(card->host), card->ext_csd.rev);
- err = -EINVAL;
- goto out;
- }
card->ext_csd.raw_sectors[0] = ext_csd[EXT_CSD_SEC_CNT + 0];
card->ext_csd.raw_sectors[1] = ext_csd[EXT_CSD_SEC_CNT + 1];
*/
card->ext_csd.boot_ro_lock = ext_csd[EXT_CSD_BOOT_WP];
card->ext_csd.boot_ro_lockable = true;
-
- /* Save power class values */
- card->ext_csd.raw_pwr_cl_52_195 =
- ext_csd[EXT_CSD_PWR_CL_52_195];
- card->ext_csd.raw_pwr_cl_26_195 =
- ext_csd[EXT_CSD_PWR_CL_26_195];
- card->ext_csd.raw_pwr_cl_52_360 =
- ext_csd[EXT_CSD_PWR_CL_52_360];
- card->ext_csd.raw_pwr_cl_26_360 =
- ext_csd[EXT_CSD_PWR_CL_26_360];
- card->ext_csd.raw_pwr_cl_200_195 =
- ext_csd[EXT_CSD_PWR_CL_200_195];
- card->ext_csd.raw_pwr_cl_200_360 =
- ext_csd[EXT_CSD_PWR_CL_200_360];
- card->ext_csd.raw_pwr_cl_ddr_52_195 =
- ext_csd[EXT_CSD_PWR_CL_DDR_52_195];
- card->ext_csd.raw_pwr_cl_ddr_52_360 =
- ext_csd[EXT_CSD_PWR_CL_DDR_52_360];
}
if (card->ext_csd.rev >= 5) {
* RPMB regions are defined in multiples of 128K.
*/
card->ext_csd.raw_rpmb_size_mult = ext_csd[EXT_CSD_RPMB_MULT];
+ #if 0 //noted by xbw,2014-03-11
if (ext_csd[EXT_CSD_RPMB_MULT] && mmc_host_cmd23(card->host)) {
mmc_part_add(card, ext_csd[EXT_CSD_RPMB_MULT] << 17,
EXT_CSD_PART_CONFIG_ACC_RPMB,
"rpmb", 0, false,
MMC_BLK_DATA_AREA_RPMB);
}
+ #endif
}
card->ext_csd.raw_erased_mem_count = ext_csd[EXT_CSD_ERASED_MEM_CONT];
(card->ext_csd.raw_sectors[2] ==
bw_ext_csd[EXT_CSD_SEC_CNT + 2]) &&
(card->ext_csd.raw_sectors[3] ==
- bw_ext_csd[EXT_CSD_SEC_CNT + 3]) &&
- (card->ext_csd.raw_pwr_cl_52_195 ==
- bw_ext_csd[EXT_CSD_PWR_CL_52_195]) &&
- (card->ext_csd.raw_pwr_cl_26_195 ==
- bw_ext_csd[EXT_CSD_PWR_CL_26_195]) &&
- (card->ext_csd.raw_pwr_cl_52_360 ==
- bw_ext_csd[EXT_CSD_PWR_CL_52_360]) &&
- (card->ext_csd.raw_pwr_cl_26_360 ==
- bw_ext_csd[EXT_CSD_PWR_CL_26_360]) &&
- (card->ext_csd.raw_pwr_cl_200_195 ==
- bw_ext_csd[EXT_CSD_PWR_CL_200_195]) &&
- (card->ext_csd.raw_pwr_cl_200_360 ==
- bw_ext_csd[EXT_CSD_PWR_CL_200_360]) &&
- (card->ext_csd.raw_pwr_cl_ddr_52_195 ==
- bw_ext_csd[EXT_CSD_PWR_CL_DDR_52_195]) &&
- (card->ext_csd.raw_pwr_cl_ddr_52_360 ==
- bw_ext_csd[EXT_CSD_PWR_CL_DDR_52_360]));
+ bw_ext_csd[EXT_CSD_SEC_CNT + 3]));
if (err)
err = -EINVAL;
* 3. set the clock to > 52Mhz <=200MHz and
* 4. execute tuning for HS200
*/
+ /*
if ((host->caps2 & MMC_CAP2_HS200) &&
card->host->ops->execute_tuning) {
mmc_host_clk_hold(card->host);
mmc_hostname(card->host));
goto err;
}
+ */
+ if (host->caps2 & MMC_CAP2_HS200)
+ mmc_execute_tuning(card);
ext_csd_bits = (bus_width == MMC_BUS_WIDTH_8) ?
EXT_CSD_BUS_WIDTH_8 : EXT_CSD_BUS_WIDTH_4;
*/
static int mmc_suspend(struct mmc_host *host)
{
- return _mmc_suspend(host, true);
+ int err;
+
+ err = _mmc_suspend(host, true);
+ if (!err) {
+ pm_runtime_disable(&host->card->dev);
+ pm_runtime_set_suspended(&host->card->dev);
+ }
+
+ return err;
}
/*
pm_runtime_mark_last_busy(&host->card->dev);
}
pm_runtime_enable(&host->card->dev);
+ return err;
}
/*
* Shutdown callback