Merge branch 'linux-linaro-lsk-v4.4-android' of git://git.linaro.org/kernel/linux...

[firefly-linux-kernel-4.4.55.git] / drivers / iio / adc / rockchip_saradc.c

diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
index 9c311c1e1ac7f89cef190a3445507025fdb8f131..85d701291654074e1fa07978331eb01d89abd04a 100644 (file)
--- a/drivers/iio/adc/rockchip_saradc.c
+++ b/drivers/iio/adc/rockchip_saradc.c
@@ -21,6 +21,8 @@
 #include <linux/of_device.h>
 #include <linux/clk.h>
 #include <linux/completion.h>
+#include <linux/delay.h>
+#include <linux/reset.h>
 #include <linux/regulator/consumer.h>
 #include <linux/iio/iio.h>
 
@@ -53,6 +55,7 @@ struct rockchip_saradc {
        struct clk              *clk;
        struct completion       completion;
        struct regulator        *vref;
+       struct reset_control    *reset;
        const struct rockchip_saradc_data *data;
        u16                     last_val;
 };
@@ -159,6 +162,22 @@ static const struct rockchip_saradc_data rk3066_tsadc_data = {
        .clk_rate = 50000,
 };
 
+static const struct iio_chan_spec rockchip_rk3399_saradc_iio_channels[] = {
+       ADC_CHANNEL(0, "adc0"),
+       ADC_CHANNEL(1, "adc1"),
+       ADC_CHANNEL(2, "adc2"),
+       ADC_CHANNEL(3, "adc3"),
+       ADC_CHANNEL(4, "adc4"),
+       ADC_CHANNEL(5, "adc5"),
+};
+
+static const struct rockchip_saradc_data rk3399_saradc_data = {
+       .num_bits = 10,
+       .channels = rockchip_rk3399_saradc_iio_channels,
+       .num_channels = ARRAY_SIZE(rockchip_rk3399_saradc_iio_channels),
+       .clk_rate = 1000000,
+};
+
 static const struct of_device_id rockchip_saradc_match[] = {
        {
                .compatible = "rockchip,saradc",
@@ -166,11 +185,24 @@ static const struct of_device_id rockchip_saradc_match[] = {
        }, {
                .compatible = "rockchip,rk3066-tsadc",
                .data = &rk3066_tsadc_data,
+       }, {
+               .compatible = "rockchip,rk3399-saradc",
+               .data = &rk3399_saradc_data,
        },
        {},
 };
 MODULE_DEVICE_TABLE(of, rockchip_saradc_match);
 
+/**
+ * Reset SARADC Controller.
+ */
+static void rockchip_saradc_reset_controller(struct reset_control *reset)
+{
+       reset_control_assert(reset);
+       usleep_range(10, 20);
+       reset_control_deassert(reset);
+}
+
 static int rockchip_saradc_probe(struct platform_device *pdev)
 {
        struct rockchip_saradc *info = NULL;
@@ -199,6 +231,20 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
        if (IS_ERR(info->regs))
                return PTR_ERR(info->regs);
 
+       /*
+        * The reset should be an optional property, as it should work
+        * with old devicetrees as well
+        */
+       info->reset = devm_reset_control_get(&pdev->dev, "saradc-apb");
+       if (IS_ERR(info->reset)) {
+               ret = PTR_ERR(info->reset);
+               if (ret != -ENOENT)
+                       return ret;
+
+               dev_dbg(&pdev->dev, "no reset control found\n");
+               info->reset = NULL;
+       }
+
        init_completion(&info->completion);
 
        irq = platform_get_irq(pdev, 0);
@@ -233,6 +279,9 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
                return PTR_ERR(info->vref);
        }
 
+       if (info->reset)
+               rockchip_saradc_reset_controller(info->reset);
+
        /*
         * Use a default value for the converter clock.
         * This may become user-configurable in the future.