+static const struct vop_intr rk3368_vop_intr = {
+ .intrs = rk3368_vop_intrs,
+ .nintrs = ARRAY_SIZE(rk3368_vop_intrs),
+ .status = VOP_REG_MASK(RK3368_INTR_STATUS, 0x3fff, 0),
+ .enable = VOP_REG_MASK(RK3368_INTR_EN, 0x3fff, 0),
+ .clear = VOP_REG_MASK(RK3368_INTR_CLEAR, 0x3fff, 0),
+};
+
+static const struct vop_win_phy rk3368_win23_data = {
+ .data_formats = formats_win_lite,
+ .nformats = ARRAY_SIZE(formats_win_lite),
+ .gate = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 0),
+ .enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4),
+ .format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5),
+ .ymirror = VOP_REG(RK3368_WIN2_CTRL1, 0x1, 15),
+ .rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 20),
+ .dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO0, 0x0fff0fff, 0),
+ .dsp_st = VOP_REG(RK3368_WIN2_DSP_ST0, 0x1fff1fff, 0),
+ .yrgb_mst = VOP_REG(RK3368_WIN2_MST0, 0xffffffff, 0),
+ .yrgb_vir = VOP_REG(RK3368_WIN2_VIR0_1, 0x1fff, 0),
+ .src_alpha_ctl = VOP_REG(RK3368_WIN2_SRC_ALPHA_CTRL, 0xff, 0),
+ .dst_alpha_ctl = VOP_REG(RK3368_WIN2_DST_ALPHA_CTRL, 0xff, 0),
+};
+
+static const struct vop_win_phy rk3368_area1_data = {
+ .enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 8),
+ .format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 9),
+ .rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 23),
+ .dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO1, 0x0fff0fff, 0),
+ .dsp_st = VOP_REG(RK3368_WIN2_DSP_ST1, 0x1fff1fff, 0),
+ .yrgb_mst = VOP_REG(RK3368_WIN2_MST1, 0xffffffff, 0),
+ .yrgb_vir = VOP_REG(RK3368_WIN2_VIR0_1, 0x1fff, 16),
+};
+
+static const struct vop_win_phy rk3368_area2_data = {
+ .enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 12),
+ .format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 13),
+ .rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 26),
+ .dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO2, 0x0fff0fff, 0),
+ .dsp_st = VOP_REG(RK3368_WIN2_DSP_ST2, 0x1fff1fff, 0),
+ .yrgb_mst = VOP_REG(RK3368_WIN2_MST2, 0xffffffff, 0),
+ .yrgb_vir = VOP_REG(RK3368_WIN2_VIR2_3, 0x1fff, 0),
+};
+
+static const struct vop_win_phy rk3368_area3_data = {
+ .enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 16),
+ .format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 17),
+ .rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 29),
+ .dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO3, 0x0fff0fff, 0),
+ .dsp_st = VOP_REG(RK3368_WIN2_DSP_ST3, 0x1fff1fff, 0),
+ .yrgb_mst = VOP_REG(RK3368_WIN2_MST3, 0xffffffff, 0),
+ .yrgb_vir = VOP_REG(RK3368_WIN2_VIR2_3, 0x1fff, 16),
+};
+
+static const struct vop_win_phy *rk3368_area_data[] = {
+ &rk3368_area1_data,
+ &rk3368_area2_data,
+ &rk3368_area3_data
+};
+
+static const struct vop_win_data rk3368_vop_win_data[] = {
+ { .base = 0x00, .phy = &rk3288_win01_data,
+ .type = DRM_PLANE_TYPE_PRIMARY },
+ { .base = 0x40, .phy = &rk3288_win01_data,
+ .type = DRM_PLANE_TYPE_OVERLAY },
+ { .base = 0x00, .phy = &rk3368_win23_data,
+ .type = DRM_PLANE_TYPE_OVERLAY,
+ .area = rk3368_area_data,
+ .area_size = ARRAY_SIZE(rk3368_area_data), },
+ { .base = 0x50, .phy = &rk3368_win23_data,
+ .type = DRM_PLANE_TYPE_CURSOR,
+ .area = rk3368_area_data,
+ .area_size = ARRAY_SIZE(rk3368_area_data), },
+};
+
+static const struct vop_data rk3368_vop = {
+ .version = VOP_VERSION(3, 2),
+ .feature = VOP_FEATURE_OUTPUT_10BIT,
+ .intr = &rk3368_vop_intr,
+ .ctrl = &rk3288_ctrl_data,
+ .win = rk3368_vop_win_data,
+ .win_size = ARRAY_SIZE(rk3368_vop_win_data),
+};
+
+static const struct vop_intr rk3366_vop_intr = {
+ .intrs = rk3368_vop_intrs,
+ .nintrs = ARRAY_SIZE(rk3368_vop_intrs),
+ .status = VOP_REG_MASK(RK3366_INTR_STATUS0, 0xffff, 0),
+ .enable = VOP_REG_MASK(RK3366_INTR_EN0, 0xffff, 0),
+ .clear = VOP_REG_MASK(RK3366_INTR_CLEAR0, 0xffff, 0),
+};
+
+static const struct vop_data rk3366_vop = {
+ .version = VOP_VERSION(3, 4),
+ .feature = VOP_FEATURE_OUTPUT_10BIT,
+ .intr = &rk3366_vop_intr,
+ .ctrl = &rk3288_ctrl_data,
+ .win = rk3368_vop_win_data,
+ .win_size = ARRAY_SIZE(rk3368_vop_win_data),
+};
+
+static const uint32_t vop_csc_y2r_bt601[] = {
+ 0x00000400, 0x0400059c, 0xfd25fea0, 0x07170400,
+ 0x00000000, 0xfffecab4, 0x00087932, 0xfff1d4f2,