drm/i915: Parametrize fence registers
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / i915 / i915_reg.h
index 184b1237a8681878c2d1e2fd7507d2c0f96ae50e..d5a07906721f8937d345ecc6766ef9a5ca3b0211 100644 (file)
@@ -1437,9 +1437,15 @@ enum skl_disp_power_wells {
 
 /*
  * Fence registers
+ * [0-7]  @ 0x2000 gen2,gen3
+ * [8-15] @ 0x3000 945,g33,pnv
+ *
+ * [0-15] @ 0x3000 gen4,gen5
+ *
+ * [0-15] @ 0x100000 gen6,vlv,chv
+ * [0-31] @ 0x100000 gen7+
  */
-#define FENCE_REG_830_0                        0x2000
-#define FENCE_REG_945_8                        0x3000
+#define FENCE_REG(i)                   (0x2000 + (((i) & 8) << 9) + ((i) & 7) * 4)
 #define   I830_FENCE_START_MASK                0x07f80000
 #define   I830_FENCE_TILING_Y_SHIFT    12
 #define   I830_FENCE_SIZE_BITS(size)   ((ffs((size) >> 19) - 1) << 8)
@@ -1452,14 +1458,16 @@ enum skl_disp_power_wells {
 #define   I915_FENCE_START_MASK                0x0ff00000
 #define   I915_FENCE_SIZE_BITS(size)   ((ffs((size) >> 20) - 1) << 8)
 
-#define FENCE_REG_965_0                        0x03000
+#define FENCE_REG_965_LO(i)            (0x03000 + (i) * 8)
+#define FENCE_REG_965_HI(i)            (0x03000 + (i) * 8 + 4)
 #define   I965_FENCE_PITCH_SHIFT       2
 #define   I965_FENCE_TILING_Y_SHIFT    1
 #define   I965_FENCE_REG_VALID         (1<<0)
 #define   I965_FENCE_MAX_PITCH_VAL     0x0400
 
-#define FENCE_REG_SANDYBRIDGE_0                0x100000
-#define   SANDYBRIDGE_FENCE_PITCH_SHIFT        32
+#define FENCE_REG_GEN6_LO(i)   (0x100000 + (i) * 8)
+#define FENCE_REG_GEN6_HI(i)   (0x100000 + (i) * 8 + 4)
+#define   GEN6_FENCE_PITCH_SHIFT       32
 #define   GEN7_FENCE_MAX_PITCH_VAL     0x0800