FROMLIST: drm: bridge: dw-hdmi: add HDMI vendor specific infoframe config

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / bridge / dw-hdmi.h

diff --git a/drivers/gpu/drm/bridge/dw-hdmi.h b/drivers/gpu/drm/bridge/dw-hdmi.h
index cad1dfbc950f38fc8488f09dd4a088a66fb9c76d..dbc717306a32900acc2d317db640c3c4b49c1972 100644 (file)
--- a/drivers/gpu/drm/bridge/dw-hdmi.h
+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
@@ -255,6 +255,7 @@
 #define HDMI_FC_MASK2                           0x10DA
 #define HDMI_FC_POL2                            0x10DB
 #define HDMI_FC_PRCONF                          0x10E0
+#define HDMI_FC_SCRAMBLER_CTRL                  0x10E1
 
 #define HDMI_FC_GMD_STAT                        0x1100
 #define HDMI_FC_GMD_EN                          0x1101
@@ -570,6 +571,10 @@ enum {
        HDMI_IH_PHY_STAT0_TX_PHY_LOCK = 0x2,
        HDMI_IH_PHY_STAT0_HPD = 0x1,
 
+/* IH_I2CM_STAT0 and IH_MUTE_I2CM_STAT0 field values */
+       HDMI_IH_I2CM_STAT0_DONE = 0x2,
+       HDMI_IH_I2CM_STAT0_ERROR = 0x1,
+
 /* IH_MUTE_I2CMPHY_STAT0 field values */
        HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYDONE = 0x2,
        HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYERROR = 0x1,
@@ -839,6 +844,10 @@ enum {
        HDMI_FC_DBGFORCE_FORCEAUDIO = 0x10,
        HDMI_FC_DBGFORCE_FORCEVIDEO = 0x1,
 
+/* FC_DATAUTO0 field values */
+       HDMI_FC_DATAUTO0_VSD_MASK = 0x08,
+       HDMI_FC_DATAUTO0_VSD_OFFSET = 3,
+
 /* PHY_CONF0 field values */
        HDMI_PHY_CONF0_PDZ_MASK = 0x80,
        HDMI_PHY_CONF0_PDZ_OFFSET = 7,
@@ -1057,6 +1066,26 @@ enum {
        HDMI_A_VIDPOLCFG_HSYNCPOL_MASK = 0x2,
        HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH = 0x2,
        HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
+
+/* I2CM_OPERATION field values */
+       HDMI_I2CM_OPERATION_WRITE = 0x10,
+       HDMI_I2CM_OPERATION_READ_EXT = 0x2,
+       HDMI_I2CM_OPERATION_READ = 0x1,
+
+/* I2CM_INT field values */
+       HDMI_I2CM_INT_DONE_POL = 0x8,
+       HDMI_I2CM_INT_DONE_MASK = 0x4,
+
+/* I2CM_CTLINT field values */
+       HDMI_I2CM_CTLINT_NAC_POL = 0x80,
+       HDMI_I2CM_CTLINT_NAC_MASK = 0x40,
+       HDMI_I2CM_CTLINT_ARB_POL = 0x8,
+       HDMI_I2CM_CTLINT_ARB_MASK = 0x4,
+
+/* I2CM_DIV field values */
+       HDMI_I2CM_DIV_FAST_STD_MODE = 0x8,
+       HDMI_I2CM_DIV_FAST_MODE = 0x8,
+       HDMI_I2CM_DIV_STD_MODE = 0,
 };
 
 #endif /* __DW_HDMI_H__ */