* there may have serval ways to set ddr clock, use
* this flag to distinguish them.
* ROCKCHIP_DDRCLK_SIP: use SIP call to bl31 to change ddrclk rate.
+ * ROCKCHIP_DDRCLK_SCPI: use SCPI APIs to let mcu change ddrclk rate.
*/
#define ROCKCHIP_DDRCLK_SIP 0x01
+#define ROCKCHIP_DDRCLK_SCPI 0x02
struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,
const char *const *parent_names,