clk: rockchip: fix cci src clocks for rk3399

[firefly-linux-kernel-4.4.55.git] / drivers / clk / rockchip / clk-rk3399.c

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 702a75cdcb790119c8bb629b370af225c8835175..82487eaac7408b5596714b40d3676a2bbb19d56d 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -119,10 +119,6 @@ PNAME(mux_armclkb_p)                               = { "clk_core_b_lpll_src",
                                                    "clk_core_b_bpll_src",
                                                    "clk_core_b_dpll_src",
                                                    "clk_core_b_gpll_src" };
-PNAME(mux_ddrc_p)                              = { "clk_ddrc_lpll_src",
-                                                   "clk_ddrc_bpll_src",
-                                                   "clk_ddrc_dpll_src",
-                                                   "clk_ddrc_gpll_src" };
 PNAME(mux_aclk_cci_p)                          = { "cpll_aclk_cci_src",
                                                    "gpll_aclk_cci_src",
                                                    "npll_aclk_cci_src",
@@ -641,13 +637,13 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
                        RK3399_CLKGATE_CON(3), 6, GFLAGS),
 
        /* cci */
-       GATE(0, "cpll_cci", "cpll", CLK_IGNORE_UNUSED,
+       GATE(0, "cpll_aclk_cci_src", "cpll", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(2), 0, GFLAGS),
-       GATE(0, "gpll_cci", "gpll", CLK_IGNORE_UNUSED,
+       GATE(0, "gpll_aclk_cci_src", "gpll", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(2), 1, GFLAGS),
-       GATE(0, "npll_cci", "npll", CLK_IGNORE_UNUSED,
+       GATE(0, "npll_aclk_cci_src", "npll", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(2), 2, GFLAGS),
-       GATE(0, "vpll_cci", "vpll", CLK_IGNORE_UNUSED,
+       GATE(0, "vpll_aclk_cci_src", "vpll", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(2), 3, GFLAGS),
 
        COMPOSITE(0, "aclk_cci_pre", mux_aclk_cci_p, CLK_IGNORE_UNUSED,
@@ -1351,8 +1347,9 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = {
                        RK3399_CLKSEL_CON(1), 7, 1, MFLAGS, 0, 7, DFLAGS,
                        RK3399_CLKGATE_CON(0), 2, GFLAGS),
 
-       COMPOSITE_NOGATE(0, "clk_wifi_div", mux_ppll_24m_p, CLK_IGNORE_UNUSED,
-                       RK3399_CLKSEL_CON(1), 13, 1, MFLAGS, 8, 5, DFLAGS),
+       COMPOSITE(0, "clk_wifi_div", mux_ppll_24m_p, CLK_IGNORE_UNUSED,
+                       RK3399_CLKSEL_CON(1), 13, 1, MFLAGS, 8, 5, DFLAGS,
+                       RK3399_CLKGATE_CON(0), 8, GFLAGS),
 
        COMPOSITE_FRACMUX_NOGATE(0, "clk_wifi_frac", "clk_wifi_div", CLK_SET_RATE_PARENT,
                        RK3399_CLKSEL_CON(7), 0,
@@ -1422,6 +1419,22 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = {
 static const char *const rk3399_critical_clocks[] __initconst = {
        "aclk_cci_pre",
        "pclk_pmu_src",
+       "pclk_perilp0",
+       "hclk_perilp0",
+       "pclk_perilp1",
+       "pclk_perihp",
+       "hclk_perihp",
+       "aclk_perihp",
+       "aclk_perilp0",
+       "hclk_perilp1",
+       "aclk_dmac0_perilp",
+       "gpll_hclk_perilp1_src",
+       "gpll_aclk_perilp0_src",
+       "gpll_aclk_perihp_src",
+       "pclk_pmu_src",
+       "fclk_cm0s_src_pmu",
+       "clk_timer_src_pmu",
+       "ppll",
 };
 
 static void __init rk3399_clk_init(struct device_node *np)