arm64: dts: rk3368-tb_8846.dts: modify rk818 battery node

[firefly-linux-kernel-4.4.55.git] / crypto / Kconfig

diff --git a/crypto/Kconfig b/crypto/Kconfig
index a1eba1845367ef3cadc68bef9a06c5b2b1528ec1..fa7e2a8cc60824111f3fbded37cac22a7f46ab4a 100644 (file)
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -533,6 +533,17 @@ config CRYPTO_SHA1_PPC
          This is the powerpc hardware accelerated implementation of the
          SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
 
+config CRYPTO_SHA1_ARM_NEON
+       tristate "SHA1 digest algorithm (ARM NEON)"
+       depends on ARM && KERNEL_MODE_NEON && !CPU_BIG_ENDIAN
+       select CRYPTO_SHA1_ARM
+       select CRYPTO_SHA1
+       select CRYPTO_HASH
+       help
+         SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
+         using optimized ARM NEON assembly, when NEON instructions are
+         available.
+
 config CRYPTO_SHA256
        tristate "SHA224 and SHA256 digest algorithm"
        select CRYPTO_HASH
@@ -545,6 +556,13 @@ config CRYPTO_SHA256
          This code also includes SHA-224, a 224 bit hash with 112 bits
          of security against collision attacks.
 
+config CRYPTO_SHA256_ARM
+       tristate "SHA-224/256 digest algorithm (ARM-asm and NEON)"
+       select CRYPTO_HASH
+       help
+         SHA-256 secure hash standard (DFIPS 180-2) implemented
+         using optimized ARM assembler and NEON, when available.
+
 config CRYPTO_SHA256_SPARC64
        tristate "SHA224 and SHA256 digest algorithm (SPARC64)"
        depends on SPARC64
@@ -566,6 +584,21 @@ config CRYPTO_SHA512
          This code also includes SHA-384, a 384 bit hash with 192 bits
          of security against collision attacks.
 
+config CRYPTO_SHA512_ARM_NEON
+       tristate "SHA384 and SHA512 digest algorithm (ARM NEON)"
+       depends on ARM && KERNEL_MODE_NEON && !CPU_BIG_ENDIAN
+       select CRYPTO_SHA512
+       select CRYPTO_HASH
+       help
+         SHA-512 secure hash standard (DFIPS 180-2) implemented
+         using ARM NEON instructions, when available.
+
+         This version of SHA implements a 512 bit hash with 256 bits of
+         security against collision attacks.
+
+         This code also includes SHA-384, a 384 bit hash with 192 bits
+         of security against collision attacks.
+
 config CRYPTO_SHA512_SPARC64
        tristate "SHA384 and SHA512 digest algorithm (SPARC64)"
        depends on SPARC64
@@ -761,6 +794,22 @@ config CRYPTO_AES_ARM
 
          See <http://csrc.nist.gov/encryption/aes/> for more information.
 
+config CRYPTO_AES_ARM_BS
+       tristate "Bit sliced AES using NEON instructions"
+       depends on ARM && KERNEL_MODE_NEON
+       select CRYPTO_ALGAPI
+       select CRYPTO_AES_ARM
+       select CRYPTO_ABLK_HELPER
+       help
+         Use a faster and more secure NEON based implementation of AES in CBC,
+         CTR and XTS modes
+
+         Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
+         and for XTS mode encryption, CBC and XTS mode decryption speedup is
+         around 25%. (CBC encryption speed is not affected by this driver.)
+         This implementation does not rely on any lookup tables so it is
+         believed to be invulnerable to cache timing attacks.
+
 config CRYPTO_ANUBIS
        tristate "Anubis cipher algorithm"
        select CRYPTO_ALGAPI