opp00 {
opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <1000000>;
+ opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp01 {
opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <1000000>;
+ opp-microvolt = <900000>;
};
opp02 {
opp-hz = /bits/ 64 <816000000>;
- opp-microvolt = <1000000>;
+ opp-microvolt = <900000>;
};
opp03 {
opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <1000000>;
+ opp-microvolt = <900000>;
};
};
opp00 {
opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <1000000>;
+ opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp01 {
opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <1000000>;
+ opp-microvolt = <900000>;
};
opp02 {
opp-hz = /bits/ 64 <816000000>;
- opp-microvolt = <1000000>;
+ opp-microvolt = <900000>;
};
opp03 {
opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <1000000>;
+ opp-microvolt = <900000>;
};
opp04 {
opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <1000000>;
+ opp-microvolt = <900000>;
};
};
status = "disabled";
};
+ usb2phy {
+ compatible = "rockchip,rk3399-usb-phy";
+ rockchip,grf = <&grf>;
+ vbus_drv-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb2phy0: usb2-phy0 {
+ #phy-cells = <0>;
+ #clock-cells = <0>;
+ reg = <0xe458>;
+ };
+
+ usb2phy1: usb2-phy1 {
+ #phy-cells = <0>;
+ #clock-cells = <0>;
+ reg = <0xe468>;
+ };
+ };
+
usb_host0_echi: usb@fe380000 {
compatible = "generic-ehci";
reg = <0x0 0xfe380000 0x0 0x20000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HOST0>;
- clock-names = "hclk_host0";
+ clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>;
+ clock-names = "hclk_host0", "hclk_host0_arb";
+ phys = <&usb2phy0>;
+ phy-names = "usb2_phy0";
status = "disabled";
};
compatible = "generic-ohci";
reg = <0x0 0xfe3a0000 0x0 0x20000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HOST0>;
- clock-names = "hclk_host0";
+ clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>;
+ clock-names = "hclk_host0", "hclk_host0_arb";
status = "disabled";
};
compatible = "generic-ehci";
reg = <0x0 0xfe3c0000 0x0 0x20000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HOST1>;
- clock-names = "hclk_host1";
+ clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>;
+ clock-names = "hclk_host1", "hclk_host1_arb";
+ phys = <&usb2phy1>;
+ phy-names = "usb2_phy1";
status = "disabled";
};
compatible = "generic-ohci";
reg = <0x0 0xfe3e0000 0x0 0x20000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HOST1>;
- clock-names = "hclk_host1";
+ clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>;
+ clock-names = "hclk_host1", "hclk_host1_arb";
status = "disabled";
};
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
tx-fifo-resize;
+ snps,dis_enblslpm_quirk;
+ snps,phyif_utmi_16_bits;
+ snps,dis_u2_freeclk_exists_quirk;
+ snps,dis_del_phy_power_chg_quirk;
status = "disabled";
};
};
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
tx-fifo-resize;
+ snps,dis_enblslpm_quirk;
+ snps,phyif_utmi_16_bits;
+ snps,dis_u2_freeclk_exists_quirk;
+ snps,dis_del_phy_power_chg_quirk;
status = "disabled";
};
};
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks =
+ <&cru ARMCLKL>, <&cru ARMCLKB>,
<&cru PLL_GPLL>, <&cru PLL_CPLL>,
<&cru PLL_NPLL>,
<&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
<&cru PCLK_PERILP0>,
<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
assigned-clock-rates =
+ <816000000>, <1008000000>,
<594000000>, <800000000>,
<1000000000>,
<150000000>, <75000000>,