ARM64: dts: rockchip: rk3399: add usb2.0 phy node

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 06ccec3ff172b8793b4892bc6818cb1b2cc549fc..85c03abdcb228f3931758eb95ed88df576d97c65 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -169,20 +169,20 @@
 
                opp00 {
                        opp-hz = /bits/ 64 <408000000>;
-                       opp-microvolt = <1000000>;
+                       opp-microvolt = <900000>;
                        clock-latency-ns = <40000>;
                };
                opp01 {
                        opp-hz = /bits/ 64 <600000000>;
-                       opp-microvolt = <1000000>;
+                       opp-microvolt = <900000>;
                };
                opp02 {
                        opp-hz = /bits/ 64 <816000000>;
-                       opp-microvolt = <1000000>;
+                       opp-microvolt = <900000>;
                };
                opp03 {
                        opp-hz = /bits/ 64 <1008000000>;
-                       opp-microvolt = <1000000>;
+                       opp-microvolt = <900000>;
                };
        };
 
@@ -192,24 +192,24 @@
 
                opp00 {
                        opp-hz = /bits/ 64 <408000000>;
-                       opp-microvolt = <1000000>;
+                       opp-microvolt = <900000>;
                        clock-latency-ns = <40000>;
                };
                opp01 {
                        opp-hz = /bits/ 64 <600000000>;
-                       opp-microvolt = <1000000>;
+                       opp-microvolt = <900000>;
                };
                opp02 {
                        opp-hz = /bits/ 64 <816000000>;
-                       opp-microvolt = <1000000>;
+                       opp-microvolt = <900000>;
                };
                opp03 {
                        opp-hz = /bits/ 64 <1008000000>;
-                       opp-microvolt = <1000000>;
+                       opp-microvolt = <900000>;
                };
                opp04 {
                        opp-hz = /bits/ 64 <1200000000>;
-                       opp-microvolt = <1000000>;
+                       opp-microvolt = <900000>;
                };
        };
 
@@ -333,12 +333,34 @@
                status = "disabled";
        };
 
+       usb2phy {
+               compatible = "rockchip,rk3399-usb-phy";
+               rockchip,grf = <&grf>;
+               vbus_drv-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               usb2phy0: usb2-phy0 {
+                       #phy-cells = <0>;
+                       #clock-cells = <0>;
+                       reg = <0xe458>;
+               };
+
+               usb2phy1: usb2-phy1 {
+                       #phy-cells = <0>;
+                       #clock-cells = <0>;
+                       reg = <0xe468>;
+               };
+       };
+
        usb_host0_echi: usb@fe380000 {
                compatible = "generic-ehci";
                reg = <0x0 0xfe380000 0x0 0x20000>;
                interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cru HCLK_HOST0>;
-               clock-names = "hclk_host0";
+               clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>;
+               clock-names = "hclk_host0", "hclk_host0_arb";
+               phys = <&usb2phy0>;
+               phy-names = "usb2_phy0";
                status = "disabled";
        };
 
@@ -346,8 +368,8 @@
                compatible = "generic-ohci";
                reg = <0x0 0xfe3a0000 0x0 0x20000>;
                interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cru HCLK_HOST0>;
-               clock-names = "hclk_host0";
+               clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>;
+               clock-names = "hclk_host0", "hclk_host0_arb";
                status = "disabled";
        };
 
@@ -355,8 +377,10 @@
                compatible = "generic-ehci";
                reg = <0x0 0xfe3c0000 0x0 0x20000>;
                interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cru HCLK_HOST1>;
-               clock-names = "hclk_host1";
+               clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>;
+               clock-names = "hclk_host1", "hclk_host1_arb";
+               phys = <&usb2phy1>;
+               phy-names = "usb2_phy1";
                status = "disabled";
        };
 
@@ -364,11 +388,67 @@
                compatible = "generic-ohci";
                reg = <0x0 0xfe3e0000 0x0 0x20000>;
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cru HCLK_HOST1>;
-               clock-names = "hclk_host1";
+               clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>;
+               clock-names = "hclk_host1", "hclk_host1_arb";
                status = "disabled";
        };
 
+       usbdrd3_0: usb@fe800000 {
+               compatible = "rockchip,dwc3";
+               clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
+                        <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
+                        <&cru ACLK_USB3>, <&cru ACLK_USB3_NOC>,
+                        <&cru ACLK_USB3_GRF>;
+               clock-names = "clk_usb3otg0_ref", "clk_usb3otg0_suspend",
+                             "aclk_usb3otg0", "aclk_usb3_rksoc_axi_perf",
+                             "aclk_usb3", "aclk_usb3_noc",
+                             "aclk_usb3_grf";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               status = "disabled";
+               usbdrd_dwc3_0: dwc3 {
+                       compatible = "snps,dwc3";
+                       reg = <0x0 0xfe800000 0x0 0x100000>;
+                       interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+                       dr_mode = "otg";
+                       tx-fifo-resize;
+                       snps,dis_enblslpm_quirk;
+                       snps,phyif_utmi_16_bits;
+                       snps,dis_u2_freeclk_exists_quirk;
+                       snps,dis_del_phy_power_chg_quirk;
+                       status = "disabled";
+               };
+       };
+
+       usbdrd3_1: usb@fe900000 {
+               compatible = "rockchip,dwc3";
+               clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
+                        <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
+                        <&cru ACLK_USB3>, <&cru ACLK_USB3_NOC>,
+                        <&cru ACLK_USB3_GRF>;
+               clock-names = "clk_usb3otg1_ref", "clk_usb3otg1_suspend",
+                             "aclk_usb3otg1", "aclk_usb3_rksoc_axi_perf",
+                             "aclk_usb3", "aclk_usb3_noc",
+                             "aclk_usb3_grf";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               status = "disabled";
+               usbdrd_dwc3_1: dwc3 {
+                       compatible = "snps,dwc3";
+                       reg = <0x0 0xfe900000 0x0 0x100000>;
+                       interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+                       dr_mode = "otg";
+                       tx-fifo-resize;
+                       snps,dis_enblslpm_quirk;
+                       snps,phyif_utmi_16_bits;
+                       snps,dis_u2_freeclk_exists_quirk;
+                       snps,dis_del_phy_power_chg_quirk;
+                       status = "disabled";
+               };
+       };
+
        gic: interrupt-controller@fee00000 {
                compatible = "arm,gic-v3";
                #interrupt-cells = <3>;
@@ -809,6 +889,7 @@
                #clock-cells = <1>;
                #reset-cells = <1>;
                assigned-clocks =
+                       <&cru ARMCLKL>, <&cru ARMCLKB>,
                        <&cru PLL_GPLL>, <&cru PLL_CPLL>,
                        <&cru PLL_NPLL>,
                        <&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
@@ -817,6 +898,7 @@
                        <&cru PCLK_PERILP0>,
                        <&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
                assigned-clock-rates =
+                        <816000000>, <1008000000>,
                         <594000000>,  <800000000>,
                        <1000000000>,
                         <150000000>,   <75000000>,