#clock-cells = <0>;
};
+ dummy_cpll: dummy_cpll {
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ clock-output-names = "dummy_cpll";
+ #clock-cells = <0>;
+ };
+
+ dummy_vpll: dummy_vpll {
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ clock-output-names = "dummy_vpll";
+ #clock-cells = <0>;
+ };
+
amba {
compatible = "arm,amba-bus";
#address-cells = <2>;