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arm64: dts: rockchip: add mmc dt-bindings for rk3328 and evb board
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399.dtsi
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index c602081da1819e59d62f308fa04f5c2d8c7941e9..4298601b0fc588ab0df8e396f01858946f24b01a 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -119,8 +119,6 @@
                        dynamic-power-coefficient = <100>;
                        clocks = <&cru ARMCLKL>;
                        cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
-                       operating-points-v2 = <&cluster0_opp>;
-                       sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
                };
 
                cpu_l1: cpu@1 {
@@ -130,8 +128,6 @@
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
                        cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
-                       operating-points-v2 = <&cluster0_opp>;
-                       sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
                };
 
                cpu_l2: cpu@2 {
@@ -141,8 +137,6 @@
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
                        cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
-                       operating-points-v2 = <&cluster0_opp>;
-                       sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
                };
 
                cpu_l3: cpu@3 {
@@ -152,8 +146,6 @@
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
                        cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
-                       operating-points-v2 = <&cluster0_opp>;
-                       sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
                };
 
                cpu_b0: cpu@100 {
@@ -165,8 +157,6 @@
                        dynamic-power-coefficient = <436>;
                        clocks = <&cru ARMCLKB>;
                        cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
-                       operating-points-v2 = <&cluster1_opp>;
-                       sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
                };
 
                cpu_b1: cpu@101 {
@@ -176,8 +166,6 @@
                        enable-method = "psci";
                        clocks = <&cru ARMCLKB>;
                        cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
-                       operating-points-v2 = <&cluster1_opp>;
-                       sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
                };
 
                idle-states {
@@ -201,67 +189,6 @@
                                min-residency-us = <2000>;
                        };
                };
-
-               /include/ "rk3399-sched-energy.dtsi"
-
-       };
-
-       cluster0_opp: opp_table0 {
-               compatible = "operating-points-v2";
-               opp-shared;
-
-               opp@408000000 {
-                       opp-hz = /bits/ 64 <408000000>;
-                       opp-microvolt = <800000>;
-                       clock-latency-ns = <40000>;
-               };
-               opp@600000000 {
-                       opp-hz = /bits/ 64 <600000000>;
-                       opp-microvolt = <800000>;
-               };
-               opp@816000000 {
-                       opp-hz = /bits/ 64 <816000000>;
-                       opp-microvolt = <800000>;
-               };
-               opp@1008000000 {
-                       opp-hz = /bits/ 64 <1008000000>;
-                       opp-microvolt = <875000>;
-               };
-               opp@1200000000 {
-                       opp-hz = /bits/ 64 <1200000000>;
-                       opp-microvolt = <925000>;
-               };
-               opp@1416000000 {
-                       opp-hz = /bits/ 64 <1416000000>;
-                       opp-microvolt = <1025000>;
-               };
-       };
-
-       cluster1_opp: opp_table1 {
-               compatible = "operating-points-v2";
-               opp-shared;
-
-               opp@408000000 {
-                       opp-hz = /bits/ 64 <408000000>;
-                       opp-microvolt = <800000>;
-                       clock-latency-ns = <40000>;
-               };
-               opp@600000000 {
-                       opp-hz = /bits/ 64 <600000000>;
-                       opp-microvolt = <800000>;
-               };
-               opp@816000000 {
-                       opp-hz = /bits/ 64 <816000000>;
-                       opp-microvolt = <800000>;
-               };
-               opp@1008000000 {
-                       opp-hz = /bits/ 64 <1008000000>;
-                       opp-microvolt = <850000>;
-               };
-               opp@1200000000 {
-                       opp-hz = /bits/ 64 <1200000000>;
-                       opp-microvolt = <925000>;
-               };
        };
 
        cpu_avs: cpu-avs {
@@ -1036,7 +963,8 @@
                        };
                        pd_gmac@RK3399_PD_GMAC {
                                reg = <RK3399_PD_GMAC>;
-                               clocks = <&cru ACLK_GMAC>;
+                               clocks = <&cru ACLK_GMAC>,
+                                        <&cru PCLK_GMAC>;
                                pm_qos = <&qos_gmac>;
                        };
                        pd_perihp@RK3399_PD_PERIHP {
@@ -1130,6 +1058,11 @@
                compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd";
                reg = <0x0 0xff320000 0x0 0x1000>;
 
+               pmu_io_domains: pmu-io-domains {
+                       compatible = "rockchip,rk3399-pmu-io-voltage-domain";
+                       status = "disabled";
+               };
+
                reboot-mode {
                        compatible = "syscon-reboot-mode";
                        offset = <0x300>;
@@ -1141,6 +1074,13 @@
                        mode-recovery = <BOOT_RECOVERY>;
                        mode-ums = <BOOT_UMS>;
                };
+
+               pmu_pvtm: pmu-pvtm {
+                       compatible = "rockchip,rk3399-pmu-pvtm";
+                       clocks = <&pmucru SCLK_PVTM_PMU>;
+                       clock-names = "pmu";
+                       status = "disabled";
+               };
        };
 
        spi3: spi@ff350000 {
@@ -1215,6 +1155,7 @@
                clock-names = "aclk", "aclk-perf",
                              "hclk", "pm";
                bus-range = <0x0 0x1>;
+               max-link-speed = <1>;
                msi-map = <0x0 &its 0x0 0x1000>;
                interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
                             <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -1234,8 +1175,11 @@
                      <0x0 0xfd000000 0x0 0x1000000>;
                reg-names = "axi-base", "apb-base";
                resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
-                        <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>;
-               reset-names = "core", "mgmt", "mgmt-sticky", "pipe";
+                        <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,
+                        <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>,
+                        <&cru SRST_A_PCIE>;
+               reset-names = "core", "mgmt", "mgmt-sticky", "pipe",
+                             "pm", "pclk", "aclk";
                status = "disabled";
                pcie0_intc: interrupt-controller {
                        interrupt-controller;
@@ -1304,19 +1248,9 @@
                clocks = <&cru SCLK_DDRCLK>;
                clock-names = "dmc_clk";
                ddr_timing = <&ddr_timing>;
-               operating-points-v2 = <&dmc_opp_table>;
                status = "disabled";
        };
 
-       dmc_opp_table: dmc_opp_table {
-               compatible = "operating-points-v2";
-
-               opp00 {
-                       opp-hz = /bits/ 64 <666000000>;
-                       opp-microvolt = <900000>;
-               };
-       };
-
        rga: rga@ff680000 {
                compatible = "rockchip,rk3399-rga";
                reg = <0x0 0xff680000 0x0 0x10000>;
@@ -1403,6 +1337,11 @@
                #address-cells = <1>;
                #size-cells = <1>;
 
+               io_domains: io-domains {
+                       compatible = "rockchip,rk3399-io-voltage-domain";
+                       status = "disabled";
+               };
+
                emmc_phy: phy@f780 {
                        compatible = "rockchip,rk3399-emmc-phy";
                        reg = <0xf780 0x24>;
@@ -1465,6 +1404,16 @@
                                status = "disabled";
                        };
                };
+
+               pvtm: pvtm {
+                       compatible = "rockchip,rk3399-pvtm";
+                       clocks = <&cru SCLK_PVTM_CORE_L>,
+                                <&cru SCLK_PVTM_CORE_B>,
+                                <&cru SCLK_PVTM_GPU>,
+                                <&cru SCLK_PVTM_DDR>;
+                       clock-names = "core_l", "core_b", "gpu", "ddr";
+                       status = "disabled";
+               };
        };
 
        tcphy0: phy@ff7c0000 {
@@ -1619,7 +1568,6 @@
                clocks = <&cru ACLK_GPU>;
                clock-names = "clk_mali";
                #cooling-cells = <2>; /* min followed by max */
-               operating-points-v2 = <&gpu_opp_table>;
                power-domains = <&power RK3399_PD_GPU>;
                power-off-delay-ms = <200>;
                status = "disabled";
@@ -1635,25 +1583,6 @@
                };
        };
 
-       gpu_opp_table: gpu_opp_table {
-               compatible = "operating-points-v2";
-               opp-shared;
-
-               opp@200000000 {
-                       opp-hz = /bits/ 64 <200000000>;
-                       opp-microvolt = <900000>;
-               };
-               opp@300000000 {
-                       opp-hz = /bits/ 64 <300000000>;
-                       opp-microvolt = <900000>;
-               };
-               opp@400000000 {
-                       opp-hz = /bits/ 64 <400000000>;
-                       opp-microvolt = <900000>;
-               };
-
-       };
-
        vopl: vop@ff8f0000 {
                compatible = "rockchip,rk3399-vop-lit";
                reg = <0x0 0xff8f0000 0x0 0x3efc>;
@@ -1760,6 +1689,26 @@
                status = "disabled";
        };
 
+       isp0_mmu: iommu@ff914000 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
+               interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "isp0_mmu";
+               #iommu-cells = <0>;
+               rk_iommu,disable_reset_quirk;
+               status = "disabled";
+       };
+
+       isp1_mmu: iommu@ff924000 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
+               interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "isp1_mmu";
+               #iommu-cells = <0>;
+               rk_iommu,disable_reset_quirk;
+               status = "disabled";
+       };
+
        hdmi: hdmi@ff940000 {
                compatible = "rockchip,rk3399-dw-hdmi";
                reg = <0x0 0xff940000 0x0 0x20000>;
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