#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/power/rk3399-power.h>
+#include <dt-bindings/soc/rockchip_boot-mode.h>
#include <dt-bindings/thermal/thermal.h>
/ {
reg = <0x0 0x0>;
enable-method = "psci";
#cooling-cells = <2>; /* min followed by max */
+ dynamic-power-coefficient = <121>;
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster0_opp>;
+ sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_l1: cpu@1 {
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster0_opp>;
+ sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_l2: cpu@2 {
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster0_opp>;
+ sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_l3: cpu@3 {
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster0_opp>;
+ sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_b0: cpu@100 {
reg = <0x0 0x100>;
enable-method = "psci";
#cooling-cells = <2>; /* min followed by max */
+ dynamic-power-coefficient = <1068>;
clocks = <&cru ARMCLKB>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster1_opp>;
+ sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
};
cpu_b1: cpu@101 {
clocks = <&cru ARMCLKB>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster1_opp>;
+ sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
};
idle-states {
min-residency-us = <1150>;
};
};
+
+ /include/ "rk3399-sched-energy.dtsi"
+
};
cluster0_opp: opp_table0 {
reg-offset = <0xf780>;
#phy-cells = <0>;
rockchip,grf = <&grf>;
+ ctrl-base = <0xfe330000>;
status = "disabled";
};
#size-cells = <2>;
ranges;
status = "disabled";
- usbdrd_dwc3_0: dwc3 {
+ usbdrd_dwc3_0: dwc3@fe800000 {
compatible = "snps,dwc3";
reg = <0x0 0xfe800000 0x0 0x100000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
- tx-fifo-resize;
snps,dis_enblslpm_quirk;
snps,phyif_utmi_16_bits;
snps,dis_u2_freeclk_exists_quirk;
snps,dis_del_phy_power_chg_quirk;
+ snps,xhci_slow_suspend_quirk;
status = "disabled";
};
};
#size-cells = <2>;
ranges;
status = "disabled";
- usbdrd_dwc3_1: dwc3 {
+ usbdrd_dwc3_1: dwc3@fe900000 {
compatible = "snps,dwc3";
reg = <0x0 0xfe900000 0x0 0x100000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
- tx-fifo-resize;
snps,dis_enblslpm_quirk;
snps,phyif_utmi_16_bits;
snps,dis_u2_freeclk_exists_quirk;
snps,dis_del_phy_power_chg_quirk;
+ snps,xhci_slow_suspend_quirk;
status = "disabled";
};
};
};
thermal-zones {
- cpu {
+ soc_thermal: soc-thermal {
polling-delay-passive = <100>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
+ sustainable-power = <2600>; /* milliwatts */
thermal-sensors = <&tsadc 0>;
trips {
- cpu_alert0: cpu_alert0 {
+ threshold: trip-point@0 {
temperature = <70000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
- cpu_alert1: cpu_alert1 {
- temperature = <75000>; /* millicelsius */
+ target: trip-point@1 {
+ temperature = <85000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
- cpu_crit: cpu_crit {
+ soc_crit: soc-crit {
temperature = <95000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
cooling-maps {
map0 {
- trip = <&cpu_alert0>;
+ trip = <&target>;
cooling-device =
- <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
- trip = <&cpu_alert1>;
+ trip = <&target>;
cooling-device =
- <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
+ map2 {
+ trip = <&target>;
+ cooling-device =
+ <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
};
};
- gpu {
+ gpu_thermal: gpu-thermal {
polling-delay-passive = <100>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&tsadc 1>;
-
- trips {
- gpu_alert0: gpu_alert0 {
- temperature = <75000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
- gpu_crit: gpu_crit {
- temperature = <95000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&gpu_alert0>;
- cooling-device =
- <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
};
};
status = "disabled";
};
+ qos_gpu: qos_gpu@0xffae0000 {
+ compatible ="syscon";
+ reg = <0x0 0xffae0000 0x0 0x20>;
+ };
+ qos_video_m0: qos_video_m0@0xffab8000 {
+ compatible ="syscon";
+ reg = <0x0 0xffab8000 0x0 0x20>;
+ };
+ qos_video_m1_r: qos_video_m1_r@0xffac0000 {
+ compatible ="syscon";
+ reg = <0x0 0xffac0000 0x0 0x20>;
+ };
+ qos_video_m1_w: qos_video_m1_w@0xffac0080 {
+ compatible ="syscon";
+ reg = <0x0 0xffac0080 0x0 0x20>;
+ };
+ qos_rga_r: qos_rga_r@0xffab0000 {
+ compatible ="syscon";
+ reg = <0x0 0xffab0000 0x0 0x20>;
+ };
+ qos_rga_w: qos_rga_w@0xffab0080 {
+ compatible ="syscon";
+ reg = <0x0 0xffab0000 0x0 0x20>;
+ };
+ qos_iep: qos_iep@0xffa98000 {
+ compatible ="syscon";
+ reg = <0x0 0xffa98000 0x0 0x20>;
+ };
+ qos_vop_big_r: qos_vop_big_r@0xffac8000 {
+ compatible ="syscon";
+ reg = <0x0 0xffac8000 0x0 0x20>;
+ };
+ qos_vop_big_w: qos_vop_big_w@0xffac8080 {
+ compatible ="syscon";
+ reg = <0x0 0xffac8080 0x0 0x20>;
+ };
+ qos_vop_little: qos_vop_little@0xffad0000 {
+ compatible ="syscon";
+ reg = <0x0 0xffad0000 0x0 0x20>;
+ };
+ qos_isp0_m0: qos_isp0_m0@0xffaa0000 {
+ compatible ="syscon";
+ reg = <0x0 0xffaa0000 0x0 0x20>;
+ };
+ qos_isp0_m1: qos_isp0_m1@0xffaa0080 {
+ compatible ="syscon";
+ reg = <0x0 0xffaa0080 0x0 0x20>;
+ };
+ qos_isp1_m0: qos_isp1_m0@0xffaa8000 {
+ compatible ="syscon";
+ reg = <0x0 0xffaa8000 0x0 0x20>;
+ };
+ qos_isp1_m1: qos_isp1_m1@0xffaa8080 {
+ compatible ="syscon";
+ reg = <0x0 0xffaa8080 0x0 0x20>;
+ };
+ qos_hdcp: qos_hdcp@0xffa90000 {
+ compatible ="syscon";
+ reg = <0x0 0xffa90000 0x0 0x20>;
+ };
+
pmu: power-management@ff310000 {
compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
reg = <0x0 0xff310000 0x0 0x1000>;
power: power-controller {
- status = "disabled";
+ status = "okay";
compatible = "rockchip,rk3399-power-controller";
#power-domain-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
- pd_center {
- reg = <RK3399_PD_CENTER>;
- #address-cells = <1>;
- #size-cells = <0>;
- pd_vdu {
- reg = <RK3399_PD_VDU>;
- };
- pd_vcodec {
- reg = <RK3399_PD_VCODEC>;
- };
- pd_iep {
- reg = <RK3399_PD_IEP>;
- };
- pd_rga {
- reg = <RK3399_PD_RGA>;
- };
+ pd_vdu {
+ reg = <RK3399_PD_VDU>;
+ pm_qos = <&qos_video_m1_r>,
+ <&qos_video_m1_w>;
+ };
+ pd_vcodec {
+ reg = <RK3399_PD_VCODEC>;
+ pm_qos = <&qos_video_m0>;
+ };
+ pd_iep {
+ reg = <RK3399_PD_IEP>;
+ pm_qos = <&qos_iep>;
+ };
+ pd_rga {
+ reg = <RK3399_PD_RGA>;
+ pm_qos = <&qos_rga_r>,
+ <&qos_rga_w>;
};
pd_vio {
reg = <RK3399_PD_VIO>;
pd_isp0 {
reg = <RK3399_PD_ISP0>;
+ pm_qos = <&qos_isp0_m0>,
+ <&qos_isp0_m1>;
};
pd_isp1 {
reg = <RK3399_PD_ISP1>;
+ pm_qos = <&qos_isp1_m0>,
+ <&qos_isp1_m1>;
};
pd_hdcp {
reg = <RK3399_PD_HDCP>;
+ pm_qos = <&qos_hdcp>;
};
pd_vo {
reg = <RK3399_PD_VO>;
pd_vopb {
reg = <RK3399_PD_VOPB>;
+ pm_qos = <&qos_vop_big_r>,
+ <&qos_vop_big_w>;
};
pd_vopl {
reg = <RK3399_PD_VOPL>;
+ pm_qos = <&qos_vop_little>;
};
};
};
pd_gpu {
reg = <RK3399_PD_GPU>;
+ pm_qos = <&qos_gpu>;
};
};
};
pmugrf: syscon@ff320000 {
- compatible = "rockchip,rk3399-pmugrf", "syscon";
+ compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xff320000 0x0 0x1000>;
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x300>;
+ mode-normal = <BOOT_NORMAL>;
+ mode-recovery = <BOOT_RECOVERY>;
+ mode-bootloader = <BOOT_FASTBOOT>;
+ mode-loader = <BOOT_LOADER>;
+ };
};
spi3: spi@ff350000 {
status = "disabled";
};
+ pcie0: pcie@f8000000 {
+ compatible = "rockchip,rk3399-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
+ <&cru PCLK_PCIE>, <&cru SCLK_PCIEPHY_REF>;
+ clock-names = "aclk_pcie", "aclk_perf_pcie",
+ "hclk_pcie", "clk_pciephy_ref";
+ bus-range = <0x0 0x1>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pcie-sys", "pcie-legacy", "pcie-client";
+ ranges = < 0x82000000 0 0xfa000000 0x0 0xfa000000 0 0x600000
+ 0x81000000 0 0xfa600000 0x0 0xfa600000 0 0x100000 >;
+ reg = < 0x0 0xf8000000 0x0 0x2000000 >,
+ < 0x0 0xfd000000 0x0 0x1000000 >;
+ reg-name = "axi-base", "apb-base";
+ resets = <&cru SRST_PCIEPHY>, <&cru SRST_PCIE_CORE>,
+ <&cru SRST_PCIE_MGMT>, <&cru SRST_PCIE_MGMT_STICKY>,
+ <&cru SRST_PCIE_PIPE>;
+ reset-names = "phy-rst", "core-rst", "mgmt-rst",
+ "mgmt-sticky-rst", "pipe-rst";
+ rockchip,grf = <&grf>;
+ pcie-conf = <0xe220>;
+ pcie-status = <0xe2a4>;
+ pcie-laneoff = <0xe214>;
+ msi-parent = <&its>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie0 1>,
+ <0 0 0 2 &pcie0 2>,
+ <0 0 0 3 &pcie0 3>,
+ <0 0 0 4 &pcie0 4>;
+ status = "disabled";
+ pcie_intc: interrupt-controller {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+ };
+
pwm0: pwm@ff420000 {
compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
reg = <0x0 0xff420000 0x0 0x10>;
assigned-clock-rates =
<400000000>, <200000000>,
<400000000>, <200000000>,
- <816000000>, <1008000000>,
+ <816000000>, <816000000>,
<594000000>, <800000000>,
<1000000000>,
<150000000>, <75000000>,
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
};
+ rktimer: rktimer@ff850000 {
+ compatible = "rockchip,rk3399-timer";
+ reg = <0x0 0xff850000 0x0 0x1000>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER00>;
+ clock-names = "pclk", "timer";
+ };
+
spdif: spdif@ff870000 {
compatible = "rockchip,rk3399-spdif";
reg = <0x0 0xff870000 0x0 0x1000>;
clock-names = "clk_mali";
#cooling-cells = <2>; /* min followed by max */
operating-points-v2 = <&gpu_opp_table>;
-
+ power-domains = <&power RK3399_PD_GPU>;
status = "disabled";
power_model {
compatible = "arm,mali-simple-power-model";
voltage = <900>;
frequency = <500>;
- static-power = <500>;
- dynamic-power = <1500>;
- ts = <20000 2000 (-20) 2>;
- thermal-zone = "gpu";
+ static-power = <300>;
+ dynamic-power = <1780>;
+ ts = <32000 4700 (-80) 2>;
+ thermal-zone = "gpu-thermal";
};
};
<4 23 RK_FUNC_1 &pcfg_pull_none>;
};
};
+
+ pcie {
+ pcie_clkreqn: pci-clkreqn {
+ rockchip,pins =
+ <2 26 RK_FUNC_2 &pcfg_pull_none>;
+ };
+
+ pcie_clkreqnb: pci-clkreqnb {
+ rockchip,pins =
+ <4 24 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
};
};
projects / firefly-linux-kernel-4.4.55.git / blobdiff