arm64: dts: rk3399: add iep device node

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index df9f1c7d7c5f6a6c1b835af8b35f1d0bb1e55b98..0c3ded81b1233f299921c76fa487846d9b7ca92a 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -76,11 +76,6 @@
                serial4 = &uart4;
        };
 
-       psci {
-               compatible = "arm,psci-1.0";
-               method = "smc";
-       };
-
        cpus {
                #address-cells = <2>;
                #size-cells = <0>;
@@ -217,29 +212,34 @@
                };
        };
 
-       timer {
-               compatible = "arm,armv8-timer";
-               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
-                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
-                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
-                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
-       };
-
        pmu_a53 {
                compatible = "arm,cortex-a53-pmu";
-               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &part0>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>;
        };
 
        pmu_a72 {
                compatible = "arm,cortex-a72-pmu";
-               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &part1>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster1>;
+       };
+
+       psci {
+               compatible = "arm,psci-1.0";
+               method = "smc";
+       };
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
+                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
+                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
+                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
        };
 
        xin24m: xin24m {
                compatible = "fixed-clock";
-               #clock-cells = <0>;
                clock-frequency = <24000000>;
                clock-output-names = "xin24m";
+               #clock-cells = <0>;
        };
 
        amba {
@@ -271,7 +271,7 @@
                };
        };
 
-       gmac: eth@fe300000 {
+       gmac: ethernet@fe300000 {
                compatible = "rockchip,rk3399-gmac";
                reg = <0x0 0xfe300000 0x0 0x10000>;
                rockchip,grf = <&grf>;
@@ -509,11 +509,11 @@
                };
 
                ppi-partitions {
-                       part0: interrupt-partition-0 {
+                       ppi_cluster0: interrupt-partition-0 {
                                affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>;
                        };
 
-                       part1: interrupt-partition-1 {
+                       ppi_cluster1: interrupt-partition-1 {
                                affinity = <&cpu_b0 &cpu_b1>;
                        };
                };
@@ -739,7 +739,7 @@
                status = "disabled";
        };
 
-       thermal-zones {
+       thermal_zones: thermal-zones {
                soc_thermal: soc-thermal {
                        polling-delay-passive = <20>; /* milliseconds */
                        polling-delay = <1000>; /* milliseconds */
@@ -1098,8 +1098,10 @@
        pmugrf: syscon@ff320000 {
                compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd";
                reg = <0x0 0xff320000 0x0 0x1000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
 
-               pmu_io_domains: pmu-io-domains {
+               pmu_io_domains: io-domains {
                        compatible = "rockchip,rk3399-pmu-io-voltage-domain";
                        status = "disabled";
                };
@@ -1198,6 +1200,7 @@
                              "hclk", "pm";
                bus-range = <0x0 0x1>;
                max-link-speed = <1>;
+               linux,pci-domain = <0>;
                msi-map = <0x0 &its 0x0 0x1000>;
                interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
                             <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -1358,6 +1361,29 @@
                #iommu-cells = <0>;
        };
 
+       iep: iep@ff670000 {
+               compatible = "rockchip,iep";
+               iommu_enabled = <1>;
+               iommus = <&iep_mmu>;
+               reg = <0x0 0xff670000 0x0 0x800>;
+               interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
+               clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+               clock-names = "aclk_iep", "hclk_iep";
+               power-domains = <&power RK3399_PD_IEP>;
+               allocator = <1>;
+               version = <2>;
+               status = "disabled";
+       };
+
+       iep_mmu: iommu@ff670800 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff670800 0x0 0x40>;
+               interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "iep_mmu";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
        rga: rga@ff680000 {
                compatible = "rockchip,rk3399-rga";
                reg = <0x0 0xff680000 0x0 0x10000>;
@@ -1843,6 +1869,8 @@
                reg = <0x0 0xff940000 0x0 0x20000>;
                reg-io-width = <4>;
                rockchip,grf = <&grf>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&hdmi_i2c_xfer>;
                power-domains = <&power RK3399_PD_HDCP>;
                interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
                clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>, <&cru PLL_VPLL>, <&cru PCLK_VIO_GRF>;