arm64: dts: rockchip: add allocator type inside vpu & rkvdec for rk3399-android
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-evb-rev2.dtsi
index 0d6bd161635e8499a31ed836badbd25a1bcc079d..2f3bd7aa9d9862a3b3464011840795f0f4bb4a50 100644 (file)
@@ -41,6 +41,7 @@
  */
 
 #include "rk3399-evb.dtsi"
+#include "rk3399-early-opp.dtsi"
 
 / {
        compatible = "rockchip,rk3399-evb-rev2", "rockchip,rk3399";
                regulator-min-microvolt = <5000000>;
                regulator-max-microvolt = <5000000>;
        };
-};
 
-&cluster0_opp {
-       opp@408000000 {
-               opp-hz = /bits/ 64 <408000000>;
-               opp-microvolt = <800000>;
-               clock-latency-ns = <40000>;
-       };
-       opp@600000000 {
-               opp-hz = /bits/ 64 <600000000>;
-               opp-microvolt = <800000>;
-       };
-       opp@816000000 {
-               opp-hz = /bits/ 64 <816000000>;
-               opp-microvolt = <800000>;
-       };
-       opp@1008000000 {
-               opp-hz = /bits/ 64 <1008000000>;
-               opp-microvolt = <875000>;
-       };
-       opp@1200000000 {
-               opp-hz = /bits/ 64 <1200000000>;
-               opp-microvolt = <925000>;
-       };
-       opp@1416000000 {
-               opp-hz = /bits/ 64 <1416000000>;
-               opp-microvolt = <1025000>;
-       };
-       opp@1512000000 {
-               opp-hz = /bits/ 64 <1512000000>;
-               opp-microvolt = <1075000>;
+       vdd_center: vdd-center {
+               compatible = "pwm-regulator";
+               rockchip,pwm_id = <3>;
+               rockchip,pwm_voltage = <900000>;
+               pwms = <&pwm3 0 25000 0>;
+               regulator-name = "vdd_center";
+               regulator-min-microvolt = <800000>;
+               regulator-max-microvolt = <1400000>;
+               regulator-always-on;
+               regulator-boot-on;
        };
 };
 
-&cluster1_opp {
-       opp@408000000 {
-               opp-hz = /bits/ 64 <408000000>;
-               opp-microvolt = <800000>;
-               clock-latency-ns = <40000>;
-       };
-       opp@600000000 {
-               opp-hz = /bits/ 64 <600000000>;
-               opp-microvolt = <800000>;
-       };
-       opp@816000000 {
-               opp-hz = /bits/ 64 <816000000>;
-               opp-microvolt = <800000>;
-       };
-       opp@1008000000 {
-               opp-hz = /bits/ 64 <1008000000>;
-               opp-microvolt = <850000>;
-       };
-       opp@1200000000 {
-               opp-hz = /bits/ 64 <1200000000>;
-               opp-microvolt = <925000>;
-       };
-       opp@1416000000 {
-               opp-hz = /bits/ 64 <1416000000>;
-               opp-microvolt = <1025000>;
-       };
-       opp@1608000000 {
-               opp-hz = /bits/ 64 <1608000000>;
-               opp-microvolt = <1125000>;
-       };
-       opp@1800000000 {
-               opp-hz = /bits/ 64 <1800000000>;
-               opp-microvolt = <1200000>;
-               status = "disabeld";
-       };
+&cpu_l0 {
+       dynamic-power-coefficient = <121>;
 };
 
-&CPU_COST_A72 {
-       busy-cost-data = <
-               232   349       /*  408MHz */
-               341   547       /*  600MHz */
-               464   794       /*  816MHz */
-               573   1141      /* 1008MHz */
-               683   1850      /* 1200MHz */
-               805   2499      /* 1416MHz */
-               915   2922      /* 1608MHz */
-       //      1024  3416      /* 1800MHz */
-       >;
-       idle-cost-data = <
-             15
-             15
-              0
-       >;
+&cpu_b0 {
+       dynamic-power-coefficient = <1068>;
 };
 
-&CPU_COST_A53 {
-       busy-cost-data = <
-               121    40       /*  408M */
-               179    62       /*  600M */
-               243    90       /*  816M */
-               300    126      /* 1008M */
-               357    196      /* 1200M */
-               421    246      /* 1416M */
-               449    263      /* 1512M */
-       >;
-       idle-cost-data = <
-             6
-             6
-             0
-       >;
-};
+&soc_thermal {
+       sustainable-power = <1600>; /* milliwatts */
 
-&CLUSTER_COST_A72 {
-       busy-cost-data = <
-               232   349       /*  408MHz */
-               341   547       /*  600MHz */
-               464   794       /*  816MHz */
-               573   1141      /* 1008MHz */
-               683   1850      /* 1200MHz */
-               805   2499      /* 1416MHz */
-               915   2922      /* 1608MHz */
-       //      1024  3416      /* 1800MHz */
-       >;
-       idle-cost-data = <
-                65
-                65
-                65
-       >;
+       cooling-maps {
+               map0 {
+                       trip = <&target>;
+                       cooling-device =
+                               <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                       contribution = <10240>;
+               };
+               map1 {
+                       trip = <&target>;
+                       cooling-device =
+                               <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                       contribution = <1024>;
+               };
+               map2 {
+                       trip = <&target>;
+                       cooling-device =
+                               <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                       contribution = <10240>;
+               };
+       };
 };
 
-&CLUSTER_COST_A53 {
-       busy-cost-data = <
-               121    40       /*  408M */
-               179    62       /*  600M */
-               243    90       /*  816M */
-               300    126      /* 1008M */
-               357    196      /* 1200M */
-               421    246      /* 1416M */
-               449    263      /* 1512M */
-       >;
-       idle-cost-data = <
-               56
-               56
-               56
-       >;
+&gpu_power_model {
+       dynamic-power = <1780>;
 };
 
 &i2c0 {
+       fusb1: fusb30x@22 {
+               compatible = "fairchild,fusb302";
+               reg = <0x22>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&fusb1_int>;
+               vbus-5v-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+               int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+               status = "okay";
+       };
+
        vdd_cpu_b: syr827@40 {
                compatible = "silergy,syr827";
                reg = <0x40>;
                                regulator-name = "vdd_gpu";
                                regulator-min-microvolt = <735000>;
                                regulator-max-microvolt = <1400000>;
+                               regulator-ramp-delay = <6000>;
                                regulator-always-on;
                                regulator-boot-on;
                        };
                                regulator-boot-on;
                                regulator-min-microvolt = <750000>;
                                regulator-max-microvolt = <1350000>;
+                               regulator-ramp-delay = <6001>;
                                regulator-name = "vdd_log";
                                regulator-state-mem {
                                        regulator-on-in-suspend;
                                regulator-boot-on;
                                regulator-min-microvolt = <750000>;
                                regulator-max-microvolt = <1350000>;
+                               regulator-ramp-delay = <6001>;
                                regulator-name = "vdd_cpu_l";
                                regulator-state-mem {
                                        regulator-off-in-suspend;
        };
 };
 
-&cpu_l0 {
-       cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
-       cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
-       cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
-       cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
-       cpu-supply = <&vdd_cpu_b>;
+&pwm3 {
+       status = "okay";
 };
 
-&cpu_b1 {
-       cpu-supply = <&vdd_cpu_b>;
+&u2phy0_otg {
+       rockchip,utmi-avalid;
 };
 
-&gpu {
+&i2c6 {
        status = "okay";
-       mali-supply = <&vdd_gpu>;
+       fusb0: fusb30x@22 {
+               compatible = "fairchild,fusb302";
+               reg = <0x22>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&fusb0_int>;
+               vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
+               int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+               status = "okay";
+       };
 };
-