lcdc = &lcdc;
};
+ chosen {
+ bootargs = "earlycon=uart8250,mmio32,0xff690000 swiotlb=1";
+ };
+
+ fiq_debugger: fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <2>;
+ rockchip,signal-irq = <186>;
+ rockchip,wake-irq = <0>;
+ rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
+ rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_xfer>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* global autoconfigured region for contiguous allocations */
+ linux,cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x8000000>;
+ linux,cma-default;
+ };
+
+ /* reg = <0x0 0x0 0x0 0x0> will be updated by uboot */
+ rockchip_logo: rockchip-logo@00000000 {
+ compatible = "rockchip,fb-logo";
+ reg = <0x0 0x0 0x0 0x0>;
+ };
+ };
+
+ ion {
+ compatible = "rockchip,ion";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cma-heap {
+ reg = <0x00000000 0x02000000>;
+ };
+
+ system-heap {
+ };
+ };
+
isp: isp@ff910000 {
compatible = "rockchip,rk3368-isp", "rockchip,isp";
reg = <0x0 0xff910000 0x0 0x10000>;
status = "disabled";
};
+ dwc_control_usb: dwc-control-usb {
+ compatible = "rockchip,rk3368-dwc-control-usb";
+ rockchip,grf = <&grf>;
+ grf-offset = <0x04bc>; /* GRF_SOC_STATUS for USB2.0 OTG */
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "otg_id", "otg_bvalid",
+ "otg_linestate", "host0_linestate";
+ clocks = <&cru HCLK_USB_PERI>;
+ clock-names = "hclk_usb_peri";
+ status = "disabled";
+
+ usb_bc {
+ compatible = "inno,phy";
+ regbase = &dwc_control_usb;
+ rk_usb,bvalid = <0x4bc 23 1>;
+ rk_usb,iddig = <0x4bc 26 1>;
+ rk_usb,vdmsrcen = <0x718 12 1>;
+ rk_usb,vdpsrcen = <0x718 11 1>;
+ rk_usb,rdmpden = <0x718 10 1>;
+ rk_usb,idpsrcen = <0x718 9 1>;
+ rk_usb,idmsinken = <0x718 8 1>;
+ rk_usb,idpsinken = <0x718 7 1>;
+ rk_usb,dpattach = <0x4b8 31 1>;
+ rk_usb,cpdet = <0x4b8 30 1>;
+ rk_usb,dcpattach = <0x4b8 29 1>;
+ };
+ };
+
pinctrl {
hdmi_i2c {
hdmii2c_xfer: hdmii2c-xfer {
};
};
};
+
+&usb_otg {
+ clocks = <&cru SCLK_OTGPHY0>, <&cru HCLK_OTG0>;
+ clock-names = "sclk_otgphy0", "otg";
+ resets = <&cru SRST_USBOTG_AHB>,
+ <&cru SRST_USBOTG_PHY>,
+ <&cru SRST_USBOTG_CON>;
+ reset-names = "otg_ahb", "otg_phy", "otg_controller";
+ /* 0 - Normal, 1 - Force Host, 2 - Force Device */
+ rockchip,usb-mode = <0>;
+};