arm64: dts: rockchip: add allocator type inside vpu & rkvdec for rk3399-android

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3366-tb.dts

diff --git a/arch/arm64/boot/dts/rockchip/rk3366-tb.dts b/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
index 15b9ded30d5949cdcedaaf3f569c0fa7741f08bf..47e2597ba3fa9d67a2c90fe9dcb85db9cb000562 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
@@ -222,6 +222,15 @@
                #clock-cells = <0>;
        };
 
+       vbus_host: vbus-host-regulator {
+               compatible = "regulator-fixed";
+               enable-active-high;
+               gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&host_vbus_drv>;
+               regulator-name = "vbus_host";
+       };
+
        vcc_phy: vcc-phy-regulator {
                compatible = "regulator-fixed";
                enable-active-high;
@@ -255,8 +264,8 @@
                             <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "otg_id", "otg_bvalid",
                                  "otg_linestate", "host0_linestate";
-               clocks = <&cru SCLK_USBPHY480M>;
-               clock-names = "usbphy_480m";
+               clocks = <&cru SCLK_USBPHY480M>, <&cru HCLK_OTG>;
+               clock-names = "sclk_otgphy0", "otg";
 
                usb_bc {
                        compatible = "inno,phy";
@@ -626,6 +635,30 @@
                                };
                        };
                };
+
+               battery {
+                       compatible = "rk818-battery";
+                       ocv_table = <3400 3650 3693 3707 3731 3749 3760
+                                    3770 3782 3796 3812 3829 3852 3882
+                                    3915 3951 3981 4047 4086 4132 4182>;
+                       design_capacity = <7916>;
+                       design_qmax = <8708>;
+                       bat_res = <65>;
+                       max_input_current = <2000>;
+                       max_chrg_current = <1600>;
+                       max_chrg_voltage = <4200>;
+                       sleep_enter_current = <300>;
+                       sleep_exit_current = <300>;
+                       power_off_thresd = <3400>;
+                       zero_algorithm_vol = <3850>;
+                       fb_temperature = <105>;
+                       sample_res = <20>;
+                       max_soc_offset = <60>;
+                       energy_mode = <0>;
+                       monitor_sec = <5>;
+                       virtual_power = <0>;
+                       power_dc2otg = <0>;
+               };
        };
 };
 
@@ -807,15 +840,20 @@
        status = "okay";
 };
 
+&u2phy_host {
+       phy-supply = <&vbus_host>;
+};
+
 &dwc_control_usb {
-       host_drv_gpio = <&gpio0 16 GPIO_ACTIVE_LOW>; /* GPIO_C0 = 16 */
        otg_drv_gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO_B2 = 10 */
 
        rockchip,remote_wakeup;
        rockchip,usb_irq_wakeup;
 };
 
-&usb_host0_echi {
+&usb_host0_ehci {
+       assigned-clocks = <&cru SCLK_USBPHY480M>;
+       assigned-clock-parents = <&u2phy>;
        status = "okay";
 };
 
@@ -824,16 +862,14 @@
 };
 
 &usb_otg {
-       clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_OTG>;
-       clock-names = "sclk_otgphy0", "otg";
+       clocks = <&cru SCLK_USBPHY480M>, <&cru HCLK_OTG>;
+       clock-names = "usbphy_480m", "otg";
        resets = <&cru SRST_USBOTG_AHB>,
                 <&cru SRST_USBOTG_PHY>,
                 <&cru SRST_USBOTG_CON>;
        reset-names = "otg_ahb", "otg_phy", "otg_controller";
        /* 0 - Normal, 1 - Force Host, 2 - Force Device */
        rockchip,usb-mode = <0>;
-       assigned-clocks = <&cru SCLK_USBPHY480M>;
-       assigned-clock-parents = <&usbphy0>;
        status = "okay";
 };
 
@@ -849,3 +885,11 @@
        mali-supply = <&vdd_logic>;
        status = "okay";
 };
+
+&pvtm {
+       status = "okay";
+};
+
+&pmu_pvtm {
+       status = "okay";
+};