RK3368 DDR: add support 3368 ddr change freq function

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368.dtsi

diff --git a/arch/arm64/boot/dts/rk3368.dtsi b/arch/arm64/boot/dts/rk3368.dtsi
index ce2cd49698215b6072fb81030ef793f5c77ca138..a1dc9900d0588980510fde5045d0cce8ed197c06 100755 (executable)
--- a/arch/arm64/boot/dts/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rk3368.dtsi
@@ -151,6 +151,11 @@
                      <0x0 0xffb72000 0 0x1000>;
        };
 
+       ddrpctl: syscon@ff610000 {
+               compatible = "rockchip,rk3368-ddrpctl", "syscon";
+               reg = <0x0 0xff610000 0x0 0x400>;
+       };
+
        pmu: syscon@ff730000 {
                compatible = "rockchip,rk3368-pmu", "rockchip,pmu", "syscon";
                reg = <0x0 0xff730000 0x0 0x1000>;
@@ -177,6 +182,11 @@
                reg = <0x0 0xff770000 0x0 0x1000>;
        };
 
+       msch: syscon@ffac0000 {
+               compatible = "rockchip,rk3368-msch", "rockchip,msch", "syscon";
+               reg = <0x0 0xffac0000 0x0 0x3000>;
+       };
+
        arm-pmu {
                compatible = "arm,armv8-pmuv3";
                interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
@@ -566,6 +576,14 @@
                mboxes = <&mbox 0 &mbox 1>;
        };
 
+       ddr {
+               compatible = "rockchip,rk3368-ddr";
+               status = "okay";
+               rockchip,ddrpctl = <&ddrpctl>;
+               rockchip,grf = <&grf>;
+               rockchip,msch = <&msch>;
+       };
+
        rockchip_clocks_init: clocks-init{
                compatible = "rockchip,clocks-init";
                rockchip,clocks-init-parent =