arm64: rockchip: add support for kernel mode NEON

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / Kconfig

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index a1d9fc5ce726adf81da2e525ff01376368ae82bf..177f672b9091351fb2a533113d0bb589151a7916 100644 (file)
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -6,6 +6,7 @@ config ARM64
        select ARCH_HAS_OPP
        select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
        select ARCH_SUPPORTS_ATOMIC_RMW
+       select ARCH_HAS_GCOV_PROFILE_ALL
        select ARCH_WANT_OPTIONAL_GPIOLIB
        select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
        select ARCH_WANT_FRAME_POINTERS
@@ -19,6 +20,7 @@ config ARM64
        select COMMON_CLK
        select CPU_PM if (SUSPEND || CPU_IDLE)
        select DCACHE_WORD_ACCESS
+       select GENERIC_ALLOCATOR
        select GENERIC_CLOCKEVENTS
        select GENERIC_CLOCKEVENTS_BROADCAST if SMP
        select GENERIC_CPU_AUTOPROBE
@@ -87,6 +89,10 @@ config NO_IOPORT
 config STACKTRACE_SUPPORT
        def_bool y
 
+config ILLEGAL_POINTER_VALUE
+       hex
+       default 0xdead000000000000
+
 config LOCKDEP_SUPPORT
        def_bool y
 
@@ -123,6 +129,9 @@ config SWIOTLB
 config IOMMU_HELPER
        def_bool SWIOTLB
 
+config KERNEL_MODE_NEON
+       def_bool y
+
 config FIX_EARLYCON_MEM
        def_bool y
 
@@ -132,6 +141,14 @@ source "kernel/Kconfig.freezer"
 
 menu "Platform selection"
 
+config ARCH_ROCKCHIP
+       bool "Rockchip SoCs"
+       select PINCTRL
+       select PINCTRL_RK3368
+       select ARCH_REQUIRE_GPIOLIB
+
+source "arch/arm64/mach-rockchip/Kconfig"
+
 config ARCH_VEXPRESS
        bool "ARMv8 software model (Versatile Express)"
        select ARCH_REQUIRE_GPIOLIB
@@ -158,6 +175,32 @@ endmenu
 
 menu "Kernel Features"
 
+menu "ARM errata workarounds"
+
+config ARM64_ERRATUM_845719
+       bool "Cortex-A53: 845719: a load might read incorrect data"
+       depends on COMPAT
+       default n
+       help
+         This option adds an alternative code sequence to work around ARM
+         erratum 845719 on Cortex-A53 parts up to r0p4.
+
+         When running a compat (AArch32) userspace on an affected Cortex-A53
+         part, a load at EL0 from a virtual address that matches the bottom 32
+         bits of the virtual address used by a recent load at (AArch64) EL1
+         might return incorrect data.
+
+         The workaround is to write the contextidr_el1 register on exception
+         return to a 32-bit task.
+         Please note that this does not necessarily enable the workaround,
+         as it depends on the alternative framework, which will only patch
+         the kernel if an affected CPU is detected.
+
+         If unsure, say Y.
+
+endmenu
+
+
 config ARM64_64K_PAGES
        bool "Enable 64KB pages support"
        help
@@ -530,6 +573,8 @@ menu "CPU Power Management"
 
 source "drivers/cpuidle/Kconfig"
 
+source "drivers/cpuquiet/Kconfig"
+
 endmenu
 
 source "net/Kconfig"