#include <linux/delay.h>
#include <linux/moduleparam.h>
#include <linux/rockchip/common.h>
-
+#include <asm/psci.h>
#include <asm/io.h>
#include "pm.h"
//u32 line=0;
rkpm_ddr_printascii("start from:");
- rkpm_ddr_printhex((u32)(base_addr +start_offset));
+ rkpm_ddr_printhex((unsigned long)base_addr + start_offset);
rkpm_ddr_printch('\n');
hex <<= 4;
}
}
+
+#ifdef CONFIG_ARM_PSCI
+static bool psci_suspend_available(void)
+{
+ return (psci_ops.cpu_suspend != NULL);
+}
+#else
+static inline bool psci_suspend_available(void)
+{
+ return false;
+}
+#endif
+
+#ifdef CONFIG_ARM
void rk_sram_suspend(void)
{
RKPM_DDR_FUN(regs_pread);
call_with_stack(p_suspend_pie_cb
, &rkpm_jdg_sram_ctrbits, rockchip_sram_stack);
}
+
static int rk_lpmode_enter(unsigned long arg)
{
+#ifdef CONFIG_ARM_PSCI
+ const struct psci_power_state ps = {
+ .type = PSCI_POWER_STATE_TYPE_POWER_DOWN,
+ };
+ if (psci_suspend_available())
+ return psci_ops.cpu_suspend(ps, virt_to_phys(cpu_resume));
+#endif
//RKPM_DDR_PFUN(slp_setting(rkpm_jdg_sram_ctrbits),slp_setting);
RKPM_DDR_FUN(slp_setting);
}
int cpu_suspend(unsigned long arg, int (*fn)(unsigned long));
+#endif /* CONFIG_ARM */
+
static int rkpm_enter(suspend_state_t state)
{
//static u32 test_count=0;
// printk(KERN_DEBUG"pm: ");
printk("%s:\n",__FUNCTION__);
//printk("pm test times=%d\n",++test_count);
-
+
+#ifdef CONFIG_ARM_PSCI
+ if (psci_suspend_available()) {
+ cpu_suspend(0, rk_lpmode_enter);
+ return 0;
+ }
+#endif
RKPM_DDR_FUN(prepare);
rkpm_ctrbits_prepare();
rkpm_ddr_printch('5');
+#ifdef CONFIG_ARM
if(rkpm_chk_jdg_ctrbits(RKPM_CTRBITS_SOC_DLPMD))
{
if(cpu_suspend(0,rk_lpmode_enter)==0)
dsb();
wfi();
}
+#else
+ flush_cache_all();
+ cpu_suspend(1);
+#endif
rkpm_ddr_printch('5');
return;
}
+#ifndef CONFIG_ARM
+static int __init rockchip_init_suspend(void)
+{
+ suspend_set_ops(&rockchip_suspend_ops);
+ return 0;
+}
+late_initcall_sync(rockchip_init_suspend);
+#endif /* CONFIG_ARM */
+
static enum rockchip_pm_policy pm_policy;
static BLOCKING_NOTIFIER_HEAD(policy_notifier_list);