arm: dts: rk3288-evb: modify panel to edp_panel

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3xxx.dtsi

diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index 4497d288a7cbdb5e837279a1e67f0358da9582c5..f9d2025b43e4ab6893ee93b5236c50c2c328213f 100644 (file)
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -43,6 +43,7 @@
 
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/rockchip,boot-mode.h>
 #include "skeleton.dtsi"
 
 / {
@@ -77,6 +78,7 @@
                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
+                       arm,pl330-broken-no-flushp;
                        clocks = <&cru ACLK_DMA1>;
                        clock-names = "apb_pclk";
                };
@@ -87,6 +89,7 @@
                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
+                       arm,pl330-broken-no-flushp;
                        clocks = <&cru ACLK_DMA1>;
                        clock-names = "apb_pclk";
                        status = "disabled";
@@ -98,6 +101,7 @@
                        interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
+                       arm,pl330-broken-no-flushp;
                        clocks = <&cru ACLK_DMA2>;
                        clock-names = "apb_pclk";
                };
@@ -242,8 +246,18 @@
        };
 
        pmu: pmu@20004000 {
-               compatible = "rockchip,rk3066-pmu", "syscon";
+               compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd";
                reg = <0x20004000 0x100>;
+
+               reboot-mode {
+                       compatible = "syscon-reboot-mode";
+                       offset = <0x40>;
+                       mode-normal = <BOOT_NORMAL>;
+                       mode-recovery = <BOOT_RECOVERY>;
+                       mode-bootloader = <BOOT_FASTBOOT>;
+                       mode-loader = <BOOT_BL_DOWNLOAD>;
+                       mode-ums = <BOOT_UMS>;
+               };
        };
 
        grf: grf@20008000 {
@@ -395,6 +409,8 @@
                #io-channel-cells = <1>;
                clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
                clock-names = "saradc", "apb_pclk";
+               resets = <&cru SRST_SARADC>;
+               reset-names = "saradc-apb";
                status = "disabled";
        };