UPSTREAM: ARM: dts: rockchip: move edp-hpd pin definition into common location

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3288.dtsi

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 04ea209f1737f9fb052f4efc8589e98aa027836e..f2c05e9af0b2e2f5d3c28ae9a7310423e676d12a 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -144,6 +144,8 @@
                        interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
+                       arm,pl330-broken-no-flushp;
+                       peripherals-req-type-burst;
                        clocks = <&cru ACLK_DMAC2>;
                        clock-names = "apb_pclk";
                };
@@ -154,6 +156,8 @@
                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
+                       arm,pl330-broken-no-flushp;
+                       peripherals-req-type-burst;
                        clocks = <&cru ACLK_DMAC1>;
                        clock-names = "apb_pclk";
                        status = "disabled";
@@ -165,6 +169,8 @@
                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
+                       arm,pl330-broken-no-flushp;
+                       peripherals-req-type-burst;
                        clocks = <&cru ACLK_DMAC1>;
                        clock-names = "apb_pclk";
                };
@@ -197,6 +203,15 @@
                #clock-cells = <0>;
        };
 
+       edp_phy: edp-phy {
+               compatible = "rockchip,rk3288-dp-phy";
+               clocks = <&cru SCLK_EDP_24M>;
+               clock-names = "24m";
+               rockchip,grf = <&grf>;
+               #phy-cells = <0>;
+               status = "disabled";
+       };
+
        timer {
                compatible = "arm,armv7-timer";
                arm,cpu-registers-not-fw-configured;
@@ -800,6 +815,16 @@
                                reg = <0>;
                                remote-endpoint = <&hdmi_in_vopb>;
                        };
+
+                       vopb_out_edp: endpoint@1 {
+                               reg = <1>;
+                               remote-endpoint = <&edp_in_vopb>;
+                       };
+
+                       vopb_out_mipi: endpoint@2 {
+                               reg = <2>;
+                               remote-endpoint = <&mipi_in_vopb>;
+                       };
                };
        };
 
@@ -833,6 +858,16 @@
                                reg = <0>;
                                remote-endpoint = <&hdmi_in_vopl>;
                        };
+
+                       vopl_out_edp: endpoint@1 {
+                               reg = <1>;
+                               remote-endpoint = <&edp_in_vopl>;
+                       };
+
+                       vopl_out_mipi: endpoint@2 {
+                               reg = <2>;
+                               remote-endpoint = <&mipi_in_vopl>;
+                       };
                };
        };
 
@@ -846,6 +881,69 @@
                status = "disabled";
        };
 
+       mipi_dsi: mipi@ff960000 {
+               compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
+               reg = <0xff960000 0x4000>;
+               interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
+               clock-names = "ref", "pclk";
+               rockchip,grf = <&grf>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+
+                       mipi_in: port {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               mipi_in_vopb: endpoint@0 {
+                                       reg = <0>;
+                                       remote-endpoint = <&vopb_out_mipi>;
+                               };
+                               mipi_in_vopl: endpoint@1 {
+                                       reg = <1>;
+                                       remote-endpoint = <&vopl_out_mipi>;
+                               };
+                       };
+               };
+       };
+
+       edp: dp@ff970000 {
+               compatible = "rockchip,rk3288-dp";
+               reg = <0xff970000 0x4000>;
+               interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
+               clock-names = "dp", "pclk";
+               phys = <&edp_phy>;
+               phy-names = "dp";
+               resets = <&cru SRST_EDP>;
+               reset-names = "dp";
+               rockchip,grf = <&grf>;
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       edp_in: port@0 {
+                               reg = <0>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               edp_in_vopb: endpoint@0 {
+                                       reg = <0>;
+                                       remote-endpoint = <&vopb_out_edp>;
+                               };
+                               edp_in_vopl: endpoint@1 {
+                                       reg = <1>;
+                                       remote-endpoint = <&vopl_out_edp>;
+                               };
+                       };
+               };
+       };
+
        hdmi: hdmi@ff980000 {
                compatible = "rockchip,rk3288-dw-hdmi";
                reg = <0xff980000 0x20000>;
@@ -1082,6 +1180,12 @@
                        };
                };
 
+               edp {
+                       edp_hpd: edp-hpd {
+                               rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
+                       };
+               };
+
                i2c0 {
                        i2c0_xfer: i2c0-xfer {
                                rockchip,pins = <0 15 RK_FUNC_1 &pcfg_pull_none>,