rk: restore file mode
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3188.dtsi
old mode 100755 (executable)
new mode 100644 (file)
index fcd9ba7..e718928
                        <&clk_gpu 200000000>, <&aclk_lcdc0 300000000>,
                        <&aclk_lcdc1 300000000>;
        };
-       rkpm_suspend {
-               compatible = "rockchip,rkpm_suspend";
 
-               // define value is in dt-bindint/suspend/rockchip-pm.h
-               rockchip,ctrbits = <    
+       rockchip_suspend: rockchip_suspend {
+                //compatible = "rockchip,rkpm_suspend";
+                // define value is in dt-bindint/suspend/rockchip-pm.h
+                rockchip,ctrbits = <
                                                (
                                                RKPM_CTR_PWR_DMNS
                                                |RKPM_CTR_GTCLKS
                                                |RKPM_CTR_PLLS
                                                |RKPM_CTR_SYSCLK_DIV
-                                               |RKPM_CTR_NORIDLE_MD
                                                )
                                        >;
               rockchip,pmic-gpios=<
-                                                RKPM_GPIOS_SETTING(GPIO0_A0,RKPM_GPIOS_OUTPUT,RKPM_GPIOS_OUT_H) 
-                                                RKPM_GPIOS_SETTING(GPIO0_A1,RKPM_GPIOS_OUTPUT,RKPM_GPIOS_OUT_H) 
+                                                RKPM_PINGPIO_BITS_OUTPUT(GPIO0_A0,RKPM_GPIO_OUT_L)
+                                                RKPM_PINGPIO_BITS_INTPUT(GPIO0_A1,RKPM_GPIO_PULL_UP)
                                                 >;
+        };
 
-       };
        fb: fb{
                compatible = "rockchip,rk-fb";
                rockchip,disp-mode = <DUAL>;
                 #pwm-cells = <2>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&pwm0_pin>;
+               clocks = <&clk_gates7 10>;
+               clock-names = "pclk_pwm";
                 status = "disabled";
 
         };
                 #pwm-cells = <2>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&pwm1_pin>;
+               clocks = <&clk_gates7 10>;
+               clock-names = "pclk_pwm";
                 status = "disabled";
 
         };
                 reg = <0x20050020 0x10>; /*0x20030000*/
                 #pwm-cells = <2>;
                 pinctrl-names = "default";
+               clock-names = "pclk_pwm";
+               clocks = <&clk_gates7 11>;
                 pinctrl-0 = <&pwm2_pin>;
                 status = "disabled";
 
                 #pwm-cells = <2>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&pwm3_pin>;
+               clocks = <&clk_gates7 11>;
+               clock-names = "pclk_pwm";
                 status = "disabled";
 
         };
        dvfs {
-               vd_cpu:
-               vd_cpu {
+               vd_arm:
+               vd_arm {
                        regulator_name="vdd_arm";
                        suspend_volt=<1000>; //mV
                        pd_a9 {
                                                1416000 1300000
                                                1608000 1350000
                                                >;
+                                       status = "okay";
                                };
                        };
                };
 
-               vd_core:
-               vd_core {
+               vd_logic:
+               vd_logic {
                        regulator_name="vdd_logic";
                        suspend_volt=<1000>; //mV
 
                                                300000 1200000
                                                400000 1200000
                                                >;
+                                       status = "okay";
                                };
                        };
 
                                                300000 1200000
                                                400000 1200000
                                                >;
+                                       status = "disable";
                                };
                        };
                };
                      <0x2000812c 0x8>,
                      <0x20008138 0x8>;
                reg-names = "GRF_SOC_STATUS0",
-                           "GRF_UOC0_BASE",
-                           "GRF_UOC1_BASE",
-                           "GRF_UOC2_BASE",
-                           "GRF_UOC3_BASE";
+                    "GRF_UOC0_BASE",
+                    "GRF_UOC1_BASE",
+                    "GRF_UOC2_BASE",
+                    "GRF_UOC3_BASE";
                interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "otg_bvalid";
                gpios = <&gpio0 GPIO_C0 GPIO_ACTIVE_LOW>, <&gpio3 GPIO_D5 GPIO_ACTIVE_LOW>;
                clocks = <&clk_gates4 5>;
                clock-names = "hclk_usb_peri";
+               rockchip,remote_wakeup;
+               rockchip,usb_irq_wakeup;
 
                usb_bc{
                        compatible = "rockchip,ctrl";
                        rk_usb,bvalid   = <0xac 10 1>;
+                       rk_usb,iddig    = <0xac 13 1>;
                        rk_usb,line     = <0xac 11 2>;
                        rk_usb,softctrl = <0x114 2 1>;
                        rk_usb,opmode   = <0x118 1 2>;
        };
        
 
-       usb@10180000 {
+       usb0: usb@10180000 {
                compatible = "rockchip,rk3188_usb20_otg";
                reg = <0x10180000 0x40000>;
                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&clk_otgphy0_480m>, <&clk_gates5 13>;
-               clock-names = "otgphy0", "hclk_otg0";
+               clocks = <&clk_gates1 5>, <&clk_gates5 13>;
+               clock-names = "clk_usbphy0", "hclk_usb0";
+               /*0 - Normal, 1 - Force Host, 2 - Force Device*/
+               rockchip,usb-mode = <0>;
        };
 
-       usb@101c0000 {
+       usb1: usb@101c0000 {
                compatible = "rockchip,rk3188_usb20_host";
                reg = <0x101c0000 0x40000>;
                interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&clk_otgphy1_480m>, <&clk_gates7 3>;
-               clock-names = "otgphy1", "hclk_otg1";
+               clocks = <&clk_gates1 6>, <&clk_gates7 3>;
+               clock-names = "clk_usbphy1", "hclk_usb1";
        };
 
-       hsic@10240000 {
-               compatible = "rockchip,rk3188_rk_hsic_host";
+       usb2: usb@10240000 {
+               compatible = "rockchip,rk3188_rk_ehci_host";
                reg = <0x10240000 0x40000>;
                interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&clk_hsicphy480m>, <&clk_gates7 4>,
-                        <&clk_hsicphy12m>, <&clk_otgphy1_480m>;
-               clock-names = "hsicphy480m", "hclk_hsic",
-                             "hsicphy12m", "hsic_otgphy1";
+               clocks = <&clk_ehci1phy480m>, <&clk_gates7 4>,
+                 <&clk_ehci1phy12m>, <&otgphy1_480m>;
+               clock-names = "ehci1phy_480m", "hclk_ehci1",
+                      "ehci1phy_12m", "ehci1_usbphy1";
        };
 
        vmac@10204000 {