uart0_xfer: uart0-xfer {
rockchip,pins = <UART0_SIN>,
<UART0_SOUT>;
- rockchip,pull = <VALUE_PULL_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
};
sdio0_cmd: sdio0_cmd {
rockchip,pins = <MMC1_CMD>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
};
sdio0_clk: sdio0_clk {
rockchip,pins = <SDMMC_CLKOUT>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
};
sdio0_bus1: sdio0-bus-width1 {
rockchip,pins = <SDMMC_DATA0>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
};
sdio0_bus4: sdio0-bus-width4 {
rockchip,pins = <SDMMC_DATA0>,
<SDMMC_DATA1>,
<SDMMC_DATA2>,
<SDMMC_DATA3>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
};
sdio0_gpio: sdio0_gpio{
<GPIO1_A2>, //data1
<GPIO1_A4>, //data2
<GPIO1_A5>; //data3
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
};
};
<LCDC0_HSYNC>,
<LCDC0_VSYNC>;
rockchip,pull = <VALUE_PULL_DISABLE>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
};
lcdc0_gpio:lcdc0-gpio {
<FUNC_TO_GPIO(LCDC0_HSYNC)>,
<FUNC_TO_GPIO(LCDC0_VSYNC)>;
rockchip,pull = <VALUE_PULL_DISABLE>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
};
};
<LCDC0_D23>;
*/
rockchip,pull = <VALUE_PULL_DISABLE>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
};
lcdc0_lcdc_gpio: lcdc0-lcdc_gpio {
<FUNC_TO_GPIO(LCDC0_D23)>;
*/
rockchip,pull = <VALUE_PULL_DOWN>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
};
};