UPSTREAM: ARM: dts: rockchip: make rk3288-grf a simple-mfd
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk312x-pinctrl.dtsi
index 8dec9bc2cc67961267585cc0ca122e7cb56d083b..197fe6640d340b8290f17a45411f11221ec558f5 100755 (executable)
@@ -96,7 +96,7 @@
                        uart0_xfer: uart0-xfer {
                                rockchip,pins = <UART0_SIN>,
                                                <UART0_SOUT>;
-                               rockchip,pull = <VALUE_PULL_DEFAULT>;
+                               rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
                                
                                
                        };
 
                        sdio0_cmd: sdio0_cmd {
                                rockchip,pins = <MMC1_CMD>;
-                               rockchip,pull = <VALUE_PULL_UP>;
-                               
-
+                               rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
+                       };
+                       sdio0_clk: sdio0_clk {
+                               rockchip,pins = <SDMMC_CLKOUT>;
+                               rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
+                       };
+                       sdio0_bus1: sdio0-bus-width1 {
+                               rockchip,pins = <SDMMC_DATA0>;
+                               rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
+                       };
+                       sdio0_bus4: sdio0-bus-width4 {
+                               rockchip,pins = <SDMMC_DATA0>,
+                                               <SDMMC_DATA1>,
+                                               <SDMMC_DATA2>,
+                                               <SDMMC_DATA3>;
+                               rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
                        };
 
                        sdio0_gpio: sdio0_gpio{
                                rockchip,pins = <GPIO0_D6>, //pwren
-                                               <GPIO0_A3>; //cmd
-                               rockchip,pull = <VALUE_PULL_UP>;
+                                               <GPIO0_A3>, //cmd
+                                               <GPIO1_A0>, //clk
+                                               <GPIO1_A1>, //data0
+                                               <GPIO1_A2>, //data1
+                                               <GPIO1_A4>, //data2
+                                               <GPIO1_A5>; //data3
+                               rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>;
                        };
 
                };
                                rockchip,pins = <GMAC_COL>;
                                rockchip,pull = <VALUE_PULL_DEFAULT>;
                        };
-                       
+
+                       gmac_col_gpio:gmac-col-gpio {
+                               rockchip,pins = <GPIO2_D0>;
+                               rockchip,pull = <VALUE_PULL_DEFAULT>;
+                       };
+               
                        gmac_mdc:gmac-mdc {
                                rockchip,pins = <GMAC_MDC>;
                                rockchip,pull = <VALUE_PULL_DEFAULT>;
                                                <LCDC0_HSYNC>,
                                                <LCDC0_VSYNC>;
                                rockchip,pull = <VALUE_PULL_DISABLE>;
-                               rockchip,drive = <VALUE_DRV_DEFAULT>;
                        };
 
                        lcdc0_gpio:lcdc0-gpio {
                                                <FUNC_TO_GPIO(LCDC0_HSYNC)>,
                                                <FUNC_TO_GPIO(LCDC0_VSYNC)>;
                                rockchip,pull = <VALUE_PULL_DISABLE>;
-                               rockchip,drive = <VALUE_DRV_DEFAULT>;
                        };
 
                };
                                                <LCDC0_D14>,
                                                <LCDC0_D15>,
                                                <LCDC0_D16>,
-                                               <LCDC0_D17>,
+                                               <LCDC0_D17>;
+                                               /*
                                                <LCDC0_D18>,
                                                <LCDC0_D19>,
                                                <LCDC0_D20>,
                                                <LCDC0_D21>,
                                                <LCDC0_D22>,
                                                <LCDC0_D23>;
+                                               */
                                rockchip,pull = <VALUE_PULL_DISABLE>;
-                               rockchip,drive = <VALUE_DRV_DEFAULT>;
                        };
 
                        lcdc0_lcdc_gpio: lcdc0-lcdc_gpio {
                                                <FUNC_TO_GPIO(LCDC0_D14)>,
                                                <FUNC_TO_GPIO(LCDC0_D15)>,
                                                <FUNC_TO_GPIO(LCDC0_D16)>,
-                                               <FUNC_TO_GPIO(LCDC0_D17)>,
+                                               <FUNC_TO_GPIO(LCDC0_D17)>;
+                                               /*
                                                <FUNC_TO_GPIO(LCDC0_D18)>,
                                                <FUNC_TO_GPIO(LCDC0_D19)>,
                                                <FUNC_TO_GPIO(LCDC0_D20)>,
                                                <FUNC_TO_GPIO(LCDC0_D21)>,
                                                <FUNC_TO_GPIO(LCDC0_D22)>,
                                                <FUNC_TO_GPIO(LCDC0_D23)>;
+                                               */
                                rockchip,pull = <VALUE_PULL_DOWN>;
-                               rockchip,drive = <VALUE_DRV_DEFAULT>;
                        };
 
                };