#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/pinctrl/rockchip-rk3036.h>
-/ {
+/ {
pinctrl: pinctrl@20008000 {
compatible = "rockchip,rk3036-pinctrl";
reg = <0x20008000 0xA8>,
ranges;
gpio0: gpio0@2007c000 {
- compatible = "rockchip,rk3036-gpio-bank0";
- reg = <0x2007c000 0x100>,
- <0x2007c000 0>;
-
- reg-names = "base", "pull_bank0";
+ compatible = "rockchip,gpio-bank";
+ reg = <0x2007c000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- //clocks = <&clk_gates8 9>;
+ clocks = <&clk_gates8 9>;
gpio-controller;
#gpio-cells = <2>;
compatible = "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
- //clocks = <&clk_gates8 11>;
+ clocks = <&clk_gates8 11>;
gpio-controller;
#gpio-cells = <2>;
compatible = "rockchip,gpio-bank";
reg = <0x20086000 0x100>;
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;//127 = 160-32-1
- //clocks = <&clk_gates8 12>;
+ clocks = <&clk_gates8 12>;
gpio-controller;
#gpio-cells = <2>;
bias-disable;
};
- gpio1_uart0 {
+ gpio0_uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <UART0_SIN>,
<UART0_SOUT>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
uart0_cts: uart0-cts {
rockchip,pins = <UART0_CTSN>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
uart0_rts: uart0-rts {
rockchip,pins = <UART0_RTSN>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
uart0_rts_gpio: uart0-rts-gpio {
rockchip,pins = <FUNC_TO_GPIO(UART0_RTSN)>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
};
};
uart1_xfer: uart1-xfer {
rockchip,pins = <UART1_SIN>,
<UART1_SOUT>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
};
uart2_xfer: uart2-xfer {
rockchip,pins = <UART2_SIN>,
<UART2_SOUT>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
/* no rts / cts for uart2 */
};
- gpio1_i2c0 {
+ gpio0_i2c0 {
i2c0_sda:i2c0-sda {
rockchip,pins = <I2C0_SDA>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
i2c0_scl:i2c0-scl {
rockchip,pins = <I2C0_SCL>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
i2c0_gpio: i2c0-gpio {
rockchip,pins = <FUNC_TO_GPIO(I2C0_SDA)>, <FUNC_TO_GPIO(I2C0_SCL)>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
};
};
- gpio1_i2c1 {
+ gpio0_i2c1 {
i2c1_sda:i2c1-sda {
rockchip,pins = <I2C1_SDA>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
i2c1_scl:i2c1-scl {
rockchip,pins = <I2C1_SCL>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
i2c1_gpio: i2c1-gpio {
rockchip,pins = <FUNC_TO_GPIO(I2C1_SDA)>, <FUNC_TO_GPIO(I2C1_SCL)>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
};
};
- gpio1_i2c2 {
+ gpio2_i2c2 {
i2c2_sda:i2c2-sda {
rockchip,pins = <I2C2_SDA>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
i2c2_scl:i2c2-scl {
rockchip,pins = <I2C2_SCL>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
i2c2_gpio: i2c2-gpio {
rockchip,pins = <FUNC_TO_GPIO(I2C2_SDA)>, <FUNC_TO_GPIO(I2C2_SCL)>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
};
};
-
gpio1_spi0 {
spi0_txd:spi0-txd {
rockchip,pins = <SPI0_TXD>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
spi0_rxd:spi0-rxd {
rockchip,pins = <SPI0_RXD>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
spi0_clk:spi0-clk {
rockchip,pins = <SPI0_CLK>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
spi0_cs0:spi0-cs0 {
rockchip,pins = <SPI0_CS0>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
spi0_cs1:spi0-cs1 {
rockchip,pins = <SPI0_CS1>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
};
gpio1_hdmi {
hdmi_cec:hdmi-cec {
rockchip,pins = <HDMI_CEC>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_8MA>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+ //rockchip,drive = <VALUE_DRV_DEFAULT>;
};
hdmi_sda:hdmi-sda {
rockchip,pins = <HDMI_SDA>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_8MA>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+ //rockchip,drive = <VALUE_DRV_DEFAULT>;
};
hdmi_scl:hdmi-scl {
rockchip,pins = <HDMI_SCL>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_8MA>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+ //rockchip,drive = <VALUE_DRV_DEFAULT>;
};
hdmi_hpd:hdmi-hpd {
rockchip,pins = <HDMI_HPD>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_8MA>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+ //rockchip,drive = <VALUE_DRV_DEFAULT>;
+
};
hdmi_gpio: hdmi-gpio {
rockchip,pins = <FUNC_TO_GPIO(HDMI_CEC)>, <FUNC_TO_GPIO(HDMI_SDA)>, <FUNC_TO_GPIO(HDMI_SCL)>, <FUNC_TO_GPIO(HDMI_HPD)>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+ //rockchip,drive = <VALUE_DRV_DEFAULT>;
};
};
gpio1_i2s0 {
-
i2s0_mclk:i2s0-mclk {
rockchip,pins = <I2S0_MCLK>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_8MA>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2s0_sclk:i2s0-sclk {
rockchip,pins = <I2S0_SCLK>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_8MA>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2s0_lrckrx:i2s0-lrckrx {
rockchip,pins = <I2S0_LRCKRX>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_8MA>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2s0_lrcktx:i2s0-lrcktx {
rockchip,pins = <I2S0_LRCKTX>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_8MA>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2s0_sdo:i2s0-sdo {
rockchip,pins = <I2S0_SDO>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_8MA>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2s0_sdi:i2s0-sdi {
rockchip,pins = <I2S0_SDI>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_8MA>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
<FUNC_TO_GPIO(I2S0_LRCKTX)>,
<FUNC_TO_GPIO(I2S0_SDO)>,
<FUNC_TO_GPIO(I2S0_SDI)>;
- rockchip,drive = <VALUE_DRV_8MA>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
};
};
-
- gpio1_spdif {
+ gpio0_spdif {
spdif_tx: spdif-tx {
rockchip,pins = <SPDIF_TX>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- //rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
};
-
+
gpio1_emmc0 {
- emmc0_clk: emmc0-clk {
- rockchip,pins = <EMMC_CLKOUT>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
-
- emmc0_cmd: emmc0-cmd {
- rockchip,pins = <EMMC_CMD>;
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
-
-
- emmc0_bus1: emmc0-bus-width1 {
- rockchip,pins = <EMMC_D0>;
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
-
- emmc0_bus4: emmc0-bus-width4 {
- rockchip,pins = <EMMC_D0>,
- <EMMC_D1>,
- <EMMC_D2 >,
- <EMMC_D3>;
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
- };
-
- gpio1_sdmmc0 {
- sdmmc0_clk: sdmmc0-clk {
- rockchip,pins = <MMC0_CLKOUT>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
-
- sdmmc0_cmd: sdmmc0-cmd {
- rockchip,pins = <MMC0_CMD>;
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
-
- sdmmc0_dectn: sdmmc0-dectn{
- rockchip,pins = <MMC0_DETN>;
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
-
-
- sdmmc0_bus1: sdmmc0-bus-width1 {
- rockchip,pins = <MMC0_D0>;
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
-
- sdmmc0_bus4: sdmmc0-bus-width4 {
- rockchip,pins = <MMC0_D0>,
- <MMC0_D1>,
- <MMC0_D2>,
- <MMC0_D3>;
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
-
- sdmmc0_gpio: sdmmc0_gpio{
- rockchip,pins =
- <GPIO1_B7>, //CMD
- <GPIO1_C0>, //CLK
- <GPIO1_C1>, //DET
- <GPIO1_C2>, //D0
- <GPIO1_C3>, //D1
- <GPIO1_C4>, //D2
- <GPIO1_C5>; //D3
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
+ emmc0_clk: emmc0-clk {
+ rockchip,pins = <EMMC_CLKOUT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
- };
- gpio0_sdio0 {
- sdio0_clk: sdio0_clk {
- rockchip,pins = <MMC1_CLKOUT>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
-
- sdio0_cmd: sdio0_cmd {
- rockchip,pins = <MMC1_CMD>;
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
-
- sdio0_bus1: sdio0-bus-width1 {
- rockchip,pins = <MMC1_D0>;
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
-
- sdio0_bus4: sdio0-bus-width4 {
- rockchip,pins = <MMC1_D0>,
- <MMC1_D1>,
- <MMC1_D2>,
- <MMC1_D3>;
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
+ };
+
+ emmc0_cmd: emmc0-cmd {
+ rockchip,pins = <EMMC_CMD>;
+ rockchip,pull = <VALUE_PULL_UP>;
- sdio0_gpio: sdio0-all-gpio{
- rockchip,pins =
- <GPIO0_B1>, //CLK
- <GPIO0_B0>, //CMD
- <GPIO0_B3>, //DO
- <GPIO0_B4>, //D1
- <GPIO0_B5>, //D2
- <GPIO0_B6>; //D3
- rockchip,pull = <VALUE_PULL_UP>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
- //rockchip,tristate = <VALUE_TRI_DEFAULT>;
- };
- };
- vol_domain {
- ap0_vcc:ap0-vcc {
- rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
- rockchip,voltage = <VALUE_VOL_DEFAULT>;
};
-
- ap1_vcc:ap1-vcc {
- rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
- rockchip,voltage = <VALUE_VOL_DEFAULT>;
+
+
+ emmc0_bus1: emmc0-bus-width1 {
+ rockchip,pins = <EMMC_D0>;
+ rockchip,pull = <VALUE_PULL_UP>;
+
+
};
-
- cif_vcc:cif-vcc {
- rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
- rockchip,voltage = <VALUE_VOL_DEFAULT>;
+
+ emmc0_bus4: emmc0-bus-width4 {
+ rockchip,pins = <EMMC_D0>,
+ <EMMC_D1>,
+ <EMMC_D2 >,
+ <EMMC_D3>;
+ rockchip,pull = <VALUE_PULL_UP>;
+
+
};
+ };
+
+ gpio1_sdmmc0 {
+ sdmmc0_clk: sdmmc0-clk {
+ rockchip,pins = <MMC0_CLKOUT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
- flash_vcc:flash-vcc {
- rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
- rockchip,voltage = <VALUE_VOL_DEFAULT>;
};
-
- vccio0_vcc:vccio0-vcc {
- rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
- rockchip,voltage = <VALUE_VOL_DEFAULT>;
+
+ sdmmc0_cmd: sdmmc0-cmd {
+ rockchip,pins = <MMC0_CMD>;
+ rockchip,pull = <VALUE_PULL_UP>;
+
};
- vccio1_vcc:vccio1-vcc {
- rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
- rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ sdmmc0_dectn: sdmmc0-dectn{
+ rockchip,pins = <MMC0_DETN>;
+ rockchip,pull = <VALUE_PULL_UP>;
+
+
};
- lcdc0_vcc:lcdc0-vcc {
- rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
- rockchip,voltage = <VALUE_VOL_DEFAULT>;
+
+ sdmmc0_bus1: sdmmc0-bus-width1 {
+ rockchip,pins = <MMC0_D0>;
+ rockchip,pull = <VALUE_PULL_UP>;
+
+
};
- lcdc1_vcc:lcdc1-vcc {
- rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
- rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ sdmmc0_bus4: sdmmc0-bus-width4 {
+ rockchip,pins = <MMC0_D0>,
+ <MMC0_D1>,
+ <MMC0_D2>,
+ <MMC0_D3>;
+ rockchip,pull = <VALUE_PULL_UP>;
+
+
};
-
-
- ap0_vcc_18:ap0-vcc-18 {
- rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
- rockchip,voltage = <VALUE_VOL_1V8>;
+ sdmmc0_gpio: sdmmc0_gpio{
+ rockchip,pins =
+ <GPIO1_B7>, //CMD
+ <GPIO1_C0>, //CLK
+ <GPIO1_C1>, //DET
+ <GPIO1_C2>, //D0
+ <GPIO1_C3>, //D1
+ <GPIO1_C4>, //D2
+ <GPIO1_C5>; //D3
+ rockchip,pull = <VALUE_PULL_UP>;
+
+
};
-
- ap1_vcc_18:ap1-vcc-18 {
- rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
- rockchip,voltage = <VALUE_VOL_1V8>;
+
+ };
+
+ gpio1_nandc {
+ nandc_ale:nandc-ale {
+ rockchip,pins = <NAND_ALE>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
-
- cif_vcc_18:cif-vcc-18 {
- rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
- rockchip,voltage = <VALUE_VOL_1V8>;
+
+ nandc_cle:nandc-cle {
+ rockchip,pins = <NAND_CLE>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
- flash_vcc_18:flash-vcc-18 {
- rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
- rockchip,voltage = <VALUE_VOL_1V8>;
+ nandc_wrn:nandc-wrn {
+ rockchip,pins = <NAND_WRN>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
-
- vccio0_vcc_18:vccio0-vcc-18 {
- rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
- rockchip,voltage = <VALUE_VOL_1V8>;
+
+ nandc_rdn:nandc-rdn {
+ rockchip,pins = <NAND_RDN>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
- vccio1_vcc_18:vccio1-vcc-18 {
- rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
- rockchip,voltage = <VALUE_VOL_1V8>;
+ nandc_rdy:nandc-rdy {
+ rockchip,pins = <NAND_RDY>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
- lcdc0_vcc_18:lcdc0-vcc-18 {
- rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
- rockchip,voltage = <VALUE_VOL_1V8>;
+ nandc_cs0:nandc-cs0 {
+ rockchip,pins = <NAND_CS0>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
- lcdc1_vcc_18:lcdc1-vcc-18 {
- rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
- rockchip,voltage = <VALUE_VOL_1V8>;
+
+ nandc_data: nandc-data {
+ rockchip,pins = <NAND_D0>,
+ <NAND_D1>,
+ <NAND_D2>,
+ <NAND_D3>,
+ <NAND_D4>,
+ <NAND_D5>,
+ <NAND_D6>,
+ <NAND_D7>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
};
-
+ };
+
+ gpio0_sdio0 {
+ sdio0_clk: sdio0_clk {
+ rockchip,pins = <MMC1_CLKOUT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
- ap0_vcc_33:ap0-vcc-33 {
- rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
- rockchip,voltage = <VALUE_VOL_3V3>;
};
-
- ap1_vcc_33:ap1-vcc-33 {
- rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
- rockchip,voltage = <VALUE_VOL_3V3>;
+
+ sdio0_cmd: sdio0_cmd {
+ rockchip,pins = <MMC1_CMD>;
+ rockchip,pull = <VALUE_PULL_UP>;
+
+
};
-
- cif_vcc_33:cif-vcc-33 {
- rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
- rockchip,voltage = <VALUE_VOL_3V3>;
+
+ sdio0_bus1: sdio0-bus-width1 {
+ rockchip,pins = <MMC1_D0>;
+ rockchip,pull = <VALUE_PULL_UP>;
+
+
};
- flash_vcc_33:flash-vcc-33 {
- rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
- rockchip,voltage = <VALUE_VOL_3V3>;
+ sdio0_bus4: sdio0-bus-width4 {
+ rockchip,pins = <MMC1_D0>,
+ <MMC1_D1>,
+ <MMC1_D2>,
+ <MMC1_D3>;
+ rockchip,pull = <VALUE_PULL_UP>;
+
+
};
-
- vccio0_vcc_33:vccio0-vcc-33 {
- rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
- rockchip,voltage = <VALUE_VOL_3V3>;
+
+ sdio0_gpio: sdio0-all-gpio{
+ rockchip,pins =
+ <GPIO0_B1>, //CLK
+ <GPIO0_B0>, //CMD
+ <GPIO0_B3>, //DO
+ <GPIO0_B4>, //D1
+ <GPIO0_B5>, //D2
+ <GPIO0_B6>; //D3
+ rockchip,pull = <VALUE_PULL_UP>;
+
+
};
+ };
+
+ gpio0_pwm{
+ pwm0_pin:pwm0 {
+ rockchip,pins = <PWM0>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
- vccio1_vcc_33:vccio1-vcc-33 {
- rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
- rockchip,voltage = <VALUE_VOL_3V3>;
+
+ };
+
+ pwm1_pin:pwm1 {
+ rockchip,pins = <PWM1>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
+ };
+
+ pwm2_pin:pwm2 {
+ rockchip,pins = <PWM2>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
+ };
+
+ pwm3_pin:pwm3 {
+ rockchip,pins = <PWM3(IR)>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
+ };
+ };
+
+ gpio2_gmac {
+ mac_clk: mac-clk {
+ rockchip,pins = <MAC_CLKOUT>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
};
- lcdc0_vcc_33:lcdc0-vcc-33 {
- rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
- rockchip,voltage = <VALUE_VOL_3V3>;
+ mac_txpins: mac-txpins {
+ rockchip,pins = <MAC_TXD0>, <MAC_TXD1>, <MAC_TXEN>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
- lcdc1_vcc_33:lcdc1-vcc-33 {
- rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
- rockchip,voltage = <VALUE_VOL_3V3>;
+ mac_rxpins: mac-rxpins {
+ rockchip,pins = <MAC_RXD0>, <MAC_RXD1>,<MAC_RXER>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
};
+ mac_crs: mac-crs {
+ rockchip,pins = <MAC_CRS>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
+ };
+ mac_mdpins: mac-mdpins {
+ rockchip,pins = <MAC_MDIO>, <MAC_MDC>;
+ rockchip,pull = <VALUE_PULL_DEFAULT>;
+
+
+ };
};
+
//to add
+
+
};
+
};
projects / firefly-linux-kernel-4.4.55.git / blobdiff