usb: dwc_otg_310: fix usb vbus power controlled by pmic

[firefly-linux-kernel-4.4.55.git] / Documentation / devicetree / bindings / usb / rockchip-usb.txt

diff --git a/Documentation/devicetree/bindings/usb/rockchip-usb.txt b/Documentation/devicetree/bindings/usb/rockchip-usb.txt
index bd8f13fbc507055e1b1f8e3db718d06a82163132..c6c25aaa18ea176ec0df4dc1ab089e4a43f77d51 100644 (file)
--- a/Documentation/devicetree/bindings/usb/rockchip-usb.txt
+++ b/Documentation/devicetree/bindings/usb/rockchip-usb.txt
@@ -18,6 +18,10 @@ Required properties:
    "1" represents that force otg to host only mode,
    "2" represents that force otg to device only mode.
 
+Optional properties:
+ - rockchip,usb-pmic-vbus: If present, OTG VBUS 5V is supplied
+   from PMIC.
+
 Example:
  - RK3288
 
@@ -102,10 +106,10 @@ Example:
        };
 
 
-HSIC
+EHCI1
 Required properties:
- - compatible : Should be "rockchip,rk3188_rk_hsic_host" or
-   "rockchip,rk3288_rk_hsic_host" and so on, depending upon
+ - compatible : Should be "rockchip,rk3188_rk_ehci_host" or
+   "rockchip,rk3288_rk_ehci1_host" and so on, depending upon
    the SoC.
  - reg : Physical base address of the controller and
    length of memory mapped region.
@@ -117,16 +121,16 @@ Required properties:
 Example:
  - RK3288
 
-       hsic: hsic@ff5c0000 {
-               compatible = "rockchip,rk3288_rk_hsic_host";
+       usb4: usb@ff5c0000 {
+               compatible = "rockchip,rk3288_rk_ehci1_host";
                reg = <0xff5c0000 0x40000>;
                interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&hsicphy_480m>, <&clk_gates7 8>,
-                        <&hsicphy_12m>, <&usbphy_480m>,
+               clocks = <&ehci1phy_480m>, <&clk_gates7 8>,
+                        <&ehci1phy_12m>, <&usbphy_480m>,
                         <&otgphy1_480m>, <&otgphy2_480m>;
-               clock-names = "hsicphy_480m", "hclk_hsic",
-                             "hsicphy_12m", "usbphy_480m",
-                             "hsic_usbphy1", "hsic_usbphy2";
+               clock-names = "ehci1phy_480m", "hclk_ehci1",
+                             "ehci1phy_12m", "usbphy_480m",
+                             "ehci1_usbphy1", "ehci1_usbphy2";
        };      
 
 ROCKCHIP USB-PHY CONTROL
@@ -178,6 +182,12 @@ Optional properties:
  - rk_usb,xcvrsel
  - rk_usb,termsel
 
+ The child node 'usb_uart' to the node 'dwc_control_usb' is for
+ the usb uart debug function.
+ Required propertie:
+ - status : If be "ok" or "okay" will enable the usb-uart debug
+   function and bypass UART2 to USB OTG io port.
+
 Example:
  - RK3288
 
@@ -220,6 +230,9 @@ Example:
                        rk_usb,fsvminus   = <0x2cc 25 1>;
                        rk_usb,fsvplus    = <0x2cc 24 1>;
                };
+               usb_uart {
+                       status = "okay";
+               };
        };
 
 ROCKCHIP USB-COMMON CONTROL