#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/pinctrl/rockchip-rk3288.h>

/ { 
	pinctrl: pinctrl@ff770000 {
		compatible = "rockchip,rk3288-pinctrl";
		reg = <0xff770000 0x140>,
		      <0xff770140 0x80>,
		      <0xff7701c0 0x80>;
		reg-names = "base", "pull", "drv";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		gpio0: gpio0@ff750000 {
			compatible = "rockchip,rk3288-gpio-bank0";
			reg =	<0xff750000 0x100>,
				<0xff730084 0x0c>,
		      		<0xff730064 0x0c>,
				<0xff730070 0x0c>;
			reg-names = "base", "mux_bank0", "pull_bank0", "drv_bank0";
			interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clk_gates17 4>;

			gpio-controller;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio1: gpio1@ff780000 {
			compatible = "rockchip,gpio-bank";
			reg = <0xff780000 0x100>;
			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clk_gates14 1>;

			gpio-controller;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio2: gpio2@ff790000 {
			compatible = "rockchip,gpio-bank";
			reg = <0xff790000 0x100>;
			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clk_gates14 2>;

			gpio-controller;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio3: gpio3@ff7a0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0xff7a0000 0x100>;
			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clk_gates14 3>;

			gpio-controller;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio4: gpio4@ff7b0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0xff7b0000 0x100>;
			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clk_gates14 4>;

			gpio-controller;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio5: gpio5@ff7c0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0xff7c0000 0x100>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clk_gates14 5>;

			gpio-controller;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio6: gpio6@ff7d0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0xff7d0000 0x100>;
			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clk_gates14 6>;

			gpio-controller;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio7: gpio7@ff7e0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0xff7e0000 0x100>;
			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clk_gates14 7>;

			gpio-controller;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio8: gpio8@ff7f0000 {
			compatible = "rockchip,gpio-bank";
			reg = <0xff7f0000 0x100>;
			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clk_gates14 8>;

			gpio-controller;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio15: gpio15@ff7f2000 {
			compatible = "rockchip,gpio-bank";
			reg = <0xff7f2000 0x100>;
			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;//127 = 160-32-1
			clocks = <&clk_gates14 8>;

			gpio-controller;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;
		};

		pcfg_pull_up: pcfg_pull_up {
			bias-pull-up;
		};

		pcfg_pull_down: pcfg_pull_down {
			bias-pull-down;
		};

		pcfg_pull_none: pcfg_pull_none {
			bias-disable;
		};

		gpio4_uart0 {
			uart0_xfer: uart0-xfer {
				rockchip,pins = <UART0BT_SIN>,
						<UART0BT_SOUT>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			uart0_cts: uart0-cts {
				rockchip,pins = <UART0BT_CTSN>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			uart0_rts: uart0-rts {
				rockchip,pins = <UART0BT_RTSN>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			uart0_rts_gpio: uart0-rts-gpio {
				rockchip,pins = <FUNC_TO_GPIO(UART0BT_RTSN)>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};
		};

		gpio5_uart1 {
			uart1_xfer: uart1-xfer {
				rockchip,pins = <UART1BB_SIN>,
						<UART1BB_SOUT>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			uart1_cts: uart1-cts {
				rockchip,pins = <UART1BB_CTSN>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			uart1_rts: uart1-rts {
				rockchip,pins = <UART1BB_RTSN>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			uart1_rts_gpio: uart1-rts-gpio {
				rockchip,pins = <FUNC_TO_GPIO(UART1BB_RTSN)>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};
		};

		gpio7_uart2 {
			uart2_xfer: uart2-xfer {
				rockchip,pins = <UART2DBG_SIN>,
						<UART2DBG_SOUT>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
			/* no rts / cts for uart2 */
		};

		gpio7_uart3 {
			uart3_xfer: uart3-xfer {
				rockchip,pins = <UART3GPS_SIN>,
						<UART3GPS_SOUT>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			uart3_cts: uart3-cts {
				rockchip,pins = <UART3GPS_CTSN>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			uart3_rts: uart3-rts {
				rockchip,pins = <UART3GPS_RTSN>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
		};

		gpio5_uart4 {
			uart4_xfer: uart4-xfer {
				rockchip,pins = <UART4EXP_SIN>,
						<UART4EXP_SOUT>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			uart4_cts: uart4-cts {
				rockchip,pins = <UART4EXP_CTSN>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			uart4_rts: uart4-rts {
				rockchip,pins = <UART4EXP_RTSN>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
		};

		gpio0_i2c0 {
			i2c0_sda:i2c0-sda {
				rockchip,pins = <I2C0PMU_SDA>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c0_scl:i2c0-scl {
				rockchip,pins = <I2C0PMU_SCL>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c0_gpio: i2c0-gpio {
				rockchip,pins = <FUNC_TO_GPIO(I2C0PMU_SDA)>, <FUNC_TO_GPIO(I2C0PMU_SCL)>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};
		};

		gpio8_i2c1 {
			i2c1_sda:i2c1-sda {
				rockchip,pins = <I2C1SENSOR_SDA>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c1_scl:i2c1-scl {
				rockchip,pins = <I2C1SENSOR_SCL>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c1_gpio: i2c1-gpio {
				rockchip,pins = <FUNC_TO_GPIO(I2C1SENSOR_SDA)>, <FUNC_TO_GPIO(I2C1SENSOR_SCL)>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};
		};

		gpio6_i2c2 {
			i2c2_sda:i2c2-sda {
				rockchip,pins = <I2C2AUDIO_SDA>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c2_scl:i2c2-scl {
				rockchip,pins = <I2C2AUDIO_SCL>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c2_gpio: i2c2-gpio {
				rockchip,pins = <FUNC_TO_GPIO(I2C2AUDIO_SDA)>, <FUNC_TO_GPIO(I2C2AUDIO_SCL)>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};
		};

		gpio2_i2c3 {
			i2c3_sda:i2c3-sda {
				rockchip,pins = <I2C3CAM_SDA>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c3_scl:i2c3-scl {
				rockchip,pins = <I2C3CAM_SCL>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c3_gpio: i2c3-gpio {
				rockchip,pins = <FUNC_TO_GPIO(I2C3CAM_SDA)>, <FUNC_TO_GPIO(I2C3CAM_SCL)>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};
		};

		gpio7_i2c4 {
			i2c4_sda:i2c4-sda {
				rockchip,pins = <I2C4TP_SDA>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c4_scl:i2c4-scl {
				rockchip,pins = <I2C4TP_SCL>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c4_gpio: i2c4-gpio {
				rockchip,pins = <FUNC_TO_GPIO(I2C4TP_SDA)>, <FUNC_TO_GPIO(I2C4TP_SCL)>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};
		};

		gpio7_i2c5 {
			i2c5_sda:i2c5-sda {
				rockchip,pins = <EDPHDMII2C_SDA>;
				rockchip,pull = <VALUE_PULL_NORMAL>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c5_scl:i2c5-scl {
				rockchip,pins = <EDPHDMII2C_SCL>;
				rockchip,pull = <VALUE_PULL_NORMAL>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			i2c5_gpio: i2c5-gpio {
				rockchip,pins = <FUNC_TO_GPIO(EDPHDMII2C_SDA)>, <FUNC_TO_GPIO(EDPHDMII2C_SCL)>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};
		};

		gpio5_spi0 {
			spi0_txd:spi0-txd {
				rockchip,pins = <SPI0_TXD>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			spi0_rxd:spi0-rxd {
				rockchip,pins = <SPI0_RXD>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			spi0_clk:spi0-clk {
				rockchip,pins = <SPI0_CLK>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			spi0_cs0:spi0-cs0 {
				rockchip,pins = <SPI0_CS0>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			spi0_cs1:spi0-cs1 {
				rockchip,pins = <SPI0_CS1>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

		};

		gpio7_spi1 {
			spi1_txd:spi1-txd {
				rockchip,pins = <SPI1_TXD>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			spi1_rxd:spi1-rxd {
				rockchip,pins = <SPI1_RXD>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			spi1_clk:spi1-clk {
				rockchip,pins = <SPI1_CLK>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			spi1_cs0:spi1-cs0 {
				rockchip,pins = <SPI1_CS0>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

		};

		gpio8_spi2 {
			spi2_txd:spi2-txd {
				rockchip,pins = <SPI2_TXD>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			spi2_rxd:spi2-rxd {
				rockchip,pins = <SPI2_RXD>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			spi2_clk:spi2-clk {
				rockchip,pins = <SPI2_CLK>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			spi2_cs0:spi2-cs0 {
				rockchip,pins = <SPI2_CS0>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			spi2_cs1:spi2-cs1 {
				rockchip,pins = <SPI2_CS1>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

		};

		gpio6_i2s {

			i2s_mclk:i2s-mclk {
				rockchip,pins = <I2S_CLK>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};

			i2s_sclk:i2s-sclk {
				rockchip,pins = <I2S_SCLK>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};

			i2s_lrckrx:i2s-lrckrx {
				rockchip,pins = <I2S_LRCKRX>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};

			i2s_lrcktx:i2s-lrcktx {
				rockchip,pins = <I2S_LRCKTX>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};

			i2s_sdo0:i2s-sdo0 {
				rockchip,pins = <I2S_SDO0>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};

			i2s_sdo1:i2s-sdo1 {
				rockchip,pins = <I2S_SDO1>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};

			i2s_sdo2:i2s-sdo2 {
				rockchip,pins = <I2S_SDO2>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};

			i2s_sdo3:i2s-sdo3 {
				rockchip,pins = <I2S_SDO3>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};

			i2s_sdi:i2s-sdi {
				rockchip,pins = <I2S_SDI>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};

			i2s_gpio: i2s-gpio {
				rockchip,pins = <FUNC_TO_GPIO(I2S_CLK)>,
						<FUNC_TO_GPIO(I2S_SCLK)>,
						<FUNC_TO_GPIO(I2S_LRCKRX)>,
						<FUNC_TO_GPIO(I2S_LRCKTX)>,
						<FUNC_TO_GPIO(I2S_SDO0)>,
						<FUNC_TO_GPIO(I2S_SDO1)>,
						<FUNC_TO_GPIO(I2S_SDO2)>,
						<FUNC_TO_GPIO(I2S_SDO3)>,
						<FUNC_TO_GPIO(I2S_SDI)>;

				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};
		};
	
		gpio1_lcdc0 {
			lcdc0_lcdc:lcdc0-lcdc {
				rockchip,pins =
						<LCDC0_DCLK_GPIO1D>,
						<LCDC0_DEN_GPIO1D>,
						<LCDC0_HSYNC_GPIO1D>,
						<LCDC0_VSYNC_GPIO1D>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};
			
			lcdc0_gpio:lcdc0-gpio {
				rockchip,pins = 
						<FUNC_TO_GPIO(LCDC0_DCLK_GPIO1D)>,
						<FUNC_TO_GPIO(LCDC0_DEN_GPIO1D)>,
						<FUNC_TO_GPIO(LCDC0_HSYNC_GPIO1D)>,
						<FUNC_TO_GPIO(LCDC0_VSYNC_GPIO1D)>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				
			};
			
		};

		gpio6_spdif {
			spdif_tx: spdif-tx {
				rockchip,pins = <SPDIF_TX>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};
		};

		gpio7_pwm {
                        vop0_pwm_pin:vop0-pwm {
                                rockchip,pins = <VOP0_PWM>;
                                rockchip,pull = <VALUE_PULL_DISABLE>;
                                rockchip,drive = <VALUE_DRV_DEFAULT>;
                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;

                        };

                        vop1_pwm_pin:vop1-pwm {
                                rockchip,pins = <VOP1_PWM>;
                                rockchip,pull = <VALUE_PULL_DISABLE>;
                                rockchip,drive = <VALUE_DRV_DEFAULT>;
                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
                        };

			pwm0_pin:pwm0 {
				rockchip,pins = <PWM0>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};


			pwm1_pin:pwm1 {
				rockchip,pins = <PWM1>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};


			pwm2_pin:pwm2 {
				rockchip,pins = <PWM2>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};


			pwm3_pin:pwm3 {
				rockchip,pins = <PWM3>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

		};

		gpio3_emmc0 {
			emmc0_clk: emmc0-clk {
				rockchip,pins = <EMMC_CLKOUT>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_8MA>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			emmc0_cmd: emmc0-cmd {
				rockchip,pins = <EMMC_CMD>;
				rockchip,pull = <VALUE_PULL_UP>;
				rockchip,drive = <VALUE_DRV_8MA>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			emmc0_rstnout: emmc0-rstnout {
				rockchip,pins = <EMMC_RSTNOUT>;
				rockchip,pull = <VALUE_PULL_UP>;
				rockchip,drive = <VALUE_DRV_8MA>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};


			emmc0_pwr: emmc0-pwr {
				rockchip,pins = <EMMC_PWREN>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			emmc0_bus1: emmc0-bus-width1 {
				rockchip,pins = <EMMC_DATA0>;
				rockchip,pull = <VALUE_PULL_UP>;
				rockchip,drive = <VALUE_DRV_8MA>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			emmc0_bus4: emmc0-bus-width4 {
				rockchip,pins = <EMMC_DATA0>,
						<EMMC_DATA1>,
						<EMMC_DATA2 >,
						<EMMC_DATA3>;
				rockchip,pull = <VALUE_PULL_UP>;
				rockchip,drive = <VALUE_DRV_8MA>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
		};
		

		gpio6_sdmmc0 {
			sdmmc0_clk: sdmmc0-clk {
				rockchip,pins = <SDMMC0_CLKOUT>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_4MA>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			sdmmc0_cmd: sdmmc0-cmd {
				rockchip,pins = <SDMMC0_CMD>;
				rockchip,pull = <VALUE_PULL_UP>;
				rockchip,drive = <VALUE_DRV_4MA>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			sdmmc0_dectn: sdmmc0-dectn{
				rockchip,pins = <SDMMC0_DECTN>;
				rockchip,pull = <VALUE_PULL_UP>;
				rockchip,drive = <VALUE_DRV_4MA>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};


			sdmmc0_bus1: sdmmc0-bus-width1 {
				rockchip,pins = <SDMMC0_DATA0>;
				rockchip,pull = <VALUE_PULL_UP>;
				rockchip,drive = <VALUE_DRV_4MA>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			sdmmc0_bus4: sdmmc0-bus-width4 {
				rockchip,pins = <SDMMC0_DATA0>,
						<SDMMC0_DATA1>,
						<SDMMC0_DATA2>,
						<SDMMC0_DATA3>;
				rockchip,pull = <VALUE_PULL_UP>;
				rockchip,drive = <VALUE_DRV_4MA>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
			
			sdmmc0_gpio: sdmmc0_gpio{
				rockchip,pins = 
					<GPIO6_C4>,  //CMD
					<GPIO6_C5>,  //CLK
					<GPIO6_C6>,  //DET
					<GPIO6_C0>,  //D0
					<GPIO6_C1>,  //D1
					<GPIO6_C2>,  //D2
				   	<GPIO6_C3>;  //D3
				rockchip,pull = <VALUE_PULL_UP>;
				rockchip,drive = <VALUE_DRV_4MA>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

		};

		gpio4_sdio0 {
				
				sdio0_clk: sdio0_clk {
                rockchip,pins = <SDIO0_CLKOUT>;
                rockchip,pull = <VALUE_PULL_DISABLE>;
                rockchip,drive = <VALUE_DRV_4MA>;
                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
            	};

            	sdio0_cmd: sdio0_cmd {
                	rockchip,pins = <SDIO0_CMD>;
                	rockchip,pull = <VALUE_PULL_UP>;
                	rockchip,drive = <VALUE_DRV_4MA>;
                	//rockchip,tristate = <VALUE_TRI_DEFAULT>;
            	};
			
            	sdio0_dectn: sdio0-dectn{
                	rockchip,pins = <SDIO0_DETECTN>;
                	rockchip,pull = <VALUE_PULL_UP>;
                	rockchip,drive = <VALUE_DRV_DEFAULT>;
                	//rockchip,tristate = <VALUE_TRI_DEFAULT>;
            	};
						
				sdio0_wrprt: sdio0_wrprt{
                	rockchip,pins = <SDIO0_WRPRT>;
                	rockchip,pull = <VALUE_PULL_UP>;
                	rockchip,drive = <VALUE_DRV_DEFAULT>;
                	//rockchip,tristate = <VALUE_TRI_DEFAULT>;
            	};
				
				sdio0_pwr: sdio0-pwren{
                	rockchip,pins = <SDIO0_PWREN>;
                	rockchip,pull = <VALUE_PULL_UP>;
                	rockchip,drive = <VALUE_DRV_DEFAULT>;
                	//rockchip,tristate = <VALUE_TRI_DEFAULT>;
            	};
				
				sdio0_bkpwr: sdio0-bkpwr{
                	rockchip,pins = <SDIO0_BKPWR>;
                	rockchip,pull = <VALUE_PULL_UP>;
                	rockchip,drive = <VALUE_DRV_DEFAULT>;
                	//rockchip,tristate = <VALUE_TRI_DEFAULT>;
            	};
				
				sdio0_intn: sdio0-intn{
                	rockchip,pins = <SDIO0_INTN>;
                	rockchip,pull = <VALUE_PULL_UP>;
                	rockchip,drive = <VALUE_DRV_DEFAULT>;
                	//rockchip,tristate = <VALUE_TRI_DEFAULT>;
            	};
				
	
            	sdio0_bus1: sdio0-bus-width1 {
                	rockchip,pins = <SDIO0_DATA0>;
                	rockchip,pull = <VALUE_PULL_UP>;
                	rockchip,drive = <VALUE_DRV_4MA>;
                	//rockchip,tristate = <VALUE_TRI_DEFAULT>;
            	};

            	sdio0_bus4: sdio0-bus-width4 {
                	rockchip,pins = <SDIO0_DATA0>,
                        <SDIO0_DATA1>,
                        <SDIO0_DATA2>,
                        <SDIO0_DATA3>;
                	rockchip,pull = <VALUE_PULL_UP>;
                	rockchip,drive = <VALUE_DRV_4MA>;
                	//rockchip,tristate = <VALUE_TRI_DEFAULT>;
            	};
            
            	sdio0_gpio: sdio0-all-gpio{
					rockchip,pins = 
						<GPIO4_D1>,   //CLK
						<GPIO4_D0>,   //CMD
						<GPIO4_D2>,   //DET
						<GPIO4_D3>,   //wrprt
						<GPIO4_D4>,   //PWREN
						<GPIO4_D5>,   //BKPWR
						<GPIO4_D6>,   //DO
						<GPIO4_C4>,   //D1    
						<GPIO4_C5>,   //D2
						<GPIO4_C6>,   //D3
						<GPIO4_C7>;   //INTN
					rockchip,pull = <VALUE_PULL_UP>;
					rockchip,drive = <VALUE_DRV_4MA>;
					//rockchip,tristate = <VALUE_TRI_DEFAULT>;
				};
        	};		

		gpio2_gps {
			gps_mag:gps-mag {
				rockchip,pins = <GPS_MAG>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};

			gps_sig:gps-sig {
				rockchip,pins = <GPS_SIG>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};


			gps_rfclk:gps-rfclk {
				rockchip,pins = <GPS_RFCLK>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};

		};
		
		gpio4_gmac {
			mac_clk: mac-clk {
				rockchip,pins = <MAC_CLK>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
			
			mac_txpins: mac-txpins {
				rockchip,pins = <MAC_TXD0>, <MAC_TXD1>, <MAC_TXD2>, <MAC_TXD3>, <MAC_TXEN>, <MAC_TXCLK>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
			
			mac_rxpins: mac-rxpins {
				rockchip,pins = <MAC_RXD0>, <MAC_RXD1>, <MAC_RXD2>, <MAC_RXD3>, <MAC_RXDV>, <MAC_RXER>, <MAC_RXCLK>, <MAC_COL>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
			
			mac_crs: mac-crs {
				rockchip,pins = <MAC_CRS>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
			
			mac_mdpins: mac-mdpins {
				rockchip,pins = <MAC_MDIO>, <MAC_MDC>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
		};

		gpio0_tsadc: gpio0-tsadc {
			tsadc_int: tsadc-int {
				rockchip,pins = <TSADC_INT>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
			};
			tsadc_gpio: tsadc-gpio {
				rockchip,pins = <GPIO0_B2>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
			};
		};

		gpio7_cec {
			hdmi_cec: hdmi-cec {
				rockchip,pins = <EDPHDMI_CECINOUTRESERVED>;
				rockchip,pull = <VALUE_PULL_NORMAL>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};

			hdmi_cec_gpio: hdmi-cec-gpio {
				rockchip,pins = <FUNC_TO_GPIO(EDPHDMI_CECINOUTRESERVED)>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
			};
		};
		//to add



		vol_domain{
			//default 3.3V
			lcdc_vcc:lcdc-vcc {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_LCDC_VCC>;
				rockchip,voltage = <VALUE_VOL_DEFAULT>;
			};
			
			dvp_vcc:dvp-vcc {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_DVP_VCC>;
				rockchip,voltage = <VALUE_VOL_DEFAULT>;
			};
			
			flash0_vcc:flash0-vcc {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH0_VCC>;
				rockchip,voltage = <VALUE_VOL_DEFAULT>;
			};

			flash1_vcc:flash1-vcc {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH1_VCC>;
				rockchip,voltage = <VALUE_VOL_DEFAULT>;
			};
			
			wifi_vcc:wifi-vcc {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_WIFI_VCC>;
				rockchip,voltage = <VALUE_VOL_DEFAULT>; 
			};

			bb_vcc:bb-vcc {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_BB_VCC>;
				rockchip,voltage = <VALUE_VOL_DEFAULT>; 
			};

			audio_vcc:audio-vcc {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_AUDIO_VCC>;
				rockchip,voltage = <VALUE_VOL_DEFAULT>;
			};

			sdcard_vcc:sdcard-vcc {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_SDCARD_VCC>;
				rockchip,voltage = <VALUE_VOL_DEFAULT>;
			};

			gpio30_vcc:gpio30-vcc {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO30_VCC>;
				rockchip,voltage = <VALUE_VOL_DEFAULT>;
			};

			gpio1830_vcc:gpio1830-vcc {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO1830_VCC>;
				rockchip,voltage = <VALUE_VOL_DEFAULT>;
			};


			//1.8V
			
			lcdc_vcc_18:lcdc-vcc-18 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_LCDC_VCC>;
				rockchip,voltage = <VALUE_VOL_1V8>;
			};
			
			dvp_vcc_18:dvp-vcc-18 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_DVP_VCC>;
				rockchip,voltage = <VALUE_VOL_1V8>;
			};
			
			flash0_vcc_18:flash0-vcc-18 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH0_VCC>;
				rockchip,voltage = <VALUE_VOL_1V8>;
			};

			flash1_vcc_18:flash1-vcc-18 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH1_VCC>;
				rockchip,voltage = <VALUE_VOL_1V8>;
			};
			
			wifi_vcc_18:wifi-vcc-18 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_WIFI_VCC>;
				rockchip,voltage = <VALUE_VOL_1V8>; 
			};

			bb_vcc_18:bb-vcc-18 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_BB_VCC>;
				rockchip,voltage = <VALUE_VOL_1V8>; 
			};

			audio_vcc_18:audio-vcc-18 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_AUDIO_VCC>;
				rockchip,voltage = <VALUE_VOL_1V8>;
			};

			sdcard_vcc_18:sdcard-vcc-18 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_SDCARD_VCC>;
				rockchip,voltage = <VALUE_VOL_1V8>;
			};

			gpio30_vcc_18:gpio30-vcc-18 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO30_VCC>;
				rockchip,voltage = <VALUE_VOL_1V8>;
			};

			gpio1830_vcc_18:gpio1830-vcc-18 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO1830_VCC>;
				rockchip,voltage = <VALUE_VOL_1V8>;
			};

	

		
			//3.3V
			lcdc_vcc_33:lcdc-vcc-33 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_LCDC_VCC>;
				rockchip,voltage = <VALUE_VOL_3V3>;
			};
			
			dvp_vcc_33:dvp-vcc-33 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_DVP_VCC>;
				rockchip,voltage = <VALUE_VOL_3V3>;
			};
			
			flash0_vcc_33:flash0-vcc-33 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH0_VCC>;
				rockchip,voltage = <VALUE_VOL_3V3>;
			};

			flash1_vcc_33:flash1-vcc-33 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH1_VCC>;
				rockchip,voltage = <VALUE_VOL_3V3>;
			};
			
			wifi_vcc_33:wifi-vcc-33 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_WIFI_VCC>;
				rockchip,voltage = <VALUE_VOL_3V3>; 
			};

			bb_vcc_33:bb-vcc-33 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_BB_VCC>;
				rockchip,voltage = <VALUE_VOL_3V3>; 
			};

			audio_vcc_33:audio-vcc-33 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_AUDIO_VCC>;
				rockchip,voltage = <VALUE_VOL_3V3>;
			};

			sdcard_vcc_33:sdcard-vcc-33 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_SDCARD_VCC>;
				rockchip,voltage = <VALUE_VOL_3V3>;
			};

			gpio30_vcc_33:gpio30-vcc-33 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO30_VCC>;
				rockchip,voltage = <VALUE_VOL_3V3>;
			};

			gpio1830_vcc_33:gpio1830-vcc-33 {
				rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO1830_VCC>;
				rockchip,voltage = <VALUE_VOL_3V3>;
			};


		};

		
		isp_pin	{
			isp_mipi:isp_mipi{
				rockchip,pins =	<CIF_CLKOUT>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;			
			};
			isp_dvp_d2d9:isp_dvp_d2d9	{
				rockchip,pins = <CIF_DATA2>,<CIF_DATA3>,
								<CIF_DATA4>,<CIF_DATA5>,
								<CIF_DATA6>,<CIF_DATA7>,
								<CIF_DATA8>,<CIF_DATA9>,
								<CIF_VSYNC>,<CIF_HREF>,
								<CIF_CLKIN>,<CIF_CLKOUT>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;

			};
			
			isp_dvp_d0d1:isp_d0d1	{
				rockchip,pins = <CIF_DATA0>,<CIF_DATA1>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			isp_dvp_d10d11:isp_d10d11	{
				rockchip,pins = <CIF_DATA10>,<CIF_DATA11>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
			
			isp_dvp_d0d7:isp_d0d7	{
				rockchip,pins = <CIF_DATA0>,<CIF_DATA1>,
								<CIF_DATA2>,<CIF_DATA3>,
								<CIF_DATA4>,<CIF_DATA5>,
								<CIF_DATA6>,<CIF_DATA7>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			isp_shutter:isp_shutter		{
				rockchip,pins = <ISP_SHUTTEREN>,<ISP_SHUTTERTRIG>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			isp_flash_trigger:isp_flash_trigger {
				rockchip,pins = <ISP_FLASHTRIGOUTSPI1_CS0>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};

			isp_prelight:isp_prelight	{
				rockchip,pins = <ISP_PRELIGHTTRIGSPI1_RXD>;
				rockchip,pull = <VALUE_PULL_DISABLE>;
				rockchip,drive = <VALUE_DRV_DEFAULT>;
				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
			};
			isp_flash_trigger_as_gpio:isp_flash_trigger_as_gpio {
                rockchip,pins = <FUNC_TO_GPIO(ISP_FLASHTRIGOUTSPI1_CS0)>;
                rockchip,pull = <VALUE_PULL_DISABLE>;
                rockchip,drive = <VALUE_DRV_DEFAULT>;
                //rockchip,tristate = <VALUE_TRI_DEFAULT>;			
			};
		};

	};
};