2 * rt5651.c -- RT5651 ALSA SoC audio codec driver
4 * Copyright 2014 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/regmap.h>
19 #include <linux/platform_device.h>
20 #include <linux/spi/spi.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/soc.h>
25 #include <sound/soc-dapm.h>
26 #include <sound/initval.h>
27 #include <sound/tlv.h>
29 #include <linux/clk.h>
33 #define RT5651_DEVICE_ID_VALUE 0x6281
35 #define RT5651_PR_RANGE_BASE (0xff + 1)
36 #define RT5651_PR_SPACING 0x100
38 #define RT5651_PR_BASE (RT5651_PR_RANGE_BASE + (0 * RT5651_PR_SPACING))
40 static const struct regmap_range_cfg rt5651_ranges[] = {
41 { .name = "PR", .range_min = RT5651_PR_BASE,
42 .range_max = RT5651_PR_BASE + 0xb4,
43 .selector_reg = RT5651_PRIV_INDEX,
44 .selector_mask = 0xff,
45 .selector_shift = 0x0,
46 .window_start = RT5651_PRIV_DATA,
50 static const struct reg_sequence init_list[] = {
51 {RT5651_PR_BASE + 0x3d, 0x3e00},
54 static const struct reg_default rt5651_reg[] = {
137 static bool rt5651_volatile_register(struct device *dev, unsigned int reg)
141 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) {
142 if ((reg >= rt5651_ranges[i].window_start &&
143 reg <= rt5651_ranges[i].window_start +
144 rt5651_ranges[i].window_len) ||
145 (reg >= rt5651_ranges[i].range_min &&
146 reg <= rt5651_ranges[i].range_max)) {
153 case RT5651_PRIV_DATA:
154 case RT5651_EQ_CTRL1:
156 case RT5651_IRQ_CTRL2:
157 case RT5651_INT_IRQ_ST:
158 case RT5651_PGM_REG_ARR1:
159 case RT5651_PGM_REG_ARR3:
160 case RT5651_VENDOR_ID:
161 case RT5651_DEVICE_ID:
168 static bool rt5651_readable_register(struct device *dev, unsigned int reg)
172 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) {
173 if ((reg >= rt5651_ranges[i].window_start &&
174 reg <= rt5651_ranges[i].window_start +
175 rt5651_ranges[i].window_len) ||
176 (reg >= rt5651_ranges[i].range_min &&
177 reg <= rt5651_ranges[i].range_max)) {
184 case RT5651_VERSION_ID:
185 case RT5651_VENDOR_ID:
186 case RT5651_DEVICE_ID:
188 case RT5651_LOUT_CTRL1:
189 case RT5651_LOUT_CTRL2:
192 case RT5651_INL1_INR1_VOL:
193 case RT5651_INL2_INR2_VOL:
194 case RT5651_DAC1_DIG_VOL:
195 case RT5651_DAC2_DIG_VOL:
196 case RT5651_DAC2_CTRL:
197 case RT5651_ADC_DIG_VOL:
198 case RT5651_ADC_DATA:
199 case RT5651_ADC_BST_VOL:
200 case RT5651_STO1_ADC_MIXER:
201 case RT5651_STO2_ADC_MIXER:
202 case RT5651_AD_DA_MIXER:
203 case RT5651_STO_DAC_MIXER:
204 case RT5651_DD_MIXER:
205 case RT5651_DIG_INF_DATA:
207 case RT5651_REC_L1_MIXER:
208 case RT5651_REC_L2_MIXER:
209 case RT5651_REC_R1_MIXER:
210 case RT5651_REC_R2_MIXER:
211 case RT5651_HPO_MIXER:
212 case RT5651_OUT_L1_MIXER:
213 case RT5651_OUT_L2_MIXER:
214 case RT5651_OUT_L3_MIXER:
215 case RT5651_OUT_R1_MIXER:
216 case RT5651_OUT_R2_MIXER:
217 case RT5651_OUT_R3_MIXER:
218 case RT5651_LOUT_MIXER:
219 case RT5651_PWR_DIG1:
220 case RT5651_PWR_DIG2:
221 case RT5651_PWR_ANLG1:
222 case RT5651_PWR_ANLG2:
223 case RT5651_PWR_MIXER:
225 case RT5651_PRIV_INDEX:
226 case RT5651_PRIV_DATA:
227 case RT5651_I2S1_SDP:
228 case RT5651_I2S2_SDP:
229 case RT5651_ADDA_CLK1:
230 case RT5651_ADDA_CLK2:
232 case RT5651_TDM_CTL_1:
233 case RT5651_TDM_CTL_2:
234 case RT5651_TDM_CTL_3:
236 case RT5651_PLL_CTRL1:
237 case RT5651_PLL_CTRL2:
238 case RT5651_PLL_MODE_1:
239 case RT5651_PLL_MODE_2:
240 case RT5651_PLL_MODE_3:
241 case RT5651_PLL_MODE_4:
242 case RT5651_PLL_MODE_5:
243 case RT5651_PLL_MODE_6:
244 case RT5651_PLL_MODE_7:
245 case RT5651_DEPOP_M1:
246 case RT5651_DEPOP_M2:
247 case RT5651_DEPOP_M3:
248 case RT5651_CHARGE_PUMP:
250 case RT5651_A_JD_CTL1:
251 case RT5651_EQ_CTRL1:
252 case RT5651_EQ_CTRL2:
256 case RT5651_JD_CTRL1:
257 case RT5651_JD_CTRL2:
258 case RT5651_IRQ_CTRL1:
259 case RT5651_IRQ_CTRL2:
260 case RT5651_INT_IRQ_ST:
261 case RT5651_GPIO_CTRL1:
262 case RT5651_GPIO_CTRL2:
263 case RT5651_GPIO_CTRL3:
264 case RT5651_PGM_REG_ARR1:
265 case RT5651_PGM_REG_ARR2:
266 case RT5651_PGM_REG_ARR3:
267 case RT5651_PGM_REG_ARR4:
268 case RT5651_PGM_REG_ARR5:
269 case RT5651_SCB_FUNC:
270 case RT5651_SCB_CTRL:
271 case RT5651_BASE_BACK:
272 case RT5651_MP3_PLUS1:
273 case RT5651_MP3_PLUS2:
274 case RT5651_ADJ_HPF_CTRL1:
275 case RT5651_ADJ_HPF_CTRL2:
276 case RT5651_HP_CALIB_AMP_DET:
277 case RT5651_HP_CALIB2:
289 static int rt5651_asrc_get(struct snd_kcontrol *kcontrol,
290 struct snd_ctl_elem_value *ucontrol)
292 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
293 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
295 ucontrol->value.integer.value[0] = rt5651->asrc_en;
300 static int rt5651_asrc_put(struct snd_kcontrol *kcontrol,
301 struct snd_ctl_elem_value *ucontrol)
303 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
304 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
306 rt5651->asrc_en = ucontrol->value.integer.value[0];
307 if (rt5651->asrc_en) {
308 snd_soc_write(codec, 0x80, 0x4000);
309 snd_soc_write(codec, 0x81, 0x0302);
310 snd_soc_write(codec, 0x82, 0x0800);
311 snd_soc_write(codec, 0x73, 0x1004);
312 snd_soc_write(codec, 0x83, 0x1000);
313 snd_soc_write(codec, 0x84, 0x7000);
314 snd_soc_update_bits(codec, 0x64, 0x0200, 0x0200);
316 snd_soc_write(codec, 0x83, 0x0);
317 snd_soc_write(codec, 0x84, 0x0);
322 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
323 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
324 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
325 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
326 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
328 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
329 static const DECLARE_TLV_DB_RANGE(bst_tlv,
330 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
331 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
332 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
333 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
334 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
335 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
336 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
339 /* Interface data select */
340 static const char * const rt5651_data_select[] = {
341 "Normal", "Swap", "left copy to right", "right copy to left"};
343 static SOC_ENUM_SINGLE_DECL(rt5651_if2_dac_enum, RT5651_DIG_INF_DATA,
344 RT5651_IF2_DAC_SEL_SFT, rt5651_data_select);
346 static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_enum, RT5651_DIG_INF_DATA,
347 RT5651_IF2_ADC_SEL_SFT, rt5651_data_select);
349 static const char * const rt5651_asrc_mode[] = {"Disable", "Enable"};
351 static const SOC_ENUM_SINGLE_DECL(rt5651_asrc_enum, 0, 0,
354 static const struct snd_kcontrol_new rt5651_snd_controls[] = {
355 /* Headphone Output Volume */
356 SOC_DOUBLE_TLV("HP Playback Volume", RT5651_HP_VOL,
357 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv),
359 SOC_DOUBLE_TLV("OUT Playback Volume", RT5651_LOUT_CTRL1,
360 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv),
362 /* DAC Digital Volume */
363 SOC_DOUBLE("DAC2 Playback Switch", RT5651_DAC2_CTRL,
364 RT5651_M_DAC_L2_VOL_SFT, RT5651_M_DAC_R2_VOL_SFT, 1, 1),
365 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5651_DAC1_DIG_VOL,
366 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
367 175, 0, dac_vol_tlv),
368 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5651_DAC2_DIG_VOL,
369 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
370 175, 0, dac_vol_tlv),
371 /* IN1/IN2 Control */
372 SOC_SINGLE_TLV("IN1 Boost", RT5651_IN1_IN2,
373 RT5651_BST_SFT1, 8, 0, bst_tlv),
374 SOC_SINGLE_TLV("IN2 Boost", RT5651_IN1_IN2,
375 RT5651_BST_SFT2, 8, 0, bst_tlv),
376 /* INL/INR Volume Control */
377 SOC_DOUBLE_TLV("IN Capture Volume", RT5651_INL1_INR1_VOL,
378 RT5651_INL_VOL_SFT, RT5651_INR_VOL_SFT,
380 /* ADC Digital Volume Control */
381 SOC_DOUBLE("ADC Capture Switch", RT5651_ADC_DIG_VOL,
382 RT5651_L_MUTE_SFT, RT5651_R_MUTE_SFT, 1, 1),
383 SOC_DOUBLE_TLV("ADC Capture Volume", RT5651_ADC_DIG_VOL,
384 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
385 127, 0, adc_vol_tlv),
386 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5651_ADC_DATA,
387 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
388 127, 0, adc_vol_tlv),
389 /* ADC Boost Volume Control */
390 SOC_DOUBLE_TLV("ADC Boost Gain", RT5651_ADC_BST_VOL,
391 RT5651_ADC_L_BST_SFT, RT5651_ADC_R_BST_SFT,
394 /* RT5651 ASRC Switch */
395 SOC_ENUM_EXT("RT5651 ASRC Switch", rt5651_asrc_enum,
396 rt5651_asrc_get, rt5651_asrc_put),
398 SOC_SINGLE("IF1 ASRC Switch", RT5651_PLL_MODE_1,
399 RT5651_STO1_T_SFT, 1, 0),
400 SOC_SINGLE("IF2 ASRC Switch", RT5651_PLL_MODE_1,
401 RT5651_STO2_T_SFT, 1, 0),
402 SOC_SINGLE("DMIC ASRC Switch", RT5651_PLL_MODE_1,
403 RT5651_DMIC_1_M_SFT, 1, 0),
405 SOC_ENUM("ADC IF2 Data Switch", rt5651_if2_adc_enum),
406 SOC_ENUM("DAC IF2 Data Switch", rt5651_if2_dac_enum),
410 * set_dmic_clk - Set parameter of dmic.
413 * @kcontrol: The kcontrol of this widget.
417 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
418 struct snd_kcontrol *kcontrol, int event)
420 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
421 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
424 rate = rt5651->sysclk / rl6231_get_pre_div(rt5651->regmap,
425 RT5651_ADDA_CLK1, RT5651_I2S_PD1_SFT);
426 idx = rl6231_calc_dmic_clk(rate);
428 dev_err(codec->dev, "Failed to set DMIC clock\n");
430 snd_soc_update_bits(codec, RT5651_DMIC, RT5651_DMIC_CLK_MASK,
431 idx << RT5651_DMIC_CLK_SFT);
436 static int is_sysclk_from_pll(struct snd_soc_dapm_widget *source,
437 struct snd_soc_dapm_widget *sink)
439 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
442 val = snd_soc_read(codec, RT5651_GLB_CLK);
443 val &= RT5651_SCLK_SRC_MASK;
444 if (val == RT5651_SCLK_SRC_PLL1)
451 static const struct snd_kcontrol_new rt5651_sto1_adc_l_mix[] = {
452 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER,
453 RT5651_M_STO1_ADC_L1_SFT, 1, 1),
454 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER,
455 RT5651_M_STO1_ADC_L2_SFT, 1, 1),
458 static const struct snd_kcontrol_new rt5651_sto1_adc_r_mix[] = {
459 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER,
460 RT5651_M_STO1_ADC_R1_SFT, 1, 1),
461 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER,
462 RT5651_M_STO1_ADC_R2_SFT, 1, 1),
465 static const struct snd_kcontrol_new rt5651_sto2_adc_l_mix[] = {
466 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER,
467 RT5651_M_STO2_ADC_L1_SFT, 1, 1),
468 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER,
469 RT5651_M_STO2_ADC_L2_SFT, 1, 1),
472 static const struct snd_kcontrol_new rt5651_sto2_adc_r_mix[] = {
473 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER,
474 RT5651_M_STO2_ADC_R1_SFT, 1, 1),
475 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER,
476 RT5651_M_STO2_ADC_R2_SFT, 1, 1),
479 static const struct snd_kcontrol_new rt5651_dac_l_mix[] = {
480 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER,
481 RT5651_M_ADCMIX_L_SFT, 1, 1),
482 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER,
483 RT5651_M_IF1_DAC_L_SFT, 1, 1),
486 static const struct snd_kcontrol_new rt5651_dac_r_mix[] = {
487 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER,
488 RT5651_M_ADCMIX_R_SFT, 1, 1),
489 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER,
490 RT5651_M_IF1_DAC_R_SFT, 1, 1),
493 static const struct snd_kcontrol_new rt5651_sto_dac_l_mix[] = {
494 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER,
495 RT5651_M_DAC_L1_MIXL_SFT, 1, 1),
496 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_STO_DAC_MIXER,
497 RT5651_M_DAC_L2_MIXL_SFT, 1, 1),
498 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER,
499 RT5651_M_DAC_R1_MIXL_SFT, 1, 1),
502 static const struct snd_kcontrol_new rt5651_sto_dac_r_mix[] = {
503 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER,
504 RT5651_M_DAC_R1_MIXR_SFT, 1, 1),
505 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_STO_DAC_MIXER,
506 RT5651_M_DAC_R2_MIXR_SFT, 1, 1),
507 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER,
508 RT5651_M_DAC_L1_MIXR_SFT, 1, 1),
511 static const struct snd_kcontrol_new rt5651_dd_dac_l_mix[] = {
512 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_DD_MIXER,
513 RT5651_M_STO_DD_L1_SFT, 1, 1),
514 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER,
515 RT5651_M_STO_DD_L2_SFT, 1, 1),
516 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER,
517 RT5651_M_STO_DD_R2_L_SFT, 1, 1),
520 static const struct snd_kcontrol_new rt5651_dd_dac_r_mix[] = {
521 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_DD_MIXER,
522 RT5651_M_STO_DD_R1_SFT, 1, 1),
523 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER,
524 RT5651_M_STO_DD_R2_SFT, 1, 1),
525 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER,
526 RT5651_M_STO_DD_L2_R_SFT, 1, 1),
529 /* Analog Input Mixer */
530 static const struct snd_kcontrol_new rt5651_rec_l_mix[] = {
531 SOC_DAPM_SINGLE("INL1 Switch", RT5651_REC_L2_MIXER,
532 RT5651_M_IN1_L_RM_L_SFT, 1, 1),
533 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_L2_MIXER,
534 RT5651_M_BST3_RM_L_SFT, 1, 1),
535 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_L2_MIXER,
536 RT5651_M_BST2_RM_L_SFT, 1, 1),
537 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_L2_MIXER,
538 RT5651_M_BST1_RM_L_SFT, 1, 1),
541 static const struct snd_kcontrol_new rt5651_rec_r_mix[] = {
542 SOC_DAPM_SINGLE("INR1 Switch", RT5651_REC_R2_MIXER,
543 RT5651_M_IN1_R_RM_R_SFT, 1, 1),
544 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_R2_MIXER,
545 RT5651_M_BST3_RM_R_SFT, 1, 1),
546 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_R2_MIXER,
547 RT5651_M_BST2_RM_R_SFT, 1, 1),
548 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_R2_MIXER,
549 RT5651_M_BST1_RM_R_SFT, 1, 1),
552 /* Analog Output Mixer */
554 static const struct snd_kcontrol_new rt5651_out_l_mix[] = {
555 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_L3_MIXER,
556 RT5651_M_BST1_OM_L_SFT, 1, 1),
557 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_L3_MIXER,
558 RT5651_M_BST2_OM_L_SFT, 1, 1),
559 SOC_DAPM_SINGLE("INL1 Switch", RT5651_OUT_L3_MIXER,
560 RT5651_M_IN1_L_OM_L_SFT, 1, 1),
561 SOC_DAPM_SINGLE("REC MIXL Switch", RT5651_OUT_L3_MIXER,
562 RT5651_M_RM_L_OM_L_SFT, 1, 1),
563 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_OUT_L3_MIXER,
564 RT5651_M_DAC_L1_OM_L_SFT, 1, 1),
567 static const struct snd_kcontrol_new rt5651_out_r_mix[] = {
568 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_R3_MIXER,
569 RT5651_M_BST2_OM_R_SFT, 1, 1),
570 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_R3_MIXER,
571 RT5651_M_BST1_OM_R_SFT, 1, 1),
572 SOC_DAPM_SINGLE("INR1 Switch", RT5651_OUT_R3_MIXER,
573 RT5651_M_IN1_R_OM_R_SFT, 1, 1),
574 SOC_DAPM_SINGLE("REC MIXR Switch", RT5651_OUT_R3_MIXER,
575 RT5651_M_RM_R_OM_R_SFT, 1, 1),
576 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_OUT_R3_MIXER,
577 RT5651_M_DAC_R1_OM_R_SFT, 1, 1),
580 static const struct snd_kcontrol_new rt5651_hpo_mix[] = {
581 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5651_HPO_MIXER,
582 RT5651_M_DAC1_HM_SFT, 1, 1),
583 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5651_HPO_MIXER,
584 RT5651_M_HPVOL_HM_SFT, 1, 1),
587 static const struct snd_kcontrol_new rt5651_lout_mix[] = {
588 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_LOUT_MIXER,
589 RT5651_M_DAC_L1_LM_SFT, 1, 1),
590 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_LOUT_MIXER,
591 RT5651_M_DAC_R1_LM_SFT, 1, 1),
592 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5651_LOUT_MIXER,
593 RT5651_M_OV_L_LM_SFT, 1, 1),
594 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5651_LOUT_MIXER,
595 RT5651_M_OV_R_LM_SFT, 1, 1),
598 static const struct snd_kcontrol_new outvol_l_control =
599 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1,
600 RT5651_VOL_L_SFT, 1, 1);
602 static const struct snd_kcontrol_new outvol_r_control =
603 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1,
604 RT5651_VOL_R_SFT, 1, 1);
606 static const struct snd_kcontrol_new lout_l_mute_control =
607 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1,
608 RT5651_L_MUTE_SFT, 1, 1);
610 static const struct snd_kcontrol_new lout_r_mute_control =
611 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1,
612 RT5651_R_MUTE_SFT, 1, 1);
614 static const struct snd_kcontrol_new hpovol_l_control =
615 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL,
616 RT5651_VOL_L_SFT, 1, 1);
618 static const struct snd_kcontrol_new hpovol_r_control =
619 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL,
620 RT5651_VOL_R_SFT, 1, 1);
622 static const struct snd_kcontrol_new hpo_l_mute_control =
623 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL,
624 RT5651_L_MUTE_SFT, 1, 1);
626 static const struct snd_kcontrol_new hpo_r_mute_control =
627 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL,
628 RT5651_R_MUTE_SFT, 1, 1);
631 static const char * const rt5651_inl_src[] = {"IN2P", "HPOVOLLP"};
633 static SOC_ENUM_SINGLE_DECL(
634 rt5651_inl_enum, RT5651_INL1_INR1_VOL,
635 RT5651_INL_SEL_SFT, rt5651_inl_src);
637 static const struct snd_kcontrol_new rt5651_inl1_mux =
638 SOC_DAPM_ENUM("INL1 source", rt5651_inl_enum);
640 static const char * const rt5651_inr1_src[] = {"IN2N", "HPOVOLRP"};
642 static SOC_ENUM_SINGLE_DECL(
643 rt5651_inr1_enum, RT5651_INL1_INR1_VOL,
644 RT5651_INR_SEL_SFT, rt5651_inr1_src);
646 static const struct snd_kcontrol_new rt5651_inr1_mux =
647 SOC_DAPM_ENUM("INR1 source", rt5651_inr1_enum);
649 static const char * const rt5651_inl2_src[] = {"IN3P", "OUTVOLLP"};
651 static SOC_ENUM_SINGLE_DECL(
652 rt5651_inl2_enum, RT5651_INL2_INR2_VOL,
653 RT5651_INL_SEL_SFT, rt5651_inl2_src);
655 static const struct snd_kcontrol_new rt5651_inl2_mux =
656 SOC_DAPM_ENUM("INL2 source", rt5651_inl2_enum);
658 static const char * const rt5651_inr2_src[] = {"IN3N", "OUTVOLRP"};
660 static SOC_ENUM_SINGLE_DECL(
661 rt5651_inr2_enum, RT5651_INL2_INR2_VOL,
662 RT5651_INR_SEL_SFT, rt5651_inr2_src);
664 static const struct snd_kcontrol_new rt5651_inr2_mux =
665 SOC_DAPM_ENUM("INR2 source", rt5651_inr2_enum);
668 /* Stereo ADC source */
669 static const char * const rt5651_stereo1_adc1_src[] = {"DD MIX", "ADC"};
671 static SOC_ENUM_SINGLE_DECL(
672 rt5651_stereo1_adc1_enum, RT5651_STO1_ADC_MIXER,
673 RT5651_STO1_ADC_1_SRC_SFT, rt5651_stereo1_adc1_src);
675 static const struct snd_kcontrol_new rt5651_sto1_adc_l1_mux =
676 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5651_stereo1_adc1_enum);
678 static const struct snd_kcontrol_new rt5651_sto1_adc_r1_mux =
679 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5651_stereo1_adc1_enum);
681 static const char * const rt5651_stereo1_adc2_src[] = {"DMIC", "DD MIX"};
683 static SOC_ENUM_SINGLE_DECL(
684 rt5651_stereo1_adc2_enum, RT5651_STO1_ADC_MIXER,
685 RT5651_STO1_ADC_2_SRC_SFT, rt5651_stereo1_adc2_src);
687 static const struct snd_kcontrol_new rt5651_sto1_adc_l2_mux =
688 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5651_stereo1_adc2_enum);
690 static const struct snd_kcontrol_new rt5651_sto1_adc_r2_mux =
691 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5651_stereo1_adc2_enum);
693 /* Mono ADC source */
694 static const char * const rt5651_sto2_adc_l1_src[] = {"DD MIXL", "ADCL"};
696 static SOC_ENUM_SINGLE_DECL(
697 rt5651_sto2_adc_l1_enum, RT5651_STO1_ADC_MIXER,
698 RT5651_STO2_ADC_L1_SRC_SFT, rt5651_sto2_adc_l1_src);
700 static const struct snd_kcontrol_new rt5651_sto2_adc_l1_mux =
701 SOC_DAPM_ENUM("Stereo2 ADC1 left source", rt5651_sto2_adc_l1_enum);
703 static const char * const rt5651_sto2_adc_l2_src[] = {"DMIC L", "DD MIXL"};
705 static SOC_ENUM_SINGLE_DECL(
706 rt5651_sto2_adc_l2_enum, RT5651_STO1_ADC_MIXER,
707 RT5651_STO2_ADC_L2_SRC_SFT, rt5651_sto2_adc_l2_src);
709 static const struct snd_kcontrol_new rt5651_sto2_adc_l2_mux =
710 SOC_DAPM_ENUM("Stereo2 ADC2 left source", rt5651_sto2_adc_l2_enum);
712 static const char * const rt5651_sto2_adc_r1_src[] = {"DD MIXR", "ADCR"};
714 static SOC_ENUM_SINGLE_DECL(
715 rt5651_sto2_adc_r1_enum, RT5651_STO1_ADC_MIXER,
716 RT5651_STO2_ADC_R1_SRC_SFT, rt5651_sto2_adc_r1_src);
718 static const struct snd_kcontrol_new rt5651_sto2_adc_r1_mux =
719 SOC_DAPM_ENUM("Stereo2 ADC1 right source", rt5651_sto2_adc_r1_enum);
721 static const char * const rt5651_sto2_adc_r2_src[] = {"DMIC R", "DD MIXR"};
723 static SOC_ENUM_SINGLE_DECL(
724 rt5651_sto2_adc_r2_enum, RT5651_STO1_ADC_MIXER,
725 RT5651_STO2_ADC_R2_SRC_SFT, rt5651_sto2_adc_r2_src);
727 static const struct snd_kcontrol_new rt5651_sto2_adc_r2_mux =
728 SOC_DAPM_ENUM("Stereo2 ADC2 right source", rt5651_sto2_adc_r2_enum);
730 /* DAC2 channel source */
732 static const char * const rt5651_dac_src[] = {"IF1", "IF2"};
734 static SOC_ENUM_SINGLE_DECL(rt5651_dac_l2_enum, RT5651_DAC2_CTRL,
735 RT5651_SEL_DAC_L2_SFT, rt5651_dac_src);
737 static const struct snd_kcontrol_new rt5651_dac_l2_mux =
738 SOC_DAPM_ENUM("DAC2 left channel source", rt5651_dac_l2_enum);
740 static SOC_ENUM_SINGLE_DECL(
741 rt5651_dac_r2_enum, RT5651_DAC2_CTRL,
742 RT5651_SEL_DAC_R2_SFT, rt5651_dac_src);
744 static const struct snd_kcontrol_new rt5651_dac_r2_mux =
745 SOC_DAPM_ENUM("DAC2 right channel source", rt5651_dac_r2_enum);
747 /* IF2_ADC channel source */
749 static const char * const rt5651_adc_src[] = {"IF1 ADC1", "IF1 ADC2"};
751 static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_src_enum, RT5651_DIG_INF_DATA,
752 RT5651_IF2_ADC_SRC_SFT, rt5651_adc_src);
754 static const struct snd_kcontrol_new rt5651_if2_adc_src_mux =
755 SOC_DAPM_ENUM("IF2 ADC channel source", rt5651_if2_adc_src_enum);
758 static const char * const rt5651_pdm_sel[] = {"DD MIX", "Stereo DAC MIX"};
760 static SOC_ENUM_SINGLE_DECL(
761 rt5651_pdm_l_sel_enum, RT5651_PDM_CTL,
762 RT5651_PDM_L_SEL_SFT, rt5651_pdm_sel);
764 static SOC_ENUM_SINGLE_DECL(
765 rt5651_pdm_r_sel_enum, RT5651_PDM_CTL,
766 RT5651_PDM_R_SEL_SFT, rt5651_pdm_sel);
768 static const struct snd_kcontrol_new rt5651_pdm_l_mux =
769 SOC_DAPM_ENUM("PDM L select", rt5651_pdm_l_sel_enum);
771 static const struct snd_kcontrol_new rt5651_pdm_r_mux =
772 SOC_DAPM_ENUM("PDM R select", rt5651_pdm_r_sel_enum);
774 static int rt5651_amp_power_event(struct snd_soc_dapm_widget *w,
775 struct snd_kcontrol *kcontrol, int event)
777 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
778 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
781 case SND_SOC_DAPM_POST_PMU:
782 /* depop parameters */
783 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE +
784 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0200);
785 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2,
786 RT5651_DEPOP_MASK, RT5651_DEPOP_MAN);
787 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1,
788 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK |
789 RT5651_HP_CB_MASK, RT5651_HP_CP_PU |
790 RT5651_HP_SG_DIS | RT5651_HP_CB_PU);
791 regmap_write(rt5651->regmap, RT5651_PR_BASE +
792 RT5651_HP_DCC_INT1, 0x9f00);
793 /* headphone amp power on */
794 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
795 RT5651_PWR_FV1 | RT5651_PWR_FV2, 0);
796 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
799 usleep_range(10000, 15000);
800 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
801 RT5651_PWR_FV1 | RT5651_PWR_FV2 ,
802 RT5651_PWR_FV1 | RT5651_PWR_FV2);
812 static int rt5651_hp_event(struct snd_soc_dapm_widget *w,
813 struct snd_kcontrol *kcontrol, int event)
815 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
816 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
819 case SND_SOC_DAPM_POST_PMU:
820 /* headphone unmute sequence */
821 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2,
822 RT5651_DEPOP_MASK | RT5651_DIG_DP_MASK,
823 RT5651_DEPOP_AUTO | RT5651_DIG_DP_EN);
824 regmap_update_bits(rt5651->regmap, RT5651_CHARGE_PUMP,
825 RT5651_PM_HP_MASK, RT5651_PM_HP_HV);
827 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M3,
828 RT5651_CP_FQ1_MASK | RT5651_CP_FQ2_MASK |
830 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ1_SFT) |
831 (RT5651_CP_FQ_12_KHZ << RT5651_CP_FQ2_SFT) |
832 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ3_SFT));
834 regmap_write(rt5651->regmap, RT5651_PR_BASE +
835 RT5651_MAMP_INT_REG2, 0x1c00);
836 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1,
837 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK,
838 RT5651_HP_CP_PD | RT5651_HP_SG_EN);
839 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE +
840 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0400);
844 case SND_SOC_DAPM_PRE_PMD:
846 usleep_range(70000, 75000);
856 static int rt5651_hp_post_event(struct snd_soc_dapm_widget *w,
857 struct snd_kcontrol *kcontrol, int event)
860 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
861 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
864 case SND_SOC_DAPM_POST_PMU:
865 if (!rt5651->hp_mute)
866 usleep_range(80000, 85000);
877 static int rt5651_bst1_event(struct snd_soc_dapm_widget *w,
878 struct snd_kcontrol *kcontrol, int event)
880 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
883 case SND_SOC_DAPM_POST_PMU:
884 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
885 RT5651_PWR_BST1_OP2, RT5651_PWR_BST1_OP2);
888 case SND_SOC_DAPM_PRE_PMD:
889 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
890 RT5651_PWR_BST1_OP2, 0);
900 static int rt5651_bst2_event(struct snd_soc_dapm_widget *w,
901 struct snd_kcontrol *kcontrol, int event)
903 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
906 case SND_SOC_DAPM_POST_PMU:
907 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
908 RT5651_PWR_BST2_OP2, RT5651_PWR_BST2_OP2);
911 case SND_SOC_DAPM_PRE_PMD:
912 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
913 RT5651_PWR_BST2_OP2, 0);
923 static int rt5651_bst3_event(struct snd_soc_dapm_widget *w,
924 struct snd_kcontrol *kcontrol, int event)
926 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
929 case SND_SOC_DAPM_POST_PMU:
930 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
931 RT5651_PWR_BST3_OP2, RT5651_PWR_BST3_OP2);
934 case SND_SOC_DAPM_PRE_PMD:
935 snd_soc_update_bits(codec, RT5651_PWR_ANLG2,
936 RT5651_PWR_BST3_OP2, 0);
946 static const struct snd_soc_dapm_widget rt5651_dapm_widgets[] = {
948 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5651_PLL_MODE_2,
950 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5651_PLL_MODE_2,
952 SND_SOC_DAPM_SUPPLY_S("STO1 DAC ASRC", 1, RT5651_PLL_MODE_2,
954 SND_SOC_DAPM_SUPPLY_S("STO2 DAC ASRC", 1, RT5651_PLL_MODE_2,
956 SND_SOC_DAPM_SUPPLY_S("ADC ASRC", 1, RT5651_PLL_MODE_2,
959 SND_SOC_DAPM_SUPPLY("PLL1", RT5651_PWR_ANLG2,
960 RT5651_PWR_PLL_BIT, 0, NULL, 0),
963 SND_SOC_DAPM_SUPPLY("LDO", RT5651_PWR_ANLG1,
964 RT5651_PWR_LDO_BIT, 0, NULL, 0),
965 SND_SOC_DAPM_SUPPLY("micbias1", RT5651_PWR_ANLG2,
966 RT5651_PWR_MB1_BIT, 0, NULL, 0),
968 SND_SOC_DAPM_INPUT("MIC1"),
969 SND_SOC_DAPM_INPUT("MIC2"),
970 SND_SOC_DAPM_INPUT("MIC3"),
972 SND_SOC_DAPM_INPUT("IN1P"),
973 SND_SOC_DAPM_INPUT("IN2P"),
974 SND_SOC_DAPM_INPUT("IN2N"),
975 SND_SOC_DAPM_INPUT("IN3P"),
976 SND_SOC_DAPM_INPUT("DMIC L1"),
977 SND_SOC_DAPM_INPUT("DMIC R1"),
978 SND_SOC_DAPM_SUPPLY("DMIC CLK", RT5651_DMIC, RT5651_DMIC_1_EN_SFT,
979 0, set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
981 SND_SOC_DAPM_PGA_E("BST1", RT5651_PWR_ANLG2,
982 RT5651_PWR_BST1_BIT, 0, NULL, 0, rt5651_bst1_event,
983 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
984 SND_SOC_DAPM_PGA_E("BST2", RT5651_PWR_ANLG2,
985 RT5651_PWR_BST2_BIT, 0, NULL, 0, rt5651_bst2_event,
986 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
987 SND_SOC_DAPM_PGA_E("BST3", RT5651_PWR_ANLG2,
988 RT5651_PWR_BST3_BIT, 0, NULL, 0, rt5651_bst3_event,
989 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
991 SND_SOC_DAPM_PGA("INL1 VOL", RT5651_PWR_VOL,
992 RT5651_PWR_IN1_L_BIT, 0, NULL, 0),
993 SND_SOC_DAPM_PGA("INR1 VOL", RT5651_PWR_VOL,
994 RT5651_PWR_IN1_R_BIT, 0, NULL, 0),
995 SND_SOC_DAPM_PGA("INL2 VOL", RT5651_PWR_VOL,
996 RT5651_PWR_IN2_L_BIT, 0, NULL, 0),
997 SND_SOC_DAPM_PGA("INR2 VOL", RT5651_PWR_VOL,
998 RT5651_PWR_IN2_R_BIT, 0, NULL, 0),
1000 SND_SOC_DAPM_MUX("INL1 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inl1_mux),
1001 SND_SOC_DAPM_MUX("INR1 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inr1_mux),
1002 SND_SOC_DAPM_MUX("INL2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inl2_mux),
1003 SND_SOC_DAPM_MUX("INR2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inr2_mux),
1005 SND_SOC_DAPM_MIXER("RECMIXL", RT5651_PWR_MIXER, RT5651_PWR_RM_L_BIT, 0,
1006 rt5651_rec_l_mix, ARRAY_SIZE(rt5651_rec_l_mix)),
1007 SND_SOC_DAPM_MIXER("RECMIXR", RT5651_PWR_MIXER, RT5651_PWR_RM_R_BIT, 0,
1008 rt5651_rec_r_mix, ARRAY_SIZE(rt5651_rec_r_mix)),
1010 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1011 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1012 SND_SOC_DAPM_SUPPLY("ADC L Power", RT5651_PWR_DIG1,
1013 RT5651_PWR_ADC_L_BIT, 0, NULL, 0),
1014 SND_SOC_DAPM_SUPPLY("ADC R Power", RT5651_PWR_DIG1,
1015 RT5651_PWR_ADC_R_BIT, 0, NULL, 0),
1017 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1018 &rt5651_sto1_adc_l2_mux),
1019 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1020 &rt5651_sto1_adc_r2_mux),
1021 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1022 &rt5651_sto1_adc_l1_mux),
1023 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1024 &rt5651_sto1_adc_r1_mux),
1025 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1026 &rt5651_sto2_adc_l2_mux),
1027 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1028 &rt5651_sto2_adc_l1_mux),
1029 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1030 &rt5651_sto2_adc_r1_mux),
1031 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1032 &rt5651_sto2_adc_r2_mux),
1034 SND_SOC_DAPM_SUPPLY("Stereo1 Filter", RT5651_PWR_DIG2,
1035 RT5651_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
1036 SND_SOC_DAPM_SUPPLY("Stereo2 Filter", RT5651_PWR_DIG2,
1037 RT5651_PWR_ADC_STO2_F_BIT, 0, NULL, 0),
1038 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1039 rt5651_sto1_adc_l_mix,
1040 ARRAY_SIZE(rt5651_sto1_adc_l_mix)),
1041 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1042 rt5651_sto1_adc_r_mix,
1043 ARRAY_SIZE(rt5651_sto1_adc_r_mix)),
1044 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1045 rt5651_sto2_adc_l_mix,
1046 ARRAY_SIZE(rt5651_sto2_adc_l_mix)),
1047 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1048 rt5651_sto2_adc_r_mix,
1049 ARRAY_SIZE(rt5651_sto2_adc_r_mix)),
1051 /* Digital Interface */
1052 SND_SOC_DAPM_SUPPLY("I2S1", RT5651_PWR_DIG1,
1053 RT5651_PWR_I2S1_BIT, 0, NULL, 0),
1054 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1055 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1056 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1057 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1058 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1059 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1060 SND_SOC_DAPM_PGA("IF1 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1061 SND_SOC_DAPM_SUPPLY("I2S2", RT5651_PWR_DIG1,
1062 RT5651_PWR_I2S2_BIT, 0, NULL, 0),
1063 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1064 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1065 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1066 SND_SOC_DAPM_MUX("IF2 ADC", SND_SOC_NOPM, 0, 0,
1067 &rt5651_if2_adc_src_mux),
1069 /* Digital Interface Select */
1071 SND_SOC_DAPM_MUX("PDM L Mux", RT5651_PDM_CTL,
1072 RT5651_M_PDM_L_SFT, 1, &rt5651_pdm_l_mux),
1073 SND_SOC_DAPM_MUX("PDM R Mux", RT5651_PDM_CTL,
1074 RT5651_M_PDM_R_SFT, 1, &rt5651_pdm_r_mux),
1075 /* Audio Interface */
1076 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1077 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1078 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1079 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1082 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1085 /* DAC mixer before sound effect */
1086 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1087 rt5651_dac_l_mix, ARRAY_SIZE(rt5651_dac_l_mix)),
1088 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1089 rt5651_dac_r_mix, ARRAY_SIZE(rt5651_dac_r_mix)),
1091 /* DAC2 channel Mux */
1092 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_l2_mux),
1093 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_r2_mux),
1094 SND_SOC_DAPM_PGA("DAC L2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0),
1095 SND_SOC_DAPM_PGA("DAC R2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0),
1097 SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5651_PWR_DIG2,
1098 RT5651_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
1099 SND_SOC_DAPM_SUPPLY("Stero2 DAC Power", RT5651_PWR_DIG2,
1100 RT5651_PWR_DAC_STO2_F_BIT, 0, NULL, 0),
1102 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1103 rt5651_sto_dac_l_mix,
1104 ARRAY_SIZE(rt5651_sto_dac_l_mix)),
1105 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1106 rt5651_sto_dac_r_mix,
1107 ARRAY_SIZE(rt5651_sto_dac_r_mix)),
1108 SND_SOC_DAPM_MIXER("DD MIXL", SND_SOC_NOPM, 0, 0,
1109 rt5651_dd_dac_l_mix,
1110 ARRAY_SIZE(rt5651_dd_dac_l_mix)),
1111 SND_SOC_DAPM_MIXER("DD MIXR", SND_SOC_NOPM, 0, 0,
1112 rt5651_dd_dac_r_mix,
1113 ARRAY_SIZE(rt5651_dd_dac_r_mix)),
1116 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1117 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1118 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5651_PWR_DIG1,
1119 RT5651_PWR_DAC_L1_BIT, 0, NULL, 0),
1120 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5651_PWR_DIG1,
1121 RT5651_PWR_DAC_R1_BIT, 0, NULL, 0),
1123 SND_SOC_DAPM_MIXER("OUT MIXL", RT5651_PWR_MIXER, RT5651_PWR_OM_L_BIT,
1124 0, rt5651_out_l_mix, ARRAY_SIZE(rt5651_out_l_mix)),
1125 SND_SOC_DAPM_MIXER("OUT MIXR", RT5651_PWR_MIXER, RT5651_PWR_OM_R_BIT,
1126 0, rt5651_out_r_mix, ARRAY_SIZE(rt5651_out_r_mix)),
1128 SND_SOC_DAPM_SWITCH("OUTVOL L", RT5651_PWR_VOL,
1129 RT5651_PWR_OV_L_BIT, 0, &outvol_l_control),
1130 SND_SOC_DAPM_SWITCH("OUTVOL R", RT5651_PWR_VOL,
1131 RT5651_PWR_OV_R_BIT, 0, &outvol_r_control),
1132 SND_SOC_DAPM_SWITCH("HPOVOL L", RT5651_PWR_VOL,
1133 RT5651_PWR_HV_L_BIT, 0, &hpovol_l_control),
1134 SND_SOC_DAPM_SWITCH("HPOVOL R", RT5651_PWR_VOL,
1135 RT5651_PWR_HV_R_BIT, 0, &hpovol_r_control),
1136 SND_SOC_DAPM_PGA("INL1", RT5651_PWR_VOL,
1137 RT5651_PWR_IN1_L_BIT, 0, NULL, 0),
1138 SND_SOC_DAPM_PGA("INR1", RT5651_PWR_VOL,
1139 RT5651_PWR_IN1_R_BIT, 0, NULL, 0),
1140 SND_SOC_DAPM_PGA("INL2", RT5651_PWR_VOL,
1141 RT5651_PWR_IN2_L_BIT, 0, NULL, 0),
1142 SND_SOC_DAPM_PGA("INR2", RT5651_PWR_VOL,
1143 RT5651_PWR_IN2_R_BIT, 0, NULL, 0),
1144 /* HPO/LOUT/Mono Mixer */
1145 SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1146 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)),
1147 SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1148 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)),
1149 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5651_PWR_ANLG1,
1150 RT5651_PWR_HP_L_BIT, 0, NULL, 0),
1151 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5651_PWR_ANLG1,
1152 RT5651_PWR_HP_R_BIT, 0, NULL, 0),
1153 SND_SOC_DAPM_MIXER("LOUT MIX", RT5651_PWR_ANLG1, RT5651_PWR_LM_BIT, 0,
1154 rt5651_lout_mix, ARRAY_SIZE(rt5651_lout_mix)),
1156 SND_SOC_DAPM_SUPPLY("Amp Power", RT5651_PWR_ANLG1,
1157 RT5651_PWR_HA_BIT, 0, rt5651_amp_power_event,
1158 SND_SOC_DAPM_POST_PMU),
1159 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5651_hp_event,
1160 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1161 SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
1162 &hpo_l_mute_control),
1163 SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
1164 &hpo_r_mute_control),
1165 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1166 &lout_l_mute_control),
1167 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1168 &lout_r_mute_control),
1169 SND_SOC_DAPM_POST("HP Post", rt5651_hp_post_event),
1172 SND_SOC_DAPM_OUTPUT("HPOL"),
1173 SND_SOC_DAPM_OUTPUT("HPOR"),
1174 SND_SOC_DAPM_OUTPUT("LOUTL"),
1175 SND_SOC_DAPM_OUTPUT("LOUTR"),
1176 SND_SOC_DAPM_OUTPUT("PDML"),
1177 SND_SOC_DAPM_OUTPUT("PDMR"),
1180 static const struct snd_soc_dapm_route rt5651_dapm_routes[] = {
1181 {"Stero1 DAC Power", NULL, "STO1 DAC ASRC"},
1182 {"Stero2 DAC Power", NULL, "STO2 DAC ASRC"},
1183 {"I2S1", NULL, "I2S1 ASRC"},
1184 {"I2S2", NULL, "I2S2 ASRC"},
1186 {"IN1P", NULL, "LDO"},
1187 {"IN2P", NULL, "LDO"},
1188 {"IN3P", NULL, "LDO"},
1189 {"BST1", NULL, "micbias1"},
1190 {"BST2", NULL, "micbias1"},
1191 {"BST3", NULL, "micbias1"},
1193 {"IN1P", NULL, "MIC1"},
1194 {"IN2P", NULL, "MIC2"},
1195 {"IN2N", NULL, "MIC2"},
1196 {"IN3P", NULL, "MIC3"},
1198 {"BST1", NULL, "IN1P"},
1199 {"BST2", NULL, "IN2P"},
1200 {"BST2", NULL, "IN2N"},
1201 {"BST3", NULL, "IN3P"},
1203 {"INL1 VOL", NULL, "IN2P"},
1204 {"INR1 VOL", NULL, "IN2N"},
1206 {"RECMIXL", "INL1 Switch", "INL1 VOL"},
1207 {"RECMIXL", "BST3 Switch", "BST3"},
1208 {"RECMIXL", "BST2 Switch", "BST2"},
1209 {"RECMIXL", "BST1 Switch", "BST1"},
1211 {"RECMIXR", "INR1 Switch", "INR1 VOL"},
1212 {"RECMIXR", "BST3 Switch", "BST3"},
1213 {"RECMIXR", "BST2 Switch", "BST2"},
1214 {"RECMIXR", "BST1 Switch", "BST1"},
1216 {"ADC L", NULL, "RECMIXL"},
1217 {"ADC L", NULL, "ADC L Power"},
1218 {"ADC R", NULL, "RECMIXR"},
1219 {"ADC R", NULL, "ADC R Power"},
1221 {"DMIC L1", NULL, "DMIC CLK"},
1222 {"DMIC R1", NULL, "DMIC CLK"},
1224 {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"},
1225 {"Stereo1 ADC L2 Mux", "DD MIX", "DD MIXL"},
1226 {"Stereo1 ADC L1 Mux", "ADC", "ADC L"},
1227 {"Stereo1 ADC L1 Mux", "DD MIX", "DD MIXL"},
1229 {"Stereo1 ADC R1 Mux", "ADC", "ADC R"},
1230 {"Stereo1 ADC R1 Mux", "DD MIX", "DD MIXR"},
1231 {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"},
1232 {"Stereo1 ADC R2 Mux", "DD MIX", "DD MIXR"},
1234 {"Stereo2 ADC L2 Mux", "DMIC L", "DMIC L1"},
1235 {"Stereo2 ADC L2 Mux", "DD MIXL", "DD MIXL"},
1236 {"Stereo2 ADC L1 Mux", "DD MIXL", "DD MIXL"},
1237 {"Stereo2 ADC L1 Mux", "ADCL", "ADC L"},
1239 {"Stereo2 ADC R1 Mux", "DD MIXR", "DD MIXR"},
1240 {"Stereo2 ADC R1 Mux", "ADCR", "ADC R"},
1241 {"Stereo2 ADC R2 Mux", "DMIC R", "DMIC R1"},
1242 {"Stereo2 ADC R2 Mux", "DD MIXR", "DD MIXR"},
1244 {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"},
1245 {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"},
1246 {"Stereo1 ADC MIXL", NULL, "Stereo1 Filter"},
1247 {"Stereo1 Filter", NULL, "PLL1", is_sysclk_from_pll},
1248 {"Stereo1 Filter", NULL, "ADC ASRC"},
1250 {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"},
1251 {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"},
1252 {"Stereo1 ADC MIXR", NULL, "Stereo1 Filter"},
1254 {"Stereo2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux"},
1255 {"Stereo2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux"},
1256 {"Stereo2 ADC MIXL", NULL, "Stereo2 Filter"},
1257 {"Stereo2 Filter", NULL, "PLL1", is_sysclk_from_pll},
1258 {"Stereo2 Filter", NULL, "ADC ASRC"},
1260 {"Stereo2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux"},
1261 {"Stereo2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux"},
1262 {"Stereo2 ADC MIXR", NULL, "Stereo2 Filter"},
1264 {"IF1 ADC2", NULL, "Stereo2 ADC MIXL"},
1265 {"IF1 ADC2", NULL, "Stereo2 ADC MIXR"},
1266 {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
1267 {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
1269 {"IF1 ADC1", NULL, "I2S1"},
1271 {"IF2 ADC", "IF1 ADC1", "IF1 ADC1"},
1272 {"IF2 ADC", "IF1 ADC2", "IF1 ADC2"},
1273 {"IF2 ADC", NULL, "I2S2"},
1275 {"AIF1TX", NULL, "IF1 ADC1"},
1276 {"AIF1TX", NULL, "IF1 ADC2"},
1277 {"AIF2TX", NULL, "IF2 ADC"},
1279 {"IF1 DAC", NULL, "AIF1RX"},
1280 {"IF1 DAC", NULL, "I2S1"},
1281 {"IF2 DAC", NULL, "AIF2RX"},
1282 {"IF2 DAC", NULL, "I2S2"},
1284 {"IF1 DAC1 L", NULL, "IF1 DAC"},
1285 {"IF1 DAC1 R", NULL, "IF1 DAC"},
1286 {"IF1 DAC2 L", NULL, "IF1 DAC"},
1287 {"IF1 DAC2 R", NULL, "IF1 DAC"},
1288 {"IF2 DAC L", NULL, "IF2 DAC"},
1289 {"IF2 DAC R", NULL, "IF2 DAC"},
1291 {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
1292 {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
1293 {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
1294 {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
1296 {"Audio DSP", NULL, "DAC MIXL"},
1297 {"Audio DSP", NULL, "DAC MIXR"},
1299 {"DAC L2 Mux", "IF1", "IF1 DAC2 L"},
1300 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1301 {"DAC L2 Volume", NULL, "DAC L2 Mux"},
1303 {"DAC R2 Mux", "IF1", "IF1 DAC2 R"},
1304 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1305 {"DAC R2 Volume", NULL, "DAC R2 Mux"},
1307 {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
1308 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"},
1309 {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
1310 {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
1311 {"Stereo DAC MIXL", NULL, "Stero2 DAC Power"},
1312 {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
1313 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"},
1314 {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
1315 {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
1316 {"Stereo DAC MIXR", NULL, "Stero2 DAC Power"},
1318 {"PDM L Mux", "Stereo DAC MIX", "Stereo DAC MIXL"},
1319 {"PDM L Mux", "DD MIX", "DAC MIXL"},
1320 {"PDM R Mux", "Stereo DAC MIX", "Stereo DAC MIXR"},
1321 {"PDM R Mux", "DD MIX", "DAC MIXR"},
1323 {"DAC L1", NULL, "Stereo DAC MIXL"},
1324 {"DAC L1", NULL, "PLL1", is_sysclk_from_pll},
1325 {"DAC L1", NULL, "DAC L1 Power"},
1326 {"DAC R1", NULL, "Stereo DAC MIXR"},
1327 {"DAC R1", NULL, "PLL1", is_sysclk_from_pll},
1328 {"DAC R1", NULL, "DAC R1 Power"},
1330 {"DD MIXL", "DAC L1 Switch", "DAC MIXL"},
1331 {"DD MIXL", "DAC L2 Switch", "DAC L2 Volume"},
1332 {"DD MIXL", "DAC R2 Switch", "DAC R2 Volume"},
1333 {"DD MIXL", NULL, "Stero2 DAC Power"},
1335 {"DD MIXR", "DAC R1 Switch", "DAC MIXR"},
1336 {"DD MIXR", "DAC R2 Switch", "DAC R2 Volume"},
1337 {"DD MIXR", "DAC L2 Switch", "DAC L2 Volume"},
1338 {"DD MIXR", NULL, "Stero2 DAC Power"},
1340 {"OUT MIXL", "BST1 Switch", "BST1"},
1341 {"OUT MIXL", "BST2 Switch", "BST2"},
1342 {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
1343 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1344 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1346 {"OUT MIXR", "BST2 Switch", "BST2"},
1347 {"OUT MIXR", "BST1 Switch", "BST1"},
1348 {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
1349 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1350 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1352 {"HPOVOL L", "Switch", "OUT MIXL"},
1353 {"HPOVOL R", "Switch", "OUT MIXR"},
1354 {"OUTVOL L", "Switch", "OUT MIXL"},
1355 {"OUTVOL R", "Switch", "OUT MIXR"},
1357 {"HPOL MIX", "HPO MIX DAC1 Switch", "DAC L1"},
1358 {"HPOL MIX", "HPO MIX HPVOL Switch", "HPOVOL L"},
1359 {"HPOL MIX", NULL, "HP L Amp"},
1360 {"HPOR MIX", "HPO MIX DAC1 Switch", "DAC R1"},
1361 {"HPOR MIX", "HPO MIX HPVOL Switch", "HPOVOL R"},
1362 {"HPOR MIX", NULL, "HP R Amp"},
1364 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1365 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1366 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1367 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1369 {"HP Amp", NULL, "HPOL MIX"},
1370 {"HP Amp", NULL, "HPOR MIX"},
1371 {"HP Amp", NULL, "Amp Power"},
1372 {"HPO L Playback", "Switch", "HP Amp"},
1373 {"HPO R Playback", "Switch", "HP Amp"},
1374 {"HPOL", NULL, "HPO L Playback"},
1375 {"HPOR", NULL, "HPO R Playback"},
1377 {"LOUT L Playback", "Switch", "LOUT MIX"},
1378 {"LOUT R Playback", "Switch", "LOUT MIX"},
1379 {"LOUTL", NULL, "LOUT L Playback"},
1380 {"LOUTL", NULL, "Amp Power"},
1381 {"LOUTR", NULL, "LOUT R Playback"},
1382 {"LOUTR", NULL, "Amp Power"},
1384 {"PDML", NULL, "PDM L Mux"},
1385 {"PDMR", NULL, "PDM R Mux"},
1388 static int rt5651_hw_params(struct snd_pcm_substream *substream,
1389 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1391 struct snd_soc_codec *codec = dai->codec;
1392 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1393 unsigned int val_len = 0, val_clk, mask_clk;
1394 int pre_div, bclk_ms, frame_size;
1396 rt5651->lrck[dai->id] = params_rate(params);
1397 pre_div = rl6231_get_clk_info(rt5651->sysclk, rt5651->lrck[dai->id]);
1400 dev_err(codec->dev, "Unsupported clock setting\n");
1403 frame_size = snd_soc_params_to_frame_size(params);
1404 if (frame_size < 0) {
1405 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1408 bclk_ms = frame_size > 32 ? 1 : 0;
1409 rt5651->bclk[dai->id] = rt5651->lrck[dai->id] * (32 << bclk_ms);
1411 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1412 rt5651->bclk[dai->id], rt5651->lrck[dai->id]);
1413 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1414 bclk_ms, pre_div, dai->id);
1416 switch (params_width(params)) {
1420 val_len |= RT5651_I2S_DL_20;
1423 val_len |= RT5651_I2S_DL_24;
1426 val_len |= RT5651_I2S_DL_8;
1434 mask_clk = RT5651_I2S_PD1_MASK;
1435 val_clk = pre_div << RT5651_I2S_PD1_SFT;
1436 snd_soc_update_bits(codec, RT5651_I2S1_SDP,
1437 RT5651_I2S_DL_MASK, val_len);
1438 snd_soc_update_bits(codec, RT5651_ADDA_CLK1, mask_clk, val_clk);
1441 mask_clk = RT5651_I2S_BCLK_MS2_MASK | RT5651_I2S_PD2_MASK;
1442 val_clk = pre_div << RT5651_I2S_PD2_SFT;
1443 snd_soc_update_bits(codec, RT5651_I2S2_SDP,
1444 RT5651_I2S_DL_MASK, val_len);
1445 snd_soc_update_bits(codec, RT5651_ADDA_CLK1, mask_clk, val_clk);
1448 dev_err(codec->dev, "Wrong dai->id: %d\n", dai->id);
1455 static int rt5651_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1457 struct snd_soc_codec *codec = dai->codec;
1458 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1459 unsigned int reg_val = 0;
1461 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1462 case SND_SOC_DAIFMT_CBM_CFM:
1463 rt5651->master[dai->id] = 1;
1465 case SND_SOC_DAIFMT_CBS_CFS:
1466 reg_val |= RT5651_I2S_MS_S;
1467 rt5651->master[dai->id] = 0;
1473 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1474 case SND_SOC_DAIFMT_NB_NF:
1476 case SND_SOC_DAIFMT_IB_NF:
1477 reg_val |= RT5651_I2S_BP_INV;
1483 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1484 case SND_SOC_DAIFMT_I2S:
1486 case SND_SOC_DAIFMT_LEFT_J:
1487 reg_val |= RT5651_I2S_DF_LEFT;
1489 case SND_SOC_DAIFMT_DSP_A:
1490 reg_val |= RT5651_I2S_DF_PCM_A;
1492 case SND_SOC_DAIFMT_DSP_B:
1493 reg_val |= RT5651_I2S_DF_PCM_B;
1501 snd_soc_update_bits(codec, RT5651_I2S1_SDP,
1502 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK |
1503 RT5651_I2S_DF_MASK, reg_val);
1506 snd_soc_update_bits(codec, RT5651_I2S2_SDP,
1507 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK |
1508 RT5651_I2S_DF_MASK, reg_val);
1511 dev_err(codec->dev, "Wrong dai->id: %d\n", dai->id);
1517 static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai,
1518 int clk_id, unsigned int freq, int dir)
1520 struct snd_soc_codec *codec = dai->codec;
1521 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1522 unsigned int reg_val = 0;
1524 if (freq == rt5651->sysclk && clk_id == rt5651->sysclk_src)
1528 case RT5651_SCLK_S_MCLK:
1529 reg_val |= RT5651_SCLK_SRC_MCLK;
1531 case RT5651_SCLK_S_PLL1:
1532 reg_val |= RT5651_SCLK_SRC_PLL1;
1534 case RT5651_SCLK_S_RCCLK:
1535 reg_val |= RT5651_SCLK_SRC_RCCLK;
1538 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1541 snd_soc_update_bits(codec, RT5651_GLB_CLK,
1542 RT5651_SCLK_SRC_MASK, reg_val);
1543 rt5651->sysclk = freq;
1544 rt5651->sysclk_src = clk_id;
1546 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1551 static int rt5651_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1552 unsigned int freq_in, unsigned int freq_out)
1554 struct snd_soc_codec *codec = dai->codec;
1555 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1556 struct rl6231_pll_code pll_code;
1559 if (source == rt5651->pll_src && freq_in == rt5651->pll_in &&
1560 freq_out == rt5651->pll_out)
1563 if (!freq_in || !freq_out) {
1564 dev_dbg(codec->dev, "PLL disabled\n");
1567 rt5651->pll_out = 0;
1568 snd_soc_update_bits(codec, RT5651_GLB_CLK,
1569 RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_MCLK);
1574 case RT5651_PLL1_S_MCLK:
1575 snd_soc_update_bits(codec, RT5651_GLB_CLK,
1576 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_MCLK);
1578 case RT5651_PLL1_S_BCLK1:
1579 snd_soc_update_bits(codec, RT5651_GLB_CLK,
1580 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK1);
1582 case RT5651_PLL1_S_BCLK2:
1583 snd_soc_update_bits(codec, RT5651_GLB_CLK,
1584 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK2);
1587 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1591 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1593 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1597 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
1598 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1599 pll_code.n_code, pll_code.k_code);
1601 snd_soc_write(codec, RT5651_PLL_CTRL1,
1602 pll_code.n_code << RT5651_PLL_N_SFT | pll_code.k_code);
1603 snd_soc_write(codec, RT5651_PLL_CTRL2,
1604 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5651_PLL_M_SFT |
1605 pll_code.m_bp << RT5651_PLL_M_BP_SFT);
1607 rt5651->pll_in = freq_in;
1608 rt5651->pll_out = freq_out;
1609 rt5651->pll_src = source;
1614 static int rt5651_set_bias_level(struct snd_soc_codec *codec,
1615 enum snd_soc_bias_level level)
1617 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1620 case SND_SOC_BIAS_PREPARE:
1621 if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) {
1622 if (!IS_ERR(rt5651->mclk))
1623 clk_prepare_enable(rt5651->mclk);
1624 snd_soc_update_bits(codec, RT5651_PWR_ANLG1,
1625 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1626 RT5651_PWR_BG | RT5651_PWR_VREF2,
1627 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1628 RT5651_PWR_BG | RT5651_PWR_VREF2);
1629 usleep_range(10000, 15000);
1630 snd_soc_update_bits(codec, RT5651_PWR_ANLG1,
1631 RT5651_PWR_FV1 | RT5651_PWR_FV2,
1632 RT5651_PWR_FV1 | RT5651_PWR_FV2);
1633 snd_soc_update_bits(codec, RT5651_PWR_ANLG1,
1634 RT5651_PWR_LDO_DVO_MASK,
1635 RT5651_PWR_LDO_DVO_1_2V);
1636 snd_soc_update_bits(codec, RT5651_D_MISC, 0x1, 0x1);
1637 if (snd_soc_read(codec, RT5651_PLL_MODE_1) & 0x9200)
1638 snd_soc_update_bits(codec, RT5651_D_MISC,
1643 case SND_SOC_BIAS_STANDBY:
1644 snd_soc_write(codec, RT5651_D_MISC, 0x0010);
1645 snd_soc_write(codec, RT5651_PWR_DIG1, 0x0000);
1646 snd_soc_write(codec, RT5651_PWR_DIG2, 0x0000);
1647 snd_soc_write(codec, RT5651_PWR_VOL, 0x0000);
1648 snd_soc_write(codec, RT5651_PWR_MIXER, 0x0000);
1649 snd_soc_write(codec, RT5651_PWR_ANLG1, 0x0000);
1650 snd_soc_write(codec, RT5651_PWR_ANLG2, 0x0000);
1651 if (SND_SOC_BIAS_PREPARE ==
1652 snd_soc_codec_get_bias_level(codec))
1653 if (!IS_ERR(rt5651->mclk))
1654 clk_disable_unprepare(rt5651->mclk);
1664 static int rt5651_probe(struct snd_soc_codec *codec)
1666 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1668 rt5651->codec = codec;
1669 rt5651->mclk = devm_clk_get(codec->dev, "mclk");
1670 if (PTR_ERR(rt5651->mclk) == -EPROBE_DEFER)
1671 return -EPROBE_DEFER;
1673 snd_soc_update_bits(codec, RT5651_PWR_ANLG1,
1674 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1675 RT5651_PWR_BG | RT5651_PWR_VREF2,
1676 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1677 RT5651_PWR_BG | RT5651_PWR_VREF2);
1678 usleep_range(10000, 15000);
1679 snd_soc_update_bits(codec, RT5651_PWR_ANLG1,
1680 RT5651_PWR_FV1 | RT5651_PWR_FV2,
1681 RT5651_PWR_FV1 | RT5651_PWR_FV2);
1683 snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
1689 static int rt5651_suspend(struct snd_soc_codec *codec)
1691 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1693 regcache_cache_only(rt5651->regmap, true);
1694 regcache_mark_dirty(rt5651->regmap);
1698 static int rt5651_resume(struct snd_soc_codec *codec)
1700 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec);
1702 regcache_cache_only(rt5651->regmap, false);
1703 snd_soc_cache_sync(codec);
1708 #define rt5651_suspend NULL
1709 #define rt5651_resume NULL
1712 #define RT5651_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1713 #define RT5651_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1714 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1716 static const struct snd_soc_dai_ops rt5651_aif_dai_ops = {
1717 .hw_params = rt5651_hw_params,
1718 .set_fmt = rt5651_set_dai_fmt,
1719 .set_sysclk = rt5651_set_dai_sysclk,
1720 .set_pll = rt5651_set_dai_pll,
1723 static struct snd_soc_dai_driver rt5651_dai[] = {
1725 .name = "rt5651-aif1",
1728 .stream_name = "AIF1 Playback",
1731 .rates = RT5651_STEREO_RATES,
1732 .formats = RT5651_FORMATS,
1735 .stream_name = "AIF1 Capture",
1738 .rates = RT5651_STEREO_RATES,
1739 .formats = RT5651_FORMATS,
1741 .ops = &rt5651_aif_dai_ops,
1744 .name = "rt5651-aif2",
1747 .stream_name = "AIF2 Playback",
1750 .rates = RT5651_STEREO_RATES,
1751 .formats = RT5651_FORMATS,
1754 .stream_name = "AIF2 Capture",
1757 .rates = RT5651_STEREO_RATES,
1758 .formats = RT5651_FORMATS,
1760 .ops = &rt5651_aif_dai_ops,
1764 static struct snd_soc_codec_driver soc_codec_dev_rt5651 = {
1765 .probe = rt5651_probe,
1766 .suspend = rt5651_suspend,
1767 .resume = rt5651_resume,
1768 .set_bias_level = rt5651_set_bias_level,
1769 .idle_bias_off = true,
1770 .controls = rt5651_snd_controls,
1771 .num_controls = ARRAY_SIZE(rt5651_snd_controls),
1772 .dapm_widgets = rt5651_dapm_widgets,
1773 .num_dapm_widgets = ARRAY_SIZE(rt5651_dapm_widgets),
1774 .dapm_routes = rt5651_dapm_routes,
1775 .num_dapm_routes = ARRAY_SIZE(rt5651_dapm_routes),
1778 static const struct regmap_config rt5651_regmap = {
1782 .max_register = RT5651_DEVICE_ID + 1 + (ARRAY_SIZE(rt5651_ranges) *
1784 .volatile_reg = rt5651_volatile_register,
1785 .readable_reg = rt5651_readable_register,
1787 .cache_type = REGCACHE_RBTREE,
1788 .reg_defaults = rt5651_reg,
1789 .num_reg_defaults = ARRAY_SIZE(rt5651_reg),
1790 .ranges = rt5651_ranges,
1791 .num_ranges = ARRAY_SIZE(rt5651_ranges),
1794 static const struct i2c_device_id rt5651_i2c_id[] = {
1798 MODULE_DEVICE_TABLE(i2c, rt5651_i2c_id);
1800 static int rt5651_i2c_probe(struct i2c_client *i2c,
1801 const struct i2c_device_id *id)
1803 struct rt5651_platform_data *pdata = dev_get_platdata(&i2c->dev);
1804 struct rt5651_priv *rt5651;
1807 rt5651 = devm_kzalloc(&i2c->dev, sizeof(*rt5651),
1812 i2c_set_clientdata(i2c, rt5651);
1815 rt5651->pdata = *pdata;
1817 rt5651->regmap = devm_regmap_init_i2c(i2c, &rt5651_regmap);
1818 if (IS_ERR(rt5651->regmap)) {
1819 ret = PTR_ERR(rt5651->regmap);
1820 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1825 regmap_read(rt5651->regmap, RT5651_DEVICE_ID, &ret);
1826 if (ret != RT5651_DEVICE_ID_VALUE) {
1828 "Device with ID register %#x is not rt5651\n", ret);
1832 regmap_write(rt5651->regmap, RT5651_RESET, 0);
1834 ret = regmap_register_patch(rt5651->regmap, init_list,
1835 ARRAY_SIZE(init_list));
1837 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1839 if (rt5651->pdata.in2_diff)
1840 regmap_update_bits(rt5651->regmap, RT5651_IN1_IN2,
1841 RT5651_IN_DF2, RT5651_IN_DF2);
1843 if (rt5651->pdata.dmic_en)
1844 regmap_update_bits(rt5651->regmap, RT5651_GPIO_CTRL1,
1845 RT5651_GP2_PIN_MASK, RT5651_GP2_PIN_DMIC1_SCL);
1847 rt5651->hp_mute = 1;
1849 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5651,
1850 rt5651_dai, ARRAY_SIZE(rt5651_dai));
1855 static int rt5651_i2c_remove(struct i2c_client *i2c)
1857 snd_soc_unregister_codec(&i2c->dev);
1862 static const struct of_device_id rt5651_of_match[] = {
1863 { .compatible = "realtek,rt5651", },
1867 static struct i2c_driver rt5651_i2c_driver = {
1870 .of_match_table = rt5651_of_match,
1872 .probe = rt5651_i2c_probe,
1873 .remove = rt5651_i2c_remove,
1874 .id_table = rt5651_i2c_id,
1876 module_i2c_driver(rt5651_i2c_driver);
1878 MODULE_DESCRIPTION("ASoC RT5651 driver");
1879 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1880 MODULE_LICENSE("GPL v2");