Merge tag 'lsk-v3.10-15.05-android' into develop-3.10
[firefly-linux-kernel-4.4.55.git] / include / linux / rockchip / iomap.h
1 #ifndef __MACH_ROCKCHIP_IOMAP_H
2 #define __MACH_ROCKCHIP_IOMAP_H
3
4 #ifndef __ASSEMBLY__
5 #include <asm/io.h>
6 #endif
7
8 #ifdef IOMEM
9 #define RK_IO_ADDRESS(x)                IOMEM(0xFED00000 + x)
10 #else
11 #define RK_IO_ADDRESS(x)                ((void __force __iomem *)(0xFED00000 + x))
12 #endif
13
14 #define RK_CRU_VIRT                     RK_IO_ADDRESS(0x00000000)
15 #define RK_GRF_VIRT                     RK_IO_ADDRESS(0x00010000)
16 #define RK_SGRF_VIRT                    (RK_GRF_VIRT + 0x1000)
17 #define RK_PMU_VIRT                     RK_IO_ADDRESS(0x00020000)
18 #define RK_ROM_VIRT                     RK_IO_ADDRESS(0x00030000)
19 #define RK_EFUSE_VIRT                   RK_IO_ADDRESS(0x00040000)
20 #define RK_GPIO_VIRT(n)                 RK_IO_ADDRESS(0x00050000 + (n) * 0x1000)
21 #define RK_DEBUG_UART_VIRT              RK_IO_ADDRESS(0x00060000)
22 #define RK_CPU_AXI_BUS_VIRT             RK_IO_ADDRESS(0x00070000)
23 #define RK_TIMER_VIRT                   RK_IO_ADDRESS(0x00080000)
24 #define RK_PWM_VIRT                     RK_IO_ADDRESS(0x00088000)
25 #define RK_GIC_VIRT                     RK_IO_ADDRESS(0x00090000)
26 #define RK_BOOTRAM_VIRT                 RK_IO_ADDRESS(0x000a0000)
27 #define RK_DDR_VIRT                     RK_IO_ADDRESS(0x000d0000)
28
29 #define RK3188_CRU_PHYS                 0x20000000
30 #define RK3188_CRU_SIZE                 SZ_4K
31 #define RK3188_GRF_PHYS                 0x20008000
32 #define RK3188_GRF_SIZE                 SZ_4K
33 #define RK3188_PMU_PHYS                 0x20004000
34 #define RK3188_PMU_SIZE                 SZ_4K
35 #define RK3188_ROM_PHYS                 0x10120000
36 #define RK3188_ROM_SIZE                 SZ_16K
37 #define RK3188_EFUSE_PHYS               0x20010000
38 #define RK3188_EFUSE_SIZE               SZ_4K
39 #define RK3188_GPIO0_PHYS               0x2000a000
40 #define RK3188_GPIO1_PHYS               0x2003c000
41 #define RK3188_GPIO2_PHYS               0x2003e000
42 #define RK3188_GPIO3_PHYS               0x20080000
43 #define RK3188_GPIO_SIZE                SZ_4K
44 #define RK3188_CPU_AXI_BUS_PHYS         0x10128000
45 #define RK3188_CPU_AXI_BUS_SIZE         SZ_32K
46 #define RK3188_TIMER0_PHYS              0x20038000
47 #define RK3188_TIMER3_PHYS              0x2000e000
48 #define RK3188_TIMER_SIZE               SZ_4K
49 #define RK3188_DDR_PCTL_PHYS            0x20020000
50 #define RK3188_DDR_PCTL_SIZE            SZ_4K
51 #define RK3188_DDR_PUBL_PHYS            0x20040000
52 #define RK3188_DDR_PUBL_SIZE            SZ_4K
53 #define RK3188_UART0_PHYS               0x10124000
54 #define RK3188_UART1_PHYS               0x10126000
55 #define RK3188_UART2_PHYS               0x20064000
56 #define RK3188_UART3_PHYS               0x20068000
57 #define RK3188_UART_SIZE                SZ_4K
58
59 #define RK3288_CRU_PHYS                 0xFF760000
60 #define RK3288_CRU_SIZE                 SZ_4K
61 #define RK3288_GRF_PHYS                 0xFF770000
62 #define RK3288_GRF_SIZE                 SZ_4K
63 #define RK3288_SGRF_PHYS                0xFF740000
64 #define RK3288_SGRF_SIZE                SZ_4K
65 #define RK3288_PMU_PHYS                 0xFF730000
66 #define RK3288_PMU_SIZE                 SZ_4K
67 #define RK3288_ROM_PHYS                 0xFFFD0000
68 #define RK3288_ROM_SIZE                 (SZ_16K + SZ_4K)
69 #define RK3288_EFUSE_PHYS               0xFFB40000
70 #define RK3288_EFUSE_SIZE               SZ_4K
71 #define RK3288_GPIO0_PHYS               0xFF750000
72 #define RK3288_GPIO1_PHYS               0xFF780000
73 #define RK3288_GPIO2_PHYS               0xFF790000
74 #define RK3288_GPIO3_PHYS               0xFF7A0000
75 #define RK3288_GPIO4_PHYS               0xFF7B0000
76 #define RK3288_GPIO5_PHYS               0xFF7C0000
77 #define RK3288_GPIO6_PHYS               0xFF7D0000
78 #define RK3288_GPIO7_PHYS               0xFF7E0000
79 #define RK3288_GPIO8_PHYS               0xFF7F0000
80 #define RK3288_GPIO_SIZE                SZ_4K
81 #define RK3288_SERVICE_CORE_PHYS        0XFFA80000
82 #define RK3288_SERVICE_CORE_SIZE        SZ_4K
83 #define RK3288_SERVICE_DMAC_PHYS        0XFFA90000
84 #define RK3288_SERVICE_DMAC_SIZE        SZ_4K
85 #define RK3288_SERVICE_GPU_PHYS         0XFFAA0000
86 #define RK3288_SERVICE_GPU_SIZE         SZ_4K
87 #define RK3288_SERVICE_PERI_PHYS        0XFFAB0000
88 #define RK3288_SERVICE_PERI_SIZE        SZ_4K
89 #define RK3288_SERVICE_BUS_PHYS         0XFFAC0000
90 #define RK3288_SERVICE_BUS_SIZE         SZ_16K
91 #define RK3288_SERVICE_VIO_PHYS         0XFFAD0000
92 #define RK3288_SERVICE_VIO_SIZE         SZ_4K
93 #define RK3288_SERVICE_VIDEO_PHYS       0XFFAE0000
94 #define RK3288_SERVICE_VIDEO_SIZE       SZ_4K
95 #define RK3288_SERVICE_HEVC_PHYS        0XFFAF0000
96 #define RK3288_SERVICE_HEVC_SIZE        SZ_4K
97 #define RK3288_TIMER0_PHYS              0xFF6B0000
98 #define RK3288_TIMER6_PHYS              0xFF810000
99 #define RK3288_TIMER_SIZE               SZ_4K
100 #define RK3288_DDR_PCTL0_PHYS           0xFF610000
101 #define RK3288_DDR_PCTL1_PHYS           0xFF630000
102 #define RK3288_DDR_PCTL_SIZE            SZ_4K
103 #define RK3288_DDR_PUBL0_PHYS           0xFF620000
104 #define RK3288_DDR_PUBL1_PHYS           0xFF640000
105 #define RK3288_DDR_PUBL_SIZE            SZ_4K
106 #define RK3288_UART_BT_PHYS             0xFF180000
107 #define RK3288_UART_BB_PHYS             0xFF190000
108 #define RK3288_UART_DBG_PHYS            0xFF690000
109 #define RK3288_UART_GPS_PHYS            0xFF1B0000
110 #define RK3288_UART_EXP_PHYS            0xFF1C0000
111 #define RK3288_UART_SIZE                SZ_4K
112 #define RK3288_GIC_DIST_PHYS            0xFFC01000
113 #define RK3288_GIC_DIST_SIZE            SZ_4K
114 #define RK3288_GIC_CPU_PHYS             0xFFC02000
115 #define RK3288_GIC_CPU_SIZE             SZ_4K
116 #define RK3288_BOOTRAM_PHYS             0xFF720000
117 #define RK3288_BOOTRAM_SIZE             SZ_4K
118 #define RK3288_IMEM_PHYS                0xFF700000
119 #define RK3288_IMEM_SZIE                0x00018000
120
121 #define RK3036_IMEM_PHYS                0x10080000
122 #define RK3036_IMEM_SIZE                SZ_8K
123 #define RK3036_ROM_PHYS                 0x10100000
124 #define RK3036_ROM_SIZE                 SZ_16K
125 #define RK3036_CPU_AXI_BUS_PHYS         0x10128000
126 #define RK3036_CPU_AXI_BUS_SIZE         SZ_32K
127 #define RK3036_GIC_DIST_PHYS            0x10139000
128 #define RK3036_GIC_DIST_SIZE            SZ_4K
129 #define RK3036_GIC_CPU_PHYS             0x1013a000
130 #define RK3036_GIC_CPU_SIZE             SZ_4K
131 #define RK3036_CRU_PHYS                 0x20000000
132 #define RK3036_CRU_SIZE                 SZ_4K
133 #define RK3036_DDR_PCTL_PHYS            0x20004000
134 #define RK3036_DDR_PCTL_SIZE            SZ_4K
135 #define RK3036_GRF_PHYS                 0x20008000
136 #define RK3036_GRF_SIZE                 SZ_4K
137 #define RK3036_DDR_PHY_PHYS             0x2000a000
138 #define RK3036_DDR_PHY_SIZE             SZ_4K
139 #define RK3036_TIMER_PHYS               0x20044000
140 #define RK3036_TIMER_SIZE               SZ_4K
141 #define RK3036_UART0_PHYS               0x20060000
142 #define RK3036_UART1_PHYS               0x20064000
143 #define RK3036_UART2_PHYS               0x20068000
144 #define RK3036_UART_SIZE                SZ_4K
145 #define RK3036_GPIO0_PHYS               0x2007c000
146 #define RK3036_GPIO1_PHYS               0x20080000
147 #define RK3036_GPIO2_PHYS               0x20084000
148 #define RK3036_GPIO_SIZE                SZ_4K
149 #define RK3036_EFUSE_PHYS               0x20090000
150 #define RK3036_EFUSE_SIZE               SZ_4K
151 #define RK3036_PWM_PHYS         0x20050000
152 #define RK3036_PWM_SIZE         SZ_16K
153
154 #define RK312X_IMEM_PHYS                RK3036_IMEM_PHYS
155 #define RK312X_IMEM_SIZE                RK3036_IMEM_SIZE
156 #define RK312X_ROM_PHYS                 RK3036_ROM_PHYS
157 #define RK312X_ROM_SIZE                 RK3036_ROM_SIZE
158 #define RK312X_CPU_AXI_BUS_PHYS         RK3036_CPU_AXI_BUS_PHYS
159 #define RK312X_CPU_AXI_BUS_SIZE         RK3036_CPU_AXI_BUS_SIZE
160 #define RK312X_GIC_DIST_PHYS            RK3036_GIC_DIST_PHYS
161 #define RK312X_GIC_DIST_SIZE            RK3036_GIC_DIST_SIZE
162 #define RK312X_GIC_CPU_PHYS             RK3036_GIC_CPU_PHYS
163 #define RK312X_GIC_CPU_SIZE             RK3036_GIC_CPU_SIZE
164 #define RK312X_CRU_PHYS                 RK3036_CRU_PHYS
165 #define RK312X_CRU_SIZE                 RK3036_CRU_SIZE
166 #define RK312X_DDR_PCTL_PHYS            RK3036_DDR_PCTL_PHYS
167 #define RK312X_DDR_PCTL_SIZE            RK3036_DDR_PCTL_SIZE
168 #define RK312X_GRF_PHYS                 RK3036_GRF_PHYS
169 #define RK312X_GRF_SIZE                 RK3036_GRF_SIZE
170 #define RK312X_DDR_PHY_PHYS             RK3036_DDR_PHY_PHYS
171 #define RK312X_DDR_PHY_SIZE             RK3036_DDR_PHY_SIZE
172 #define RK312X_TIMER_PHYS               RK3036_TIMER_PHYS
173 #define RK312X_TIMER_SIZE               RK3036_TIMER_SIZE
174 #define RK312X_UART0_PHYS               RK3036_UART0_PHYS
175 #define RK312X_UART1_PHYS               RK3036_UART1_PHYS
176 #define RK312X_UART2_PHYS               RK3036_UART2_PHYS
177 #define RK312X_UART_SIZE                RK3036_UART_SIZE
178 #define RK312X_GPIO0_PHYS               RK3036_GPIO0_PHYS
179 #define RK312X_GPIO1_PHYS               RK3036_GPIO1_PHYS
180 #define RK312X_GPIO2_PHYS               RK3036_GPIO2_PHYS
181 #define RK312X_GPIO3_PHYS               0x20088000
182 #define RK312X_GPIO_SIZE                RK3036_GPIO_SIZE
183 #define RK312X_EFUSE_PHYS               RK3036_EFUSE_PHYS
184 #define RK312X_EFUSE_SIZE               RK3036_EFUSE_SIZE
185 #define RK312X_PMU_PHYS                 0x100a0000
186 #define RK312X_PMU_SIZE                 SZ_64K
187 #define RK312X_PWM_PHYS                 0x20050000
188 #define RK312X_PWM_SIZE                 SZ_16K
189
190 #endif