arm: dts: rk3288: add mipi support
[firefly-linux-kernel-4.4.55.git] / drivers / usb / dwc_otg_310 / usbdev_rk3368.c
1 #ifdef CONFIG_ARM64
2 #include "usbdev_rk.h"
3 #include "dwc_otg_regs.h"
4
5 static struct dwc_otg_control_usb *control_usb;
6
7 static u32 uoc_read(u32 reg)
8 {
9         unsigned int val;
10
11         regmap_read(control_usb->grf, reg, &val);
12         return val;
13 }
14
15 static void uoc_write(u32 value, u32 reg)
16 {
17         regmap_write(control_usb->grf, reg, value);
18 }
19
20 #ifdef CONFIG_USB20_OTG
21 static void usb20otg_hw_init(void)
22 {
23         /* Turn off differential receiver in suspend mode */
24         uoc_write(UOC_HIWORD_UPDATE(0, 1, 2), 0x798);
25
26         /* Set disconnect detection trigger point to 625mv */
27         uoc_write(UOC_HIWORD_UPDATE(0x9, 0xf, 11), 0x79c);
28
29         /* other haredware init,include:
30          * DRV_VBUS GPIO init */
31         if (gpio_is_valid(control_usb->otg_gpios->gpio))
32                 gpio_set_value(control_usb->otg_gpios->gpio, 0);
33 }
34
35 static void usb20otg_phy_suspend(void *pdata, int suspend)
36 {
37         struct dwc_otg_platform_data *usbpdata = pdata;
38         if (suspend) {
39                 /* enable soft control */
40                 uoc_write(UOC_HIWORD_UPDATE(0x1d5, 0x1ff, 0), 0x700);
41                 usbpdata->phy_status = 1;
42         } else {
43                 /* exit suspend */
44                 uoc_write(UOC_HIWORD_UPDATE(0x0, 0x1, 0), 0x700);
45                 usbpdata->phy_status = 0;
46         }
47 }
48
49 static void usb20otg_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
50 {
51         struct dwc_otg_platform_data *usbpdata = pdata;
52         struct reset_control *rst_otg_h, *rst_otg_p, *rst_otg_c;
53
54         rst_otg_h = devm_reset_control_get(usbpdata->dev, "otg_ahb");
55         rst_otg_p = devm_reset_control_get(usbpdata->dev, "otg_phy");
56         rst_otg_c = devm_reset_control_get(usbpdata->dev, "otg_controller");
57         if (IS_ERR(rst_otg_h) || IS_ERR(rst_otg_p) || IS_ERR(rst_otg_c)) {
58                 dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
59                 return;
60         }
61
62         switch (rst_type) {
63         case RST_POR:
64                 /* PHY reset */
65                 uoc_write(UOC_HIWORD_UPDATE(0x1, 0x3, 0), 0x700);
66                 reset_control_assert(rst_otg_p);
67                 udelay(15);
68                 uoc_write(UOC_HIWORD_UPDATE(0x2, 0x3, 0), 0x700);
69                 udelay(1500);
70                 reset_control_deassert(rst_otg_p);
71                 udelay(2);
72
73                 /* Controller reset */
74                 reset_control_assert(rst_otg_c);
75                 reset_control_assert(rst_otg_h);
76
77                 udelay(2);
78
79                 reset_control_deassert(rst_otg_c);
80                 reset_control_deassert(rst_otg_h);
81                 break;
82         case RST_CHN_HALT:
83                 /* PHY reset */
84                 uoc_write(UOC_HIWORD_UPDATE(0x1, 0x3, 0), 0x700);
85                 reset_control_assert(rst_otg_p);
86                 udelay(15);
87                 uoc_write(UOC_HIWORD_UPDATE(0x2, 0x3, 0), 0x700);
88                 udelay(1500);
89                 reset_control_deassert(rst_otg_p);
90                 udelay(2);
91                 break;
92         default:
93                 break;
94         }
95 }
96
97 static void usb20otg_clock_init(void *pdata)
98 {
99         struct dwc_otg_platform_data *usbpdata = pdata;
100         struct clk *ahbclk, *phyclk;
101
102         ahbclk = devm_clk_get(usbpdata->dev, "otg");
103         if (IS_ERR(ahbclk)) {
104                 dev_err(usbpdata->dev, "Failed to get otg clk\n");
105                 return;
106         }
107
108         phyclk = devm_clk_get(usbpdata->dev, "sclk_otgphy0");
109         if (IS_ERR(phyclk)) {
110                 dev_err(usbpdata->dev, "Failed to get sclk_otgphy0\n");
111                 return;
112         }
113
114         usbpdata->phyclk = phyclk;
115         usbpdata->ahbclk = ahbclk;
116 }
117
118 static void usb20otg_clock_enable(void *pdata, int enable)
119 {
120         struct dwc_otg_platform_data *usbpdata = pdata;
121
122         if (enable) {
123                 clk_prepare_enable(usbpdata->ahbclk);
124                 clk_prepare_enable(usbpdata->phyclk);
125         } else {
126                 clk_disable_unprepare(usbpdata->ahbclk);
127                 clk_disable_unprepare(usbpdata->phyclk);
128         }
129 }
130
131 static int usb20otg_get_status(int id)
132 {
133         int ret = -1;
134         u32 soc_status15 = uoc_read(control_usb->grf_otg_st_offset);
135
136         switch (id) {
137         case USB_STATUS_BVABLID:
138                 /* bvalid in grf */
139                 ret = soc_status15 & (0x1 << 23);
140                 break;
141         case USB_STATUS_DPDM:
142                 /* dpdm in grf */
143                 ret = soc_status15 & (0x3 << 24);
144                 break;
145         case USB_STATUS_ID:
146                 /* id in grf */
147                 ret = soc_status15 & (0x1 << 26);
148                 break;
149         case USB_CHIP_ID:
150                 ret = control_usb->chip_id;
151                 break;
152         case USB_REMOTE_WAKEUP:
153                 ret = control_usb->remote_wakeup;
154                 break;
155         case USB_IRQ_WAKEUP:
156                 ret = control_usb->usb_irq_wakeup;
157                 break;
158         default:
159                 break;
160         }
161         return ret;
162 }
163
164 #ifdef CONFIG_RK_USB_UART
165 /**
166  *  dwc_otg_uart_enabled - check if a usb-uart bypass func is enabled in DT
167  *
168  *  Returns true if the status property of node "usb_uart" is set to "okay"
169  *  or "ok", if this property is absent it will use the default status "ok"
170  *  0 otherwise
171  */
172 static bool dwc_otg_uart_enabled(void)
173 {
174         return false;
175 }
176
177 static void dwc_otg_uart_mode(void *pdata, int enter_usb_uart_mode)
178 {
179 }
180 #else
181 static void dwc_otg_uart_mode(void *pdata, int enter_usb_uart_mode)
182 {
183 }
184 #endif
185
186 static void usb20otg_power_enable(int enable)
187 {
188         if (0 == enable) {
189                 rk_battery_charger_detect_cb(USB_OTG_POWER_OFF);
190                 /* disable otg_drv power */
191                 if (gpio_is_valid(control_usb->otg_gpios->gpio))
192                         gpio_set_value(control_usb->otg_gpios->gpio, 0);
193         } else if (1 == enable) {
194                 rk_battery_charger_detect_cb(USB_OTG_POWER_ON);
195                 /* enable otg_drv power */
196                 if (gpio_is_valid(control_usb->otg_gpios->gpio))
197                         gpio_set_value(control_usb->otg_gpios->gpio, 1);
198         }
199 }
200
201 struct dwc_otg_platform_data usb20otg_pdata_rk3368 = {
202         .phyclk = NULL,
203         .ahbclk = NULL,
204         .busclk = NULL,
205         .phy_status = 0,
206         .hw_init = usb20otg_hw_init,
207         .phy_suspend = usb20otg_phy_suspend,
208         .soft_reset = usb20otg_soft_reset,
209         .clock_init = usb20otg_clock_init,
210         .clock_enable = usb20otg_clock_enable,
211         .get_status = usb20otg_get_status,
212         .power_enable = usb20otg_power_enable,
213         .dwc_otg_uart_mode = dwc_otg_uart_mode,
214         .bc_detect_cb = rk_battery_charger_detect_cb,
215 };
216 #endif
217
218 #ifdef CONFIG_USB_EHCI_RK
219 static void usb20ehci_hw_init(void)
220 {
221         /* Turn off differential receiver in suspend mode */
222         uoc_write(UOC_HIWORD_UPDATE(0, 1, 2), 0x7b8);
223         /* Set disconnect detection trigger point to 625mv */
224         uoc_write(UOC_HIWORD_UPDATE(0x9, 0xf, 11), 0x7bc);
225
226         /* other haredware init,include:
227          * DRV_VBUS GPIO init */
228         if (gpio_is_valid(control_usb->host_gpios->gpio)) {
229                 if (!gpio_get_value(control_usb->host_gpios->gpio))
230                         gpio_set_value(control_usb->host_gpios->gpio, 1);
231         }
232 }
233
234 static void usb20ehci_phy_suspend(void *pdata, int suspend)
235 {
236         struct rkehci_platform_data *usbpdata = pdata;
237
238         if (suspend) {
239                 /* enable soft control */
240                 uoc_write(UOC_HIWORD_UPDATE(0x1d5, 0x1ff, 0), 0x728);
241                 usbpdata->phy_status = 1;
242         } else {
243                 /* exit suspend */
244                 uoc_write(UOC_HIWORD_UPDATE(0x0, 0x1, 0), 0x728);
245                 usbpdata->phy_status = 0;
246         }
247 }
248
249 static void usb20ehci_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
250 {
251         struct rkehci_platform_data *usbpdata = pdata;
252         struct reset_control *rst_host_h, *rst_host_p, *rst_host_c;
253
254         rst_host_h = devm_reset_control_get(usbpdata->dev, "host_ahb");
255         rst_host_p = devm_reset_control_get(usbpdata->dev, "host_phy");
256         rst_host_c = devm_reset_control_get(usbpdata->dev, "host_controller");
257         if (IS_ERR(rst_host_h) || IS_ERR(rst_host_p) || IS_ERR(rst_host_c)) {
258                 dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
259                 return;
260         }
261
262         switch (rst_type) {
263         case RST_POR:
264                 /* PHY reset */
265                 uoc_write(UOC_HIWORD_UPDATE(0x1, 0x3, 0), 0x728);
266                 reset_control_assert(rst_host_p);
267                 udelay(15);
268                 uoc_write(UOC_HIWORD_UPDATE(0x2, 0x3, 0), 0x728);
269
270                 udelay(1500);
271                 reset_control_deassert(rst_host_p);
272
273                 /* Controller reset */
274                 reset_control_assert(rst_host_c);
275                 reset_control_assert(rst_host_h);
276
277                 udelay(5);
278
279                 reset_control_deassert(rst_host_c);
280                 reset_control_deassert(rst_host_h);
281                 break;
282
283         default:
284                 break;
285         }
286 }
287
288 static void usb20ehci_clock_init(void *pdata)
289 {
290 }
291
292 static void usb20ehci_clock_enable(void *pdata, int enable)
293 {
294 }
295
296 static int usb20ehci_get_status(int id)
297 {
298         /* For HOST port in rk336x can not get any info from GRF */
299         return -ENOENT;
300 }
301
302 struct rkehci_platform_data usb20ehci_pdata_rk3368 = {
303         .phyclk = NULL,
304         .ahbclk = NULL,
305         .phy_status = 0,
306         .hw_init = usb20ehci_hw_init,
307         .phy_suspend = usb20ehci_phy_suspend,
308         .soft_reset = usb20ehci_soft_reset,
309         .clock_init = usb20ehci_clock_init,
310         .clock_enable = usb20ehci_clock_enable,
311         .get_status = usb20ehci_get_status,
312 };
313 #endif
314
315 struct dwc_otg_platform_data usb20ohci_pdata_rk3368;
316
317 #ifdef CONFIG_OF
318 static const struct of_device_id rk_usb_control_id_table[] = {
319         {
320          .compatible = "rockchip,rk3368-usb-control",
321          },
322         {},
323 };
324 #endif
325 /*********************************************************************
326                         rk3126 usb detections
327 *********************************************************************/
328
329 #define WAKE_LOCK_TIMEOUT (HZ * 10)
330 static inline void do_wakeup(struct work_struct *work)
331 {
332         /* wake up the system */
333         rk_send_wakeup_key();
334 }
335
336 static void usb_battery_charger_detect_work(struct work_struct *work)
337 {
338         rk_battery_charger_detect_cb(usb_battery_charger_detect(1));
339 }
340
341 /********** handler for bvalid irq **********/
342 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
343 {
344         /* clear irq */
345         uoc_write(UOC_HIWORD_UPDATE(0x1, 0x1, 3), 0x6a0);
346 #ifdef CONFIG_RK_USB_UART
347         /* usb otg dp/dm switch to usb phy */
348         dwc_otg_uart_mode(NULL, PHY_USB_MODE);
349 #endif
350
351         if (control_usb->usb_irq_wakeup) {
352                 wake_lock_timeout(&control_usb->usb_wakelock,
353                                   WAKE_LOCK_TIMEOUT);
354                 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
355                                       HZ / 10);
356         }
357
358         schedule_delayed_work(&control_usb->usb_charger_det_work, HZ / 10);
359
360         return IRQ_HANDLED;
361 }
362
363 /************* register usb detection irqs **************/
364 static int otg_irq_detect_init(struct platform_device *pdev)
365 {
366         int ret = 0;
367         int irq = 0;
368
369         wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND,
370                        "usb_detect");
371         INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
372
373         /*register otg_bvalid irq */
374         irq = platform_get_irq_byname(pdev, "otg_bvalid");
375         if ((irq > 0) && control_usb->usb_irq_wakeup) {
376                 ret = request_irq(irq, bvalid_irq_handler,
377                                   0, "otg_bvalid", NULL);
378                 if (ret < 0) {
379                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
380                 } else {
381                         /* enable bvalid irq  */
382                         uoc_write(UOC_HIWORD_UPDATE(0x1, 0x1, 3), 0x680);
383                 }
384         }
385
386         return 0;
387 }
388
389 /********** end of usb detections **********/
390 #ifdef CONFIG_OF
391 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
392         {
393          .compatible = "rockchip,rk3368-dwc-control-usb",
394          },
395         {},
396 };
397 #endif
398 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
399 {
400         struct device *dev = &pdev->dev;
401         struct device_node *np = dev->of_node;
402         struct clk *hclk_usb_peri;
403         struct regmap *grf;
404         int gpio, ret = 0;
405         u32 offset;
406
407         control_usb = devm_kzalloc(dev, sizeof(*control_usb), GFP_KERNEL);
408         if (!control_usb) {
409                 dev_err(&pdev->dev, "Unable to alloc memory for control usb\n");
410                 return -ENOMEM;
411         }
412
413         /* Init regmap GRF */
414         grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
415         if (IS_ERR(grf)) {
416                 dev_err(&pdev->dev, "Missing rockchip,grf property\n");
417                 return PTR_ERR(grf);
418         }
419         control_usb->grf = grf;
420
421         /* get the reg offset of GRF_SOC_STATUS for USB2.0 OTG */
422         if (of_property_read_u32(np, "grf-offset", &offset)) {
423                 dev_err(&pdev->dev, "missing reg property in node %s\n",
424                         np->name);
425                 return -EINVAL;
426         }
427         control_usb->grf_otg_st_offset = offset;
428
429         /* Init Vbus-drv GPIOs */
430         control_usb->host_gpios =
431             devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
432         if (!control_usb->host_gpios) {
433                 dev_err(&pdev->dev, "Unable to alloc memory for host_gpios\n");
434                 return -ENOMEM;
435         }
436
437         gpio = of_get_named_gpio(np, "host_drv_gpio", 0);
438         control_usb->host_gpios->gpio = gpio;
439
440         if (gpio_is_valid(gpio)) {
441                 if (devm_gpio_request(&pdev->dev, gpio, "usb_host_drv")) {
442                         dev_err(&pdev->dev,
443                                 "Failed to request GPIO%d for host_drv\n",
444                                 gpio);
445                         return -EINVAL;
446                 }
447                 gpio_direction_output(control_usb->host_gpios->gpio, 1);
448         }
449
450         control_usb->otg_gpios =
451             devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
452         if (!control_usb->otg_gpios) {
453                 dev_err(&pdev->dev, "Unable to alloc memory for otg_gpios\n");
454                 return -ENOMEM;
455         }
456
457         gpio = of_get_named_gpio(np, "otg_drv_gpio", 0);
458         control_usb->otg_gpios->gpio = gpio;
459
460         if (gpio_is_valid(gpio)) {
461                 if (devm_gpio_request(&pdev->dev, gpio, "usb_otg_drv")) {
462                         dev_err(&pdev->dev,
463                                 "failed to request GPIO%d for otg_drv\n", gpio);
464                         return -EINVAL;
465                 }
466                 gpio_direction_output(control_usb->otg_gpios->gpio, 0);
467         }
468
469
470         control_usb->remote_wakeup = of_property_read_bool(np,
471                                                            "rockchip,remote_wakeup");
472         control_usb->usb_irq_wakeup = of_property_read_bool(np,
473                                                             "rockchip,usb_irq_wakeup");
474
475         /* Init hclk_usb_peri */
476         hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
477         if (IS_ERR(hclk_usb_peri)) {
478                 dev_info(&pdev->dev, "no hclk_usb_peri clk specified\n");
479                 hclk_usb_peri = NULL;
480         }
481         control_usb->hclk_usb_peri = hclk_usb_peri;
482         clk_prepare_enable(hclk_usb_peri);
483
484 #ifdef CONFIG_USB20_OTG
485         INIT_DELAYED_WORK(&control_usb->usb_charger_det_work,
486                           usb_battery_charger_detect_work);
487
488         if (usb20otg_get_status(USB_STATUS_BVABLID))
489                 schedule_delayed_work(&control_usb->usb_charger_det_work,
490                                       HZ / 10);
491 #endif
492
493         ret = otg_irq_detect_init(pdev);
494         if (ret < 0)
495                 goto err;
496
497         return 0;
498
499 err:
500         clk_disable_unprepare(hclk_usb_peri);
501         return ret;
502 }
503
504 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
505 {
506         clk_disable_unprepare(control_usb->hclk_usb_peri);
507         return 0;
508 }
509
510 static struct platform_driver dwc_otg_control_usb_driver = {
511         .probe = dwc_otg_control_usb_probe,
512         .remove = dwc_otg_control_usb_remove,
513         .driver = {
514                    .name = "rk3368-dwc-control-usb",
515                    .owner = THIS_MODULE,
516                    .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
517                    },
518 };
519
520 static int __init dwc_otg_control_usb_init(void)
521 {
522         int retval = 0;
523
524         retval |= platform_driver_register(&dwc_otg_control_usb_driver);
525         return retval;
526 }
527
528 subsys_initcall(dwc_otg_control_usb_init);
529
530 static void __exit dwc_otg_control_usb_exit(void)
531 {
532         platform_driver_unregister(&dwc_otg_control_usb_driver);
533 }
534
535 module_exit(dwc_otg_control_usb_exit);
536 MODULE_ALIAS("platform: dwc_control_usb");
537 MODULE_AUTHOR("RockChip Inc.");
538 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
539 MODULE_LICENSE("GPL v2");
540 #endif