3 #include "usbdev_grf_regs.h"
4 #include "dwc_otg_regs.h"
5 static struct dwc_otg_control_usb *control_usb;
7 #ifdef CONFIG_USB20_OTG
8 static void usb20otg_hw_init(void)
10 #ifndef CONFIG_USB20_HOST
11 /* enable soft control */
12 control_usb->grf_uoc2_base->CON2 = (0x01 << 2) | ((0x01 << 2) << 16);
14 control_usb->grf_uoc2_base->CON3 = 0x2A | (0x3F << 16);
16 /* usb phy config init
17 * usb phy enter usb mode */
18 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
20 /* other haredware init,include:
21 * DRV_VBUS GPIO init */
22 if (gpio_is_valid(control_usb->otg_gpios->gpio)) {
23 if (gpio_get_value(control_usb->otg_gpios->gpio))
24 gpio_set_value(control_usb->otg_gpios->gpio, 0);
28 static void usb20otg_phy_suspend(void *pdata, int suspend)
30 struct dwc_otg_platform_data *usbpdata = pdata;
33 /* enable soft control */
34 control_usb->grf_uoc0_base->CON2 =
35 (0x01 << 2) | ((0x01 << 2) << 16);
37 control_usb->grf_uoc0_base->CON3 = 0x2A | (0x3F << 16);
38 usbpdata->phy_status = 1;
41 control_usb->grf_uoc0_base->CON2 = ((0x01 << 2) << 16);
42 usbpdata->phy_status = 0;
46 static void usb20otg_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
48 struct dwc_otg_platform_data *usbpdata = pdata;
49 struct reset_control *rst_otg_h, *rst_otg_p, *rst_otg_c;
51 rst_otg_h = devm_reset_control_get(usbpdata->dev, "otg_ahb");
52 rst_otg_p = devm_reset_control_get(usbpdata->dev, "otg_phy");
53 rst_otg_c = devm_reset_control_get(usbpdata->dev, "otg_controller");
54 if (IS_ERR(rst_otg_h) || IS_ERR(rst_otg_p) || IS_ERR(rst_otg_c)) {
55 dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
59 reset_control_assert(rst_otg_h);
60 reset_control_assert(rst_otg_p);
61 reset_control_assert(rst_otg_c);
63 reset_control_deassert(rst_otg_h);
64 reset_control_deassert(rst_otg_p);
65 reset_control_deassert(rst_otg_c);
69 static void usb20otg_clock_init(void *pdata)
71 struct dwc_otg_platform_data *usbpdata = pdata;
72 struct clk *ahbclk, *phyclk;
74 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb0");
76 dev_err(usbpdata->dev, "Failed to get hclk_usb0\n");
80 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy0");
82 dev_err(usbpdata->dev, "Failed to get clk_usbphy0\n");
86 usbpdata->phyclk = phyclk;
87 usbpdata->ahbclk = ahbclk;
90 static void usb20otg_clock_enable(void *pdata, int enable)
92 struct dwc_otg_platform_data *usbpdata = pdata;
95 clk_prepare_enable(usbpdata->ahbclk);
96 clk_prepare_enable(usbpdata->phyclk);
98 clk_disable_unprepare(usbpdata->ahbclk);
99 clk_disable_unprepare(usbpdata->phyclk);
103 static int usb20otg_get_status(int id)
108 case USB_STATUS_BVABLID:
110 ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
112 case USB_STATUS_DPDM:
114 ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
118 ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
121 ret = control_usb->chip_id;
123 case USB_REMOTE_WAKEUP:
124 ret = control_usb->remote_wakeup;
127 ret = control_usb->usb_irq_wakeup;
136 #ifdef CONFIG_RK_USB_UART
138 * dwc_otg_uart_enabled - check if a usb-uart bypass func is enabled in DT
140 * Returns true if the status property of node "usb_uart" is set to "okay"
141 * or "ok", if this property is absent it will use the default status "ok"
144 static bool dwc_otg_uart_enabled(void)
146 struct device_node *np;
148 np = of_find_node_by_name(NULL, "usb_uart");
149 if (np && of_device_is_available(np))
155 static void dwc_otg_uart_mode(void *pdata, int enter_usb_uart_mode)
157 if ((1 == enter_usb_uart_mode) && dwc_otg_uart_enabled()) {
158 /* bypass dm, enter uart mode */
159 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
161 } else if (0 == enter_usb_uart_mode) {
163 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
167 static void dwc_otg_uart_mode(void *pdata, int enter_usb_uart_mode)
172 static void usb20otg_power_enable(int enable)
175 /* disable otg_drv power */
176 if (gpio_is_valid(control_usb->otg_gpios->gpio))
177 gpio_set_value(control_usb->otg_gpios->gpio, 0);
178 } else if (1 == enable) {
179 /* enable otg_drv power */
180 if (gpio_is_valid(control_usb->otg_gpios->gpio))
181 gpio_set_value(control_usb->otg_gpios->gpio, 1);
185 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
190 .hw_init = usb20otg_hw_init,
191 .phy_suspend = usb20otg_phy_suspend,
192 .soft_reset = usb20otg_soft_reset,
193 .clock_init = usb20otg_clock_init,
194 .clock_enable = usb20otg_clock_enable,
195 .get_status = usb20otg_get_status,
196 .power_enable = usb20otg_power_enable,
197 .dwc_otg_uart_mode = dwc_otg_uart_mode,
198 .bc_detect_cb = rk_battery_charger_detect_cb,
203 #ifdef CONFIG_USB20_HOST
205 static void usb20host_hw_init(void)
207 /* usb phy config init
208 * set common_on = 0, in suspend mode, host1 PLL blocks remain powered.
209 * for RK3288, hsic and other modules use host1 (DWC_OTG) 480M phy clk.
211 control_usb->grf_uoc2_base->CON0 = (1 << 16) | 0;
213 /* other haredware init,include:
214 * DRV_VBUS GPIO init */
215 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
216 if (!gpio_get_value(control_usb->host_gpios->gpio))
217 gpio_set_value(control_usb->host_gpios->gpio, 1);
221 static void usb20host_phy_suspend(void *pdata, int suspend)
223 struct dwc_otg_platform_data *usbpdata = pdata;
226 /* enable soft control */
227 control_usb->grf_uoc2_base->CON2 =
228 (0x01 << 2) | ((0x01 << 2) << 16);
230 control_usb->grf_uoc2_base->CON3 = 0x2A | (0x3F << 16);
231 usbpdata->phy_status = 1;
234 control_usb->grf_uoc2_base->CON2 = ((0x01 << 2) << 16);
235 usbpdata->phy_status = 0;
239 static void usb20host_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
241 struct dwc_otg_platform_data *usbpdata = pdata;
242 struct reset_control *rst_host1_h, *rst_host1_p, *rst_host1_c;
244 rst_host1_h = devm_reset_control_get(usbpdata->dev, "host1_ahb");
245 rst_host1_p = devm_reset_control_get(usbpdata->dev, "host1_phy");
246 rst_host1_c = devm_reset_control_get(usbpdata->dev, "host1_controller");
247 if (IS_ERR(rst_host1_h) || IS_ERR(rst_host1_p) || IS_ERR(rst_host1_c)) {
248 dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
252 reset_control_assert(rst_host1_h);
253 reset_control_assert(rst_host1_p);
254 reset_control_assert(rst_host1_c);
256 reset_control_deassert(rst_host1_h);
257 reset_control_deassert(rst_host1_p);
258 reset_control_deassert(rst_host1_c);
262 static void usb20host_clock_init(void *pdata)
264 struct dwc_otg_platform_data *usbpdata = pdata;
265 struct clk *ahbclk, *phyclk, *phyclk_480m;
267 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb1");
268 if (IS_ERR(ahbclk)) {
269 dev_err(usbpdata->dev, "Failed to get hclk_usb1\n");
273 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy1");
274 if (IS_ERR(phyclk)) {
275 dev_err(usbpdata->dev, "Failed to get clk_usbphy1\n");
279 phyclk_480m = devm_clk_get(usbpdata->dev, "usbphy_480m");
280 if (IS_ERR(phyclk_480m)) {
281 dev_err(usbpdata->dev, "Failed to get usbphy_480m\n");
285 usbpdata->phyclk = phyclk;
286 usbpdata->ahbclk = ahbclk;
287 usbpdata->phyclk_480m = phyclk_480m;
290 static void usb20host_clock_enable(void *pdata, int enable)
292 struct dwc_otg_platform_data *usbpdata = pdata;
295 clk_prepare_enable(usbpdata->ahbclk);
296 clk_prepare_enable(usbpdata->phyclk);
298 clk_disable_unprepare(usbpdata->ahbclk);
299 clk_disable_unprepare(usbpdata->phyclk);
303 static int usb20host_get_status(int id)
308 case USB_STATUS_BVABLID:
310 ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;
312 case USB_STATUS_DPDM:
314 ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
318 ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
321 ret = control_usb->chip_id;
323 case USB_REMOTE_WAKEUP:
324 ret = control_usb->remote_wakeup;
327 ret = control_usb->usb_irq_wakeup;
336 static void usb20host_power_enable(int enable)
339 /* disable host_drv power */
340 if (gpio_is_valid(control_usb->host_gpios->gpio))
341 gpio_set_value(control_usb->host_gpios->gpio, 0);
342 } else if (1 == enable) {
343 /* enable host_drv power */
344 if (gpio_is_valid(control_usb->host_gpios->gpio))
345 gpio_set_value(control_usb->host_gpios->gpio, 1);
349 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
354 .hw_init = usb20host_hw_init,
355 .phy_suspend = usb20host_phy_suspend,
356 .soft_reset = usb20host_soft_reset,
357 .clock_init = usb20host_clock_init,
358 .clock_enable = usb20host_clock_enable,
359 .get_status = usb20host_get_status,
360 .power_enable = usb20host_power_enable,
365 #ifdef CONFIG_USB_EHCI_RKHSIC
366 static void rk_hsic_hw_init(void)
368 /* usb phy config init
369 * hsic phy config init, set hsicphy_txsrtune */
370 control_usb->grf_uoc3_base->CON0 = ((0xf << 6) << 16) | (0xf << 6);
372 /* other haredware init
373 * set common_on = 0, in suspend mode,
374 * otg/host PLL blocks remain powered
375 * for RK3288, use host1 (DWC_OTG) 480M phy clk
377 control_usb->grf_uoc2_base->CON0 = (1 << 16) | 0;
379 /* change INCR to INCR16 or INCR8(beats less than 16)
380 * or INCR4(beats less than 8) or SINGLE(beats less than 4)
382 control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
385 static void rk_hsic_clock_init(void *pdata)
387 /* By default, hsicphy_480m's parent is otg phy 480MHz clk
388 * rk3188 must use host phy 480MHz clk, because if otg bypass
389 * to uart mode, otg phy 480MHz clk will be closed automatically
391 struct rkehci_platform_data *usbpdata = pdata;
392 struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic;
394 phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_480m");
395 if (IS_ERR(phyclk480m_hsic)) {
396 dev_err(usbpdata->dev, "Failed to get hsicphy_480m\n");
400 phyclk12m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_12m");
401 if (IS_ERR(phyclk12m_hsic)) {
402 dev_err(usbpdata->dev, "Failed to get hsicphy_12m\n");
406 ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
407 if (IS_ERR(ahbclk)) {
408 dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
412 usbpdata->hclk_hsic = ahbclk;
413 usbpdata->hsic_phy_480m = phyclk480m_hsic;
414 usbpdata->hsic_phy_12m = phyclk12m_hsic;
417 static void rk_hsic_clock_enable(void *pdata, int enable)
419 struct rkehci_platform_data *usbpdata = pdata;
421 if (enable == usbpdata->clk_status)
424 clk_prepare_enable(usbpdata->hclk_hsic);
425 clk_prepare_enable(usbpdata->hsic_phy_480m);
426 clk_prepare_enable(usbpdata->hsic_phy_12m);
427 usbpdata->clk_status = 1;
429 clk_disable_unprepare(usbpdata->hclk_hsic);
430 clk_disable_unprepare(usbpdata->hsic_phy_480m);
431 clk_disable_unprepare(usbpdata->hsic_phy_12m);
432 usbpdata->clk_status = 0;
436 static void rk_hsic_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
438 struct rkehci_platform_data *usbpdata = pdata;
439 struct reset_control *rst_hsic_h, *rst_hsic_a, *rst_hsic_p;
441 rst_hsic_h = devm_reset_control_get(usbpdata->dev, "hsic_ahb");
442 rst_hsic_a = devm_reset_control_get(usbpdata->dev, "hsic_aux");
443 rst_hsic_p = devm_reset_control_get(usbpdata->dev, "hsic_phy");
445 reset_control_assert(rst_hsic_h);
446 reset_control_assert(rst_hsic_a);
447 reset_control_assert(rst_hsic_p);
449 reset_control_deassert(rst_hsic_h);
450 reset_control_deassert(rst_hsic_a);
451 reset_control_deassert(rst_hsic_p);
454 /* HSIC per-port reset */
455 control_usb->grf_uoc3_base->CON0 = ((1 << 10) << 16) | (1 << 10);
457 control_usb->grf_uoc3_base->CON0 = ((1 << 10) << 16) | (0 << 10);
461 struct rkehci_platform_data rkhsic_pdata_rk3288 = {
463 .hsic_phy_12m = NULL,
464 .hsic_phy_480m = NULL,
466 .hw_init = rk_hsic_hw_init,
467 .clock_init = rk_hsic_clock_init,
468 .clock_enable = rk_hsic_clock_enable,
469 .soft_reset = rk_hsic_soft_reset,
473 #ifdef CONFIG_USB_EHCI_RK
474 static void rk_ehci_hw_init(void)
476 /* usb phy config init */
478 /* DRV_VBUS GPIO init */
479 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
480 if (!gpio_get_value(control_usb->host_gpios->gpio))
481 gpio_set_value(control_usb->host_gpios->gpio, 1);
485 static void rk_ehci_phy_suspend(void *pdata, int suspend)
487 struct rkehci_platform_data *usbpdata = pdata;
490 /* enable soft control */
491 control_usb->grf_uoc1_base->CON2 =
492 (0x01 << 2) | ((0x01 << 2) << 16);
494 control_usb->grf_uoc1_base->CON3 = 0x2A | (0x3F << 16);
495 usbpdata->phy_status = 1;
498 control_usb->grf_uoc1_base->CON2 = ((0x01 << 2) << 16);
499 usbpdata->phy_status = 0;
503 static void rk_ehci_clock_init(void *pdata)
505 struct rkehci_platform_data *usbpdata = pdata;
506 struct clk *ahbclk, *phyclk;
508 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb2");
509 if (IS_ERR(ahbclk)) {
510 dev_err(usbpdata->dev, "Failed to get hclk_usb2\n");
514 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy2");
515 if (IS_ERR(phyclk)) {
516 dev_err(usbpdata->dev, "Failed to get clk_usbphy2\n");
520 usbpdata->phyclk = phyclk;
521 usbpdata->ahbclk = ahbclk;
524 static void rk_ehci_clock_enable(void *pdata, int enable)
526 struct rkehci_platform_data *usbpdata = pdata;
528 if (enable == usbpdata->clk_status)
531 clk_prepare_enable(usbpdata->ahbclk);
532 clk_prepare_enable(usbpdata->phyclk);
533 usbpdata->clk_status = 1;
535 clk_disable_unprepare(usbpdata->ahbclk);
536 clk_disable_unprepare(usbpdata->phyclk);
537 usbpdata->clk_status = 0;
541 static void rk_ehci_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
543 struct rkehci_platform_data *usbpdata = pdata;
544 struct reset_control *rst_host0_h, *rst_host0_p,
545 *rst_host0_c , *rst_host0;
547 rst_host0_h = devm_reset_control_get(usbpdata->dev, "ehci_ahb");
548 rst_host0_p = devm_reset_control_get(usbpdata->dev, "ehci_phy");
549 rst_host0_c = devm_reset_control_get(usbpdata->dev, "ehci_controller");
550 rst_host0 = devm_reset_control_get(usbpdata->dev, "ehci");
551 if (IS_ERR(rst_host0_h) || IS_ERR(rst_host0_p) ||
552 IS_ERR(rst_host0_c) || IS_ERR(rst_host0)) {
553 dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
557 reset_control_assert(rst_host0_h);
558 reset_control_assert(rst_host0_p);
559 reset_control_assert(rst_host0_c);
560 reset_control_assert(rst_host0);
562 reset_control_deassert(rst_host0_h);
563 reset_control_deassert(rst_host0_p);
564 reset_control_deassert(rst_host0_c);
565 reset_control_deassert(rst_host0);
569 static int rk_ehci_get_status(int id)
574 case USB_STATUS_DPDM:
576 ret = control_usb->grf_soc_status2_rk3288->host0_linestate;
579 ret = control_usb->chip_id;
581 case USB_REMOTE_WAKEUP:
582 ret = control_usb->remote_wakeup;
585 ret = control_usb->usb_irq_wakeup;
594 struct rkehci_platform_data rkehci_pdata_rk3288 = {
599 .hw_init = rk_ehci_hw_init,
600 .phy_suspend = rk_ehci_phy_suspend,
601 .clock_init = rk_ehci_clock_init,
602 .clock_enable = rk_ehci_clock_enable,
603 .soft_reset = rk_ehci_soft_reset,
604 .get_status = rk_ehci_get_status,
608 #ifdef CONFIG_USB_OHCI_HCD_RK
609 static void rk_ohci_hw_init(void)
611 /* usb phy config init */
613 /* DRV_VBUS GPIO init */
614 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
615 if (!gpio_get_value(control_usb->host_gpios->gpio))
616 gpio_set_value(control_usb->host_gpios->gpio, 1);
620 static void rk_ohci_clock_init(void *pdata)
622 struct rkehci_platform_data *usbpdata = pdata;
623 struct clk *ahbclk, *phyclk;
625 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb3");
626 if (IS_ERR(ahbclk)) {
627 dev_err(usbpdata->dev, "Failed to get hclk_usb3\n");
631 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy3");
632 if (IS_ERR(phyclk)) {
633 dev_err(usbpdata->dev, "Failed to get clk_usbphy3\n");
637 usbpdata->phyclk = phyclk;
638 usbpdata->ahbclk = ahbclk;
641 static void rk_ohci_clock_enable(void *pdata, int enable)
643 struct rkehci_platform_data *usbpdata = pdata;
645 if (enable == usbpdata->clk_status)
648 clk_prepare_enable(usbpdata->ahbclk);
649 clk_prepare_enable(usbpdata->phyclk);
650 usbpdata->clk_status = 1;
652 clk_disable_unprepare(usbpdata->ahbclk);
653 clk_disable_unprepare(usbpdata->phyclk);
654 usbpdata->clk_status = 0;
658 static void rk_ohci_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
662 struct rkehci_platform_data rkohci_pdata_rk3288 = {
666 .hw_init = rk_ohci_hw_init,
667 .clock_init = rk_ohci_clock_init,
668 .clock_enable = rk_ohci_clock_enable,
669 .soft_reset = rk_ohci_soft_reset,
673 /*********************************************************************
674 rk3288 usb detections
675 *********************************************************************/
677 #define WAKE_LOCK_TIMEOUT (HZ * 10)
678 static inline void do_wakeup(struct work_struct *work)
680 /* wake up the system */
681 rk_send_wakeup_key();
684 static void usb_battery_charger_detect_work(struct work_struct *work)
686 rk_battery_charger_detect_cb(usb_battery_charger_detect(1));
689 /********** handler for bvalid irq **********/
690 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
693 control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
695 /* usb otg dp/dm switch to usb phy */
696 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
698 if (control_usb->usb_irq_wakeup) {
699 wake_lock_timeout(&control_usb->usb_wakelock,
701 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
704 schedule_delayed_work(&control_usb->usb_charger_det_work, HZ / 10);
709 /***** handler for otg id rise and fall edge *****/
710 static irqreturn_t id_irq_handler(int irq, void *dev_id)
712 unsigned int uoc_con;
715 uoc_con = control_usb->grf_uoc0_base->CON4;
718 if (uoc_con & (1 << 5)) {
719 /* clear id rise irq pandding */
720 control_usb->grf_uoc0_base->CON4 = ((1 << 5) | (1 << 21));
724 if (uoc_con & (1 << 7)) {
725 /* usb otg dp/dm switch to usb phy */
726 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
727 /* clear id fall irq pandding */
728 control_usb->grf_uoc0_base->CON4 = ((1 << 7) | (1 << 23));
731 if (control_usb->usb_irq_wakeup) {
732 wake_lock_timeout(&control_usb->usb_wakelock,
734 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
741 #ifdef USB_LINESTATE_IRQ
742 /***** handler for usb line status change *****/
744 static irqreturn_t line_irq_handler(int irq, void *dev_id)
748 if (control_usb->grf_uoc0_base->CON0 & 1 << 15)
749 control_usb->grf_uoc0_base->CON0 = (1 << 15 | 1 << 31);
751 if (control_usb->grf_uoc1_base->CON0 & 1 << 15)
752 control_usb->grf_uoc1_base->CON0 = (1 << 15 | 1 << 31);
754 if (control_usb->grf_uoc2_base->CON0 & 1 << 15)
755 control_usb->grf_uoc2_base->CON0 = (1 << 15 | 1 << 31);
757 if (control_usb->usb_irq_wakeup) {
758 wake_lock_timeout(&control_usb->usb_wakelock,
760 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
768 /************* register usb detection irqs **************/
769 static int otg_irq_detect_init(struct platform_device *pdev)
773 if (control_usb->usb_irq_wakeup) {
774 wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND,
776 INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
779 /*register otg_bvalid irq */
780 irq = platform_get_irq_byname(pdev, "otg_bvalid");
781 if ((irq > 0) && control_usb->usb_irq_wakeup) {
782 ret = request_irq(irq, bvalid_irq_handler,
783 0, "otg_bvalid", NULL);
785 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
787 /* enable bvalid irq */
788 control_usb->grf_uoc0_base->CON4 = 0x000c000c;
792 /*register otg_id irq */
793 irq = platform_get_irq_byname(pdev, "otg_id");
794 if ((irq > 0) && control_usb->usb_irq_wakeup) {
795 ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL);
797 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
799 /* enable otg_id irq */
800 control_usb->grf_uoc0_base->CON4 = 0x00f000f0;
804 /*register otg_linestate irq */
805 irq = platform_get_irq_byname(pdev, "otg_linestate");
808 request_irq(irq, line_irq_handler, 0, "otg_linestate",
811 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
814 control_usb->grf_uoc0_base->CON0 = 0xc000c000;
815 if (control_usb->usb_irq_wakeup)
816 enable_irq_wake(irq);
820 /*register host0_linestate irq */
821 irq = platform_get_irq_byname(pdev, "host0_linestate");
824 request_irq(irq, line_irq_handler, 0, "host0_linestate",
827 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
830 control_usb->grf_uoc1_base->CON0 = 0xc000c000;
831 if (control_usb->usb_irq_wakeup)
832 enable_irq_wake(irq);
836 /*register host1_linestate irq */
837 irq = platform_get_irq_byname(pdev, "host1_linestate");
840 request_irq(irq, line_irq_handler, 0, "host1_linestate",
843 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
846 control_usb->grf_uoc2_base->CON0 = 0xc000c000;
847 if (control_usb->usb_irq_wakeup)
848 enable_irq_wake(irq);
855 /********** end of rk3288 usb detections **********/
857 static int usb_grf_ioremap(struct platform_device *pdev)
860 struct resource *res;
861 void *grf_soc_status1;
862 void *grf_soc_status2;
863 void *grf_soc_status19;
864 void *grf_soc_status21;
871 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
873 grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
874 if (IS_ERR(grf_soc_status1)) {
875 ret = PTR_ERR(grf_soc_status1);
878 control_usb->grf_soc_status1_rk3288 =
879 (pGRF_SOC_STATUS1_RK3288) grf_soc_status1;
881 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
883 grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
884 if (IS_ERR(grf_soc_status2)) {
885 ret = PTR_ERR(grf_soc_status2);
888 control_usb->grf_soc_status2_rk3288 =
889 (pGRF_SOC_STATUS2_RK3288) grf_soc_status2;
891 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
893 grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
894 if (IS_ERR(grf_soc_status19)) {
895 ret = PTR_ERR(grf_soc_status19);
898 control_usb->grf_soc_status19_rk3288 =
899 (pGRF_SOC_STATUS19_RK3288) grf_soc_status19;
901 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
903 grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
904 if (IS_ERR(grf_soc_status21)) {
905 ret = PTR_ERR(grf_soc_status21);
908 control_usb->grf_soc_status21_rk3288 =
909 (pGRF_SOC_STATUS21_RK3288) grf_soc_status21;
911 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
913 grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
914 if (IS_ERR(grf_uoc0_base)) {
915 ret = PTR_ERR(grf_uoc0_base);
918 control_usb->grf_uoc0_base = (pGRF_UOC0_REG) grf_uoc0_base;
920 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
922 grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
923 if (IS_ERR(grf_uoc1_base)) {
924 ret = PTR_ERR(grf_uoc1_base);
927 control_usb->grf_uoc1_base = (pGRF_UOC1_REG) grf_uoc1_base;
929 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
931 grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
932 if (IS_ERR(grf_uoc2_base)) {
933 ret = PTR_ERR(grf_uoc2_base);
936 control_usb->grf_uoc2_base = (pGRF_UOC2_REG) grf_uoc2_base;
938 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
940 grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
941 if (IS_ERR(grf_uoc3_base)) {
942 ret = PTR_ERR(grf_uoc3_base);
945 control_usb->grf_uoc3_base = (pGRF_UOC3_REG) grf_uoc3_base;
947 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
949 grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
950 if (IS_ERR(grf_uoc4_base)) {
951 ret = PTR_ERR(grf_uoc4_base);
954 control_usb->grf_uoc4_base = (pGRF_UOC4_REG) grf_uoc4_base;
961 static const struct of_device_id rk_usb_control_id_table[] = {
963 .compatible = "rockchip,rk3288-usb-control",
970 static int rk_usb_control_probe(struct platform_device *pdev)
973 struct device_node *np = pdev->dev.of_node;
977 devm_kzalloc(&pdev->dev, sizeof(*control_usb), GFP_KERNEL);
979 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
984 control_usb->chip_id = RK3288_USB_CTLR;
985 control_usb->remote_wakeup = of_property_read_bool(np,
986 "rockchip,remote_wakeup");
987 control_usb->usb_irq_wakeup = of_property_read_bool(np,
988 "rockchip,usb_irq_wakeup");
990 INIT_DELAYED_WORK(&control_usb->usb_charger_det_work,
991 usb_battery_charger_detect_work);
993 control_usb->host_gpios =
994 devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
995 if (!control_usb->host_gpios) {
996 dev_err(&pdev->dev, "unable to alloc memory for host_gpios\n");
1001 gpio = of_get_named_gpio(np, "host_drv_gpio", 0);
1002 control_usb->host_gpios->gpio = gpio;
1004 if (!gpio_is_valid(gpio)) {
1005 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
1007 err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
1010 "failed to request GPIO%d for host_drv\n",
1015 gpio_direction_output(control_usb->host_gpios->gpio, 1);
1018 control_usb->otg_gpios =
1019 devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
1020 if (!control_usb->otg_gpios) {
1021 dev_err(&pdev->dev, "unable to alloc memory for otg_gpios\n");
1026 gpio = of_get_named_gpio(np, "otg_drv_gpio", 0);
1027 control_usb->otg_gpios->gpio = gpio;
1029 if (!gpio_is_valid(gpio)) {
1030 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
1032 err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
1035 "failed to request GPIO%d for otg_drv\n", gpio);
1039 gpio_direction_output(control_usb->otg_gpios->gpio, 0);
1046 static int rk_usb_control_remove(struct platform_device *pdev)
1051 static struct platform_driver rk_usb_control_driver = {
1052 .probe = rk_usb_control_probe,
1053 .remove = rk_usb_control_remove,
1055 .name = "rk3288-usb-control",
1056 .owner = THIS_MODULE,
1057 .of_match_table = of_match_ptr(rk_usb_control_id_table),
1063 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
1065 .compatible = "rockchip,rk3288-dwc-control-usb",
1072 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
1074 struct clk *hclk_usb_peri, *phyclk_480m, *phyclk480m_parent;
1078 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
1083 hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
1084 if (IS_ERR(hclk_usb_peri)) {
1085 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
1090 control_usb->hclk_usb_peri = hclk_usb_peri;
1091 clk_prepare_enable(hclk_usb_peri);
1093 phyclk480m_parent = devm_clk_get(&pdev->dev, "usbphy2_480m");
1094 if (IS_ERR(phyclk480m_parent)) {
1095 dev_err(&pdev->dev, "Failed to get usbphy2_480m\n");
1099 phyclk_480m = devm_clk_get(&pdev->dev, "usbphy_480m");
1100 if (IS_ERR(phyclk_480m)) {
1101 dev_err(&pdev->dev, "Failed to get usbphy_480m\n");
1105 clk_set_parent(phyclk_480m, phyclk480m_parent);
1107 ret = usb_grf_ioremap(pdev);
1109 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
1112 #ifdef CONFIG_USB20_OTG
1113 if (usb20otg_get_status(USB_STATUS_BVABLID))
1114 schedule_delayed_work(&control_usb->usb_charger_det_work,
1118 ret = otg_irq_detect_init(pdev);
1125 clk_disable_unprepare(hclk_usb_peri);
1130 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
1132 clk_disable_unprepare(control_usb->hclk_usb_peri);
1136 static struct platform_driver dwc_otg_control_usb_driver = {
1137 .probe = dwc_otg_control_usb_probe,
1138 .remove = dwc_otg_control_usb_remove,
1140 .name = "rk3288-dwc-control-usb",
1141 .owner = THIS_MODULE,
1142 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
1146 static int __init dwc_otg_control_usb_init(void)
1150 retval = platform_driver_register(&rk_usb_control_driver);
1152 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1156 retval = platform_driver_register(&dwc_otg_control_usb_driver);
1159 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1165 subsys_initcall(dwc_otg_control_usb_init);
1167 static void __exit dwc_otg_control_usb_exit(void)
1169 platform_driver_unregister(&rk_usb_control_driver);
1170 platform_driver_unregister(&dwc_otg_control_usb_driver);
1173 module_exit(dwc_otg_control_usb_exit);
1174 MODULE_ALIAS("platform: dwc_control_usb");
1175 MODULE_AUTHOR("RockChip Inc.");
1176 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
1177 MODULE_LICENSE("GPL v2");