3 #include "usbdev_grf_regs.h"
4 #include "dwc_otg_regs.h"
5 static struct dwc_otg_control_usb *control_usb;
7 #ifdef CONFIG_USB20_OTG
8 static void usb20otg_hw_init(void)
10 #ifndef CONFIG_USB20_HOST
12 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
14 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
16 /* usb phy config init
17 * usb phy enter usb mode */
18 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
20 /* other haredware init,include:
21 * DRV_VBUS GPIO init */
22 if(gpio_get_value(control_usb->otg_gpios->gpio)){
23 gpio_set_value(control_usb->otg_gpios->gpio, 0);
27 static void usb20otg_phy_suspend(void* pdata, int suspend)
29 struct dwc_otg_platform_data *usbpdata=pdata;
33 control_usb->grf_uoc0_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
35 control_usb->grf_uoc0_base->CON3 = 0x2A|(0x3F<<16);
36 usbpdata->phy_status = 1;
39 control_usb->grf_uoc0_base->CON2 = ((0x01<<2)<<16);
40 usbpdata->phy_status = 0;
44 static void usb20otg_soft_reset(void)
46 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, true);
47 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, true);
48 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, true);
51 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, false);
52 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, false);
53 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, false);
57 static void usb20otg_clock_init(void* pdata)
59 struct dwc_otg_platform_data *usbpdata=pdata;
60 struct clk* ahbclk,*phyclk;
62 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb0");
64 dev_err(usbpdata->dev, "Failed to get hclk_usb0\n");
68 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy0");
70 dev_err(usbpdata->dev, "Failed to get clk_usbphy0\n");
74 usbpdata->phyclk = phyclk;
75 usbpdata->ahbclk = ahbclk;
78 static void usb20otg_clock_enable(void* pdata, int enable)
80 struct dwc_otg_platform_data *usbpdata=pdata;
83 clk_prepare_enable(usbpdata->ahbclk);
84 clk_prepare_enable(usbpdata->phyclk);
86 clk_disable_unprepare(usbpdata->ahbclk);
87 clk_disable_unprepare(usbpdata->phyclk);
91 static int usb20otg_get_status(int id)
96 case USB_STATUS_BVABLID:
98 ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
100 case USB_STATUS_DPDM:
102 ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
106 ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
109 ret = control_usb->chip_id;
111 case USB_REMOTE_WAKEUP:
112 ret = control_usb->remote_wakeup;
115 ret = control_usb->usb_irq_wakeup;
124 #ifdef CONFIG_RK_USB_UART
125 static void dwc_otg_uart_mode(void* pdata, int enter_usb_uart_mode)
127 if(1 == enter_usb_uart_mode){
128 /* bypass dm, enter uart mode*/
129 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
131 }else if(0 == enter_usb_uart_mode){
133 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
138 static void usb20otg_power_enable(int enable)
140 if(0 == enable){//disable otg_drv power
141 gpio_set_value(control_usb->otg_gpios->gpio, 0);
142 }else if(1 == enable){//enable otg_drv power
143 gpio_set_value(control_usb->otg_gpios->gpio, 1);
148 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
153 .hw_init = usb20otg_hw_init,
154 .phy_suspend = usb20otg_phy_suspend,
155 .soft_reset = usb20otg_soft_reset,
156 .clock_init = usb20otg_clock_init,
157 .clock_enable = usb20otg_clock_enable,
158 .get_status = usb20otg_get_status,
159 .power_enable = usb20otg_power_enable,
160 #ifdef CONFIG_RK_USB_UART
161 .dwc_otg_uart_mode = dwc_otg_uart_mode,
163 .bc_detect_cb=usb20otg_battery_charger_detect_cb,
168 #ifdef CONFIG_USB20_HOST
170 static void usb20host_hw_init(void)
172 /* usb phy config init
173 * set common_on = 0, in suspend mode, host1 PLL blocks remain powered.
174 * for RK3288, hsic and other modules use host1 (DWC_OTG) 480M phy clk.
176 control_usb->grf_uoc2_base->CON0 = (1<<16)|0;
178 /* other haredware init,include:
179 * DRV_VBUS GPIO init */
180 if(!gpio_get_value(control_usb->host_gpios->gpio)){
181 gpio_set_value(control_usb->host_gpios->gpio, 1);
185 static void usb20host_phy_suspend(void* pdata, int suspend)
187 struct dwc_otg_platform_data *usbpdata=pdata;
190 // enable soft control
191 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
193 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
194 usbpdata->phy_status = 1;
197 control_usb->grf_uoc2_base->CON2 = ((0x01<<2)<<16);
198 usbpdata->phy_status = 0;
202 static void usb20host_soft_reset(void)
204 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, true);
205 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, true);
206 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, true);
209 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, false);
210 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, false);
211 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, false);
215 static void usb20host_clock_init(void* pdata)
217 struct dwc_otg_platform_data *usbpdata=pdata;
218 struct clk* ahbclk,*phyclk;
220 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb1");
221 if (IS_ERR(ahbclk)) {
222 dev_err(usbpdata->dev, "Failed to get hclk_usb1\n");
226 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy1");
227 if (IS_ERR(phyclk)) {
228 dev_err(usbpdata->dev, "Failed to get clk_usbphy1\n");
232 usbpdata->phyclk = phyclk;
233 usbpdata->ahbclk = ahbclk;
236 static void usb20host_clock_enable(void* pdata, int enable)
238 struct dwc_otg_platform_data *usbpdata=pdata;
241 clk_prepare_enable(usbpdata->ahbclk);
242 clk_prepare_enable(usbpdata->phyclk);
244 clk_disable_unprepare(usbpdata->ahbclk);
245 clk_disable_unprepare(usbpdata->phyclk);
249 static int usb20host_get_status(int id)
254 case USB_STATUS_BVABLID:
256 ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;
258 case USB_STATUS_DPDM:
260 ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
264 ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
267 ret = control_usb->chip_id;
269 case USB_REMOTE_WAKEUP:
270 ret = control_usb->remote_wakeup;
273 ret = control_usb->usb_irq_wakeup;
282 static void usb20host_power_enable(int enable)
284 if(0 == enable){//disable host_drv power
285 //do not disable power in default
286 }else if(1 == enable){//enable host_drv power
287 gpio_set_value(control_usb->host_gpios->gpio, 1);
292 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
297 .hw_init = usb20host_hw_init,
298 .phy_suspend = usb20host_phy_suspend,
299 .soft_reset = usb20host_soft_reset,
300 .clock_init = usb20host_clock_init,
301 .clock_enable = usb20host_clock_enable,
302 .get_status = usb20host_get_status,
303 .power_enable = usb20host_power_enable,
308 #ifdef CONFIG_USB_EHCI_RKHSIC
309 static void rk_hsic_hw_init(void)
311 // usb phy config init
312 // hsic phy config init, set hsicphy_txsrtune
313 control_usb->grf_uoc3_base->CON0 = ((0xf<<6)<<16)|(0xf<<6);
315 /* other haredware init
316 * set common_on = 0, in suspend mode, otg/host PLL blocks remain powered
317 * for RK3288, use host1 (DWC_OTG) 480M phy clk
319 control_usb->grf_uoc2_base->CON0 = (1<<16)|0;
321 /* change INCR to INCR16 or INCR8(beats less than 16)
322 * or INCR4(beats less than 8) or SINGLE(beats less than 4)
324 control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
327 static void rk_hsic_clock_init(void* pdata)
329 /* By default, hsicphy_480m's parent is otg phy 480MHz clk
330 * rk3188 must use host phy 480MHz clk, because if otg bypass
331 * to uart mode, otg phy 480MHz clk will be closed automatically
333 struct rkehci_platform_data *usbpdata=pdata;
334 struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic;
336 phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_480m");
337 if (IS_ERR(phyclk480m_hsic)) {
338 dev_err(usbpdata->dev, "Failed to get hsicphy_480m\n");
342 phyclk12m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_12m");
343 if (IS_ERR(phyclk12m_hsic)) {
344 dev_err(usbpdata->dev, "Failed to get hsicphy_12m\n");
348 ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
349 if (IS_ERR(ahbclk)) {
350 dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
354 usbpdata->hclk_hsic = ahbclk;
355 usbpdata->hsic_phy_480m = phyclk480m_hsic;
356 usbpdata->hsic_phy_12m = phyclk12m_hsic;
359 static void rk_hsic_clock_enable(void* pdata, int enable)
361 struct rkehci_platform_data *usbpdata=pdata;
363 if(enable == usbpdata->clk_status)
366 clk_prepare_enable(usbpdata->hclk_hsic);
367 clk_prepare_enable(usbpdata->hsic_phy_480m);
368 clk_prepare_enable(usbpdata->hsic_phy_12m);
369 usbpdata->clk_status = 1;
371 clk_disable_unprepare(usbpdata->hclk_hsic);
372 clk_disable_unprepare(usbpdata->hsic_phy_480m);
373 clk_disable_unprepare(usbpdata->hsic_phy_12m);
374 usbpdata->clk_status = 0;
378 static void rk_hsic_soft_reset(void)
380 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, true);
381 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, true);
382 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, true);
385 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, false);
386 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, false);
387 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, false);
390 /* HSIC per-port reset */
391 control_usb->grf_uoc3_base->CON0 = ((1<<10)<<16)|(1<<10);
393 control_usb->grf_uoc3_base->CON0 = ((1<<10)<<16)|(0<<10);
397 struct rkehci_platform_data rkhsic_pdata_rk3288 = {
399 .hsic_phy_12m = NULL,
400 .hsic_phy_480m = NULL,
402 .hw_init = rk_hsic_hw_init,
403 .clock_init = rk_hsic_clock_init,
404 .clock_enable = rk_hsic_clock_enable,
405 .soft_reset = rk_hsic_soft_reset,
409 #ifdef CONFIG_USB_EHCI_RK
410 static void rk_ehci_hw_init(void)
412 /* usb phy config init */
414 /* DRV_VBUS GPIO init */
415 if(!gpio_get_value(control_usb->host_gpios->gpio)){
416 gpio_set_value(control_usb->host_gpios->gpio, 1);
420 static void rk_ehci_phy_suspend(void* pdata, int suspend)
422 struct rkehci_platform_data *usbpdata=pdata;
425 // enable soft control
426 control_usb->grf_uoc1_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
428 control_usb->grf_uoc1_base->CON3 = 0x2A|(0x3F<<16);
429 usbpdata->phy_status = 1;
432 control_usb->grf_uoc1_base->CON2 = ((0x01<<2)<<16);
433 usbpdata->phy_status = 0;
437 static void rk_ehci_clock_init(void* pdata)
439 struct rkehci_platform_data *usbpdata=pdata;
440 struct clk* ahbclk,*phyclk;
442 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb2");
443 if (IS_ERR(ahbclk)) {
444 dev_err(usbpdata->dev, "Failed to get hclk_usb2\n");
448 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy2");
449 if (IS_ERR(phyclk)) {
450 dev_err(usbpdata->dev, "Failed to get clk_usbphy2\n");
454 usbpdata->phyclk = phyclk;
455 usbpdata->ahbclk = ahbclk;
458 static void rk_ehci_clock_enable(void* pdata, int enable)
460 struct rkehci_platform_data *usbpdata=pdata;
462 if(enable == usbpdata->clk_status)
465 clk_prepare_enable(usbpdata->ahbclk);
466 clk_prepare_enable(usbpdata->phyclk);
467 usbpdata->clk_status = 1;
469 clk_disable_unprepare(usbpdata->ahbclk);
470 clk_disable_unprepare(usbpdata->phyclk);
471 usbpdata->clk_status = 0;
475 static void rk_ehci_soft_reset(void)
477 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, true);
478 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, true);
479 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, true);
480 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, true);
483 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, false);
484 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, false);
485 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, false);
486 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, false);
490 static int rk_ehci_get_status(int id)
495 case USB_STATUS_DPDM:
497 ret = control_usb->grf_soc_status2_rk3288->host0_linestate;
500 ret = control_usb->chip_id;
502 case USB_REMOTE_WAKEUP:
503 ret = control_usb->remote_wakeup;
506 ret = control_usb->usb_irq_wakeup;
515 struct rkehci_platform_data rkehci_pdata_rk3288 = {
520 .hw_init = rk_ehci_hw_init,
521 .phy_suspend = rk_ehci_phy_suspend,
522 .clock_init = rk_ehci_clock_init,
523 .clock_enable = rk_ehci_clock_enable,
524 .soft_reset = rk_ehci_soft_reset,
525 .get_status = rk_ehci_get_status,
529 #ifdef CONFIG_USB_OHCI_HCD_RK
530 static void rk_ohci_hw_init(void)
532 /* usb phy config init */
534 /* DRV_VBUS GPIO init */
535 if(!gpio_get_value(control_usb->host_gpios->gpio)){
536 gpio_set_value(control_usb->host_gpios->gpio, 1);
540 static void rk_ohci_clock_init(void* pdata)
542 struct rkehci_platform_data *usbpdata=pdata;
543 struct clk* ahbclk,*phyclk;
545 ahbclk =devm_clk_get(usbpdata->dev, "hclk_usb3");
546 if (IS_ERR(ahbclk)) {
547 dev_err(usbpdata->dev, "Failed to get hclk_usb3\n");
551 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy3");;
552 if (IS_ERR(phyclk)) {
553 dev_err(usbpdata->dev, "Failed to get clk_usbphy3\n");
557 usbpdata->phyclk = phyclk;
558 usbpdata->ahbclk = ahbclk;
561 static void rk_ohci_clock_enable(void* pdata, int enable)
563 struct rkehci_platform_data *usbpdata=pdata;
565 if(enable == usbpdata->clk_status)
568 clk_prepare_enable(usbpdata->ahbclk);
569 clk_prepare_enable(usbpdata->phyclk);
570 usbpdata->clk_status = 1;
572 clk_disable_unprepare(usbpdata->ahbclk);
573 clk_disable_unprepare(usbpdata->phyclk);
574 usbpdata->clk_status = 0;
578 static void rk_ohci_soft_reset(void)
582 struct rkehci_platform_data rkohci_pdata_rk3288 = {
586 .hw_init = rk_ohci_hw_init,
587 .clock_init = rk_ohci_clock_init,
588 .clock_enable = rk_ohci_clock_enable,
589 .soft_reset = rk_ohci_soft_reset,
593 /*********************************************************************
594 rk3288 usb detections
595 *********************************************************************/
597 #define WAKE_LOCK_TIMEOUT (HZ * 10)
598 inline static void do_wakeup(struct work_struct *work)
600 rk_send_wakeup_key(); // wake up the system
603 static void usb_battery_charger_detect_work(struct work_struct *work)
605 rk_usb_charger_status = usb_battery_charger_detect(0);
607 /********** handler for bvalid irq **********/
608 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
611 control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
613 #ifdef CONFIG_RK_USB_UART
614 /* usb otg dp/dm switch to usb phy */
615 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
618 if(control_usb->usb_irq_wakeup){
619 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
620 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
623 rk_usb_charger_status = USB_BC_TYPE_SDP;
624 schedule_delayed_work(&control_usb->usb_charger_det_work, HZ/10);
629 /***** handler for otg id rise and fall edge *****/
630 static irqreturn_t id_irq_handler(int irq, void *dev_id)
632 unsigned int uoc_con;
635 uoc_con = control_usb->grf_uoc0_base->CON4;
637 if(uoc_con & (1<<5))//id rise
639 control_usb->grf_uoc0_base->CON4 = ((1<<5)|(1<<21)); //clear id rise irq pandding
642 if(uoc_con & (1<<7))//id fall
644 #ifdef CONFIG_RK_USB_UART
645 /* usb otg dp/dm switch to usb phy */
646 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
648 control_usb->grf_uoc0_base->CON4 = ((1<<7)|(1<<23));//clear id fall irq pandding
651 if(control_usb->usb_irq_wakeup){
652 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
653 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
659 /***** handler for otg line status change *****/
661 static irqreturn_t line_irq_handler(int irq, void *dev_id)
665 if(control_usb->grf_uoc0_base->CON0 & 1<<15){
666 control_usb->grf_uoc0_base->CON0 = (1<<15 | 1<<31);
669 if(control_usb->grf_uoc1_base->CON0 & 1<<15){
670 control_usb->grf_uoc1_base->CON0 = (1<<15 | 1<<31);
673 if(control_usb->grf_uoc2_base->CON0 & 1<<15){
674 control_usb->grf_uoc2_base->CON0 = (1<<15 | 1<<31);
677 if(control_usb->usb_irq_wakeup){
678 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
679 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
685 /************* register usb detection irqs **************/
686 static int otg_irq_detect_init(struct platform_device *pdev)
691 if(control_usb->usb_irq_wakeup){
692 wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND, "usb_detect");
693 INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
696 /*register otg_bvalid irq*/
697 irq = platform_get_irq_byname(pdev, "otg_bvalid");
699 ret = request_irq(irq, bvalid_irq_handler, 0, "otg_bvalid", NULL);
701 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
704 control_usb->grf_uoc0_base->CON4 = 0x000c000c;// enable bvalid irq
705 if(control_usb->usb_irq_wakeup){
706 enable_irq_wake(irq);
711 /*register otg_id irq*/
712 irq = platform_get_irq_byname(pdev, "otg_id");
714 ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL);
716 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
719 control_usb->grf_uoc0_base->CON4 = 0x00f000f0;
720 if(control_usb->usb_irq_wakeup){
721 enable_irq_wake(irq);
726 /*register otg_linestate irq*/
727 irq = platform_get_irq_byname(pdev, "otg_linestate");
729 ret = request_irq(irq, line_irq_handler, 0, "otg_linestate", NULL);
731 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
734 control_usb->grf_uoc0_base->CON0 = 0xc000c000;
735 if(control_usb->usb_irq_wakeup){
736 enable_irq_wake(irq);
741 /*register host0_linestate irq*/
742 irq = platform_get_irq_byname(pdev, "host0_linestate");
744 ret = request_irq(irq, line_irq_handler, 0, "host0_linestate", NULL);
746 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
749 control_usb->grf_uoc1_base->CON0 = 0xc000c000;
750 if(control_usb->usb_irq_wakeup){
751 enable_irq_wake(irq);
756 /*register host1_linestate irq*/
757 irq = platform_get_irq_byname(pdev, "host1_linestate");
759 ret = request_irq(irq, line_irq_handler, 0, "host1_linestate", NULL);
761 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
764 control_usb->grf_uoc2_base->CON0 = 0xc000c000;
765 if(control_usb->usb_irq_wakeup){
766 enable_irq_wake(irq);
774 /********** end of rk3288 usb detections **********/
776 static int usb_grf_ioremap(struct platform_device *pdev)
779 struct resource *res;
780 void *grf_soc_status1;
781 void *grf_soc_status2;
782 void *grf_soc_status19;
783 void *grf_soc_status21;
790 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
792 grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
793 if (IS_ERR(grf_soc_status1)){
794 ret = PTR_ERR(grf_soc_status1);
797 control_usb->grf_soc_status1_rk3288 = (pGRF_SOC_STATUS1_RK3288)grf_soc_status1;
799 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
801 grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
802 if (IS_ERR(grf_soc_status2)){
803 ret = PTR_ERR(grf_soc_status2);
806 control_usb->grf_soc_status2_rk3288 = (pGRF_SOC_STATUS2_RK3288)grf_soc_status2;
808 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
810 grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
811 if (IS_ERR(grf_soc_status19)){
812 ret = PTR_ERR(grf_soc_status19);
815 control_usb->grf_soc_status19_rk3288 = (pGRF_SOC_STATUS19_RK3288)grf_soc_status19;
817 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
819 grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
820 if (IS_ERR(grf_soc_status21)){
821 ret = PTR_ERR(grf_soc_status21);
824 control_usb->grf_soc_status21_rk3288 = (pGRF_SOC_STATUS21_RK3288)grf_soc_status21;
826 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
828 grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
829 if (IS_ERR(grf_uoc0_base)){
830 ret = PTR_ERR(grf_uoc0_base);
833 control_usb->grf_uoc0_base = (pGRF_UOC0_REG)grf_uoc0_base;
835 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
837 grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
838 if (IS_ERR(grf_uoc1_base)){
839 ret = PTR_ERR(grf_uoc1_base);
842 control_usb->grf_uoc1_base = (pGRF_UOC1_REG)grf_uoc1_base;
844 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
846 grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
847 if (IS_ERR(grf_uoc2_base)){
848 ret = PTR_ERR(grf_uoc2_base);
851 control_usb->grf_uoc2_base = (pGRF_UOC2_REG)grf_uoc2_base;
853 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
855 grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
856 if (IS_ERR(grf_uoc3_base)){
857 ret = PTR_ERR(grf_uoc3_base);
860 control_usb->grf_uoc3_base = (pGRF_UOC3_REG)grf_uoc3_base;
862 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
864 grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
865 if (IS_ERR(grf_uoc4_base)){
866 ret = PTR_ERR(grf_uoc4_base);
869 control_usb->grf_uoc4_base = (pGRF_UOC4_REG)grf_uoc4_base;
876 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
878 .compatible = "rockchip,rk3288-dwc-control-usb",
885 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
888 struct device_node *np = pdev->dev.of_node;
889 struct clk* hclk_usb_peri, *phyclk_480m, *phyclk480m_parent;
892 control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb),GFP_KERNEL);
894 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
899 control_usb->chip_id = RK3288_USB_CTLR;
900 control_usb->remote_wakeup = of_property_read_bool(np,
901 "rockchip,remote_wakeup");
902 control_usb->usb_irq_wakeup = of_property_read_bool(np,
903 "rockchip,usb_irq_wakeup");
905 INIT_DELAYED_WORK(&control_usb->usb_charger_det_work, usb_battery_charger_detect_work);
907 hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
908 if (IS_ERR(hclk_usb_peri)) {
909 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
914 control_usb->hclk_usb_peri = hclk_usb_peri;
915 clk_prepare_enable(hclk_usb_peri);
917 phyclk480m_parent = devm_clk_get(&pdev->dev, "usbphy2_480m");
918 if (IS_ERR(phyclk480m_parent)) {
919 dev_err(&pdev->dev, "Failed to get usbphy2_480m\n");
923 phyclk_480m = devm_clk_get(&pdev->dev, "usbphy_480m");
924 if (IS_ERR(phyclk_480m)) {
925 dev_err(&pdev->dev, "Failed to get usbphy_480m\n");
929 clk_set_parent(phyclk_480m, phyclk480m_parent);
931 ret = usb_grf_ioremap(pdev);
933 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
937 control_usb->host_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
938 if(!control_usb->host_gpios){
939 dev_err(&pdev->dev, "unable to alloc memory for host_gpios\n");
944 gpio = of_get_named_gpio(np, "gpios", 0);
945 if(!gpio_is_valid(gpio)){
946 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
950 control_usb->host_gpios->gpio = gpio;
951 err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
954 "failed to request GPIO%d for host_drv\n",
959 gpio_direction_output(control_usb->host_gpios->gpio, 1);
961 control_usb->otg_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
962 if(!control_usb->otg_gpios){
963 dev_err(&pdev->dev, "unable to alloc memory for otg_gpios\n");
968 gpio = of_get_named_gpio(np, "gpios", 1);
969 if(!gpio_is_valid(gpio)){
970 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
974 control_usb->otg_gpios->gpio = gpio;
975 err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
978 "failed to request GPIO%d for otg_drv\n",
983 gpio_direction_output(control_usb->otg_gpios->gpio, 0);
985 #ifdef CONFIG_USB20_OTG
986 if(usb20otg_get_status(USB_STATUS_BVABLID)){
987 rk_usb_charger_status = USB_BC_TYPE_SDP;
988 schedule_delayed_work(&control_usb->usb_charger_det_work, HZ/10);
992 ret = otg_irq_detect_init(pdev);
999 clk_disable_unprepare(hclk_usb_peri);
1004 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
1006 clk_disable_unprepare(control_usb->hclk_usb_peri);
1010 static struct platform_driver dwc_otg_control_usb_driver = {
1011 .probe = dwc_otg_control_usb_probe,
1012 .remove = dwc_otg_control_usb_remove,
1014 .name = "rk3288-dwc-control-usb",
1015 .owner = THIS_MODULE,
1016 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
1020 static int __init dwc_otg_control_usb_init(void)
1022 return platform_driver_register(&dwc_otg_control_usb_driver);
1025 subsys_initcall(dwc_otg_control_usb_init);
1027 static void __exit dwc_otg_control_usb_exit(void)
1029 platform_driver_unregister(&dwc_otg_control_usb_driver);
1032 module_exit(dwc_otg_control_usb_exit);
1033 MODULE_ALIAS("platform: dwc_control_usb");
1034 MODULE_AUTHOR("RockChip Inc.");
1035 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
1036 MODULE_LICENSE("GPL v2");