drivers/usb/dwc_otg_310/usbdev_rk32.c

   1 #include <linux/kernel.h>
   2 #include <linux/platform_device.h>
   3 #include <linux/delay.h>
   4 #include <linux/dma-mapping.h>
   5 #include <linux/clk.h>
   6 #include <linux/module.h>
   7 #include <linux/slab.h>
   8 #include <linux/of.h>
   9 #include <linux/err.h>
  10 #include <linux/io.h>
  11 #include <linux/of_gpio.h>
  12 #include <linux/of_device.h>
  13 #include <linux/gpio.h>
  14 #include <linux/wakelock.h>
  15 #include <linux/workqueue.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/irq.h>
  18 #include "usbdev_grf_regs.h"
  19 #include "usbdev_rk.h"
  20 #include "dwc_otg_regs.h"
  21 static struct dwc_otg_control_usb *control_usb;
  22
  23 static int usb_get_chip_id(void)
  24 {
  25         return control_usb->chip_id;
  26 }
  27
  28 #ifdef CONFIG_USB20_OTG
  29 static void usb20otg_hw_init(void)
  30 {
  31 #ifndef CONFIG_USB20_HOST
  32         //enable soft control
  33         control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
  34         // enter suspend
  35         control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
  36 #endif
  37         /* usb phy config init
  38          * usb phy enter usb mode */
  39         control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
  40
  41         /* other haredware init,include:
  42          * DRV_VBUS GPIO init */
  43 //      gpio_direction_output(control_usb->otg_gpios->gpio, 0);
  44
  45 }
  46
  47 static void usb20otg_phy_suspend(void* pdata, int suspend)
  48 {
  49         struct dwc_otg_platform_data *usbpdata=pdata;
  50
  51         if(suspend){
  52                 //enable soft control
  53                 control_usb->grf_uoc0_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
  54                 //enter suspend
  55                 control_usb->grf_uoc0_base->CON3 = 0x2A|(0x3F<<16);
  56                 usbpdata->phy_status = 1;
  57         }else{
  58                 // exit suspend.
  59                 control_usb->grf_uoc0_base->CON2 = ((0x01<<2)<<16);
  60                 usbpdata->phy_status = 0;
  61         }
  62 }
  63
  64 static void usb20otg_soft_reset(void)
  65 {
  66 }
  67
  68 static void usb20otg_clock_init(void* pdata)
  69 {
  70         /*
  71         struct dwc_otg_platform_data *usbpdata=pdata;
  72         struct clk* ahbclk,*phyclk;
  73
  74         ahbclk = devm_clk_get(usbpdata->dev, "hclk_otg0");
  75         if (IS_ERR(ahbclk)) {
  76                 dev_err(usbpdata->dev, "Failed to get hclk_otg0\n");
  77                 return;
  78         }
  79
  80         phyclk = devm_clk_get(usbpdata->dev, "otgphy0");
  81         if (IS_ERR(phyclk)) {
  82                 dev_err(usbpdata->dev, "Failed to get otgphy0\n");
  83                 return;
  84         }
  85
  86         usbpdata->phyclk = phyclk;
  87         usbpdata->ahbclk = ahbclk;
  88         */
  89 }
  90
  91 static void usb20otg_clock_enable(void* pdata, int enable)
  92 {
  93         /*
  94         struct dwc_otg_platform_data *usbpdata=pdata;
  95
  96         if(enable){
  97                 clk_prepare_enable(usbpdata->ahbclk);
  98                 clk_prepare_enable(usbpdata->phyclk);
  99         }else{
 100                 clk_disable_unprepare(usbpdata->ahbclk);
 101                 clk_disable_unprepare(usbpdata->phyclk);
 102         }*/
 103 }
 104
 105 static int usb20otg_get_status(int id)
 106 {
 107         int ret = -1;
 108
 109         switch(id){
 110                 case USB_STATUS_BVABLID:
 111                         // bvalid in grf
 112                         ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
 113                         break;
 114                 case USB_STATUS_DPDM:
 115                         // dpdm in grf
 116                         ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
 117                         break;
 118                 case USB_STATUS_ID:
 119                         // id in grf
 120                         ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
 121                         break;
 122                 default:
 123                         break;
 124         }
 125
 126         return ret;
 127 }
 128
 129 #ifdef CONFIG_RK_USB_UART
 130 static void dwc_otg_uart_mode(void* pdata, int enter_usb_uart_mode)
 131 {
 132         if(1 == enter_usb_uart_mode){
 133                 /* bypass dm, enter uart mode*/
 134                 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
 135
 136         }else if(0 == enter_usb_uart_mode){
 137                 /* enter usb mode */
 138                 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
 139         }
 140 }
 141 #endif
 142
 143 static void usb20otg_power_enable(int enable)
 144 {       /*
 145         if(0 == enable){//disable otg_drv power
 146                 gpio_set_value(control_usb->otg_gpios->gpio, 0);
 147         }else if(1 == enable){//enable otg_drv power
 148                 gpio_set_value(control_usb->otg_gpios->gpio, 1);
 149         }*/
 150 }
 151
 152
 153 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
 154         .phyclk = NULL,
 155         .ahbclk = NULL,
 156         .busclk = NULL,
 157         .phy_status = 0,
 158         .hw_init = usb20otg_hw_init,
 159         .phy_suspend = usb20otg_phy_suspend,
 160         .soft_reset = usb20otg_soft_reset,
 161         .clock_init = usb20otg_clock_init,
 162         .clock_enable = usb20otg_clock_enable,
 163         .get_status = usb20otg_get_status,
 164         .get_chip_id = usb_get_chip_id,
 165
 166         .power_enable = usb20otg_power_enable,
 167 #ifdef CONFIG_RK_USB_UART
 168         .dwc_otg_uart_mode = dwc_otg_uart_mode,
 169 #endif
 170 };
 171
 172 #endif
 173
 174 #ifdef CONFIG_USB20_HOST
 175
 176 static void usb20host_hw_init(void)
 177 {
 178         /* usb phy config init */
 179
 180         /* other haredware init,include:
 181          * DRV_VBUS GPIO init */
 182 //      gpio_direction_output(control_usb->host_gpios->gpio, 1);
 183 }
 184
 185 static void usb20host_phy_suspend(void* pdata, int suspend)
 186 {
 187         struct dwc_otg_platform_data *usbpdata=pdata;
 188
 189         if(suspend){
 190                 // enable soft control
 191                 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
 192                 // enter suspend
 193                 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
 194                 usbpdata->phy_status = 1;
 195         }else{
 196                 //exit suspend.
 197                 control_usb->grf_uoc2_base->CON2 = ((0x01<<2)<<16);
 198                 usbpdata->phy_status = 0;
 199         }
 200 }
 201
 202 static void usb20host_soft_reset(void)
 203 {
 204 }
 205
 206 static void usb20host_clock_init(void* pdata)
 207 {
 208         /*
 209         struct dwc_otg_platform_data *usbpdata=pdata;
 210         struct clk* ahbclk,*phyclk;
 211
 212         ahbclk = devm_clk_get(usbpdata->dev, "hclk_otg1");
 213         if (IS_ERR(ahbclk)) {
 214                 dev_err(usbpdata->dev, "Failed to get hclk_otg1\n");
 215                 return;
 216         }
 217
 218         phyclk = devm_clk_get(usbpdata->dev, "otgphy1");
 219         if (IS_ERR(phyclk)) {
 220                 dev_err(usbpdata->dev, "Failed to get otgphy1\n");
 221                 return;
 222         }
 223
 224         usbpdata->phyclk = phyclk;
 225         usbpdata->ahbclk = ahbclk;
 226         */
 227 }
 228
 229 static void usb20host_clock_enable(void* pdata, int enable)
 230 {
 231         /*
 232         struct dwc_otg_platform_data *usbpdata=pdata;
 233
 234         if(enable){
 235                 clk_prepare_enable(usbpdata->ahbclk);
 236                 clk_prepare_enable(usbpdata->phyclk);
 237         }else{
 238                 clk_disable_unprepare(usbpdata->ahbclk);
 239                 clk_disable_unprepare(usbpdata->phyclk);
 240         }
 241         */
 242 }
 243
 244 static int usb20host_get_status(int id)
 245 {
 246         int ret = -1;
 247
 248         switch(id){
 249                 case USB_STATUS_BVABLID:
 250                         // bvalid in grf
 251                         ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;
 252                         break;
 253                 case USB_STATUS_DPDM:
 254                         // dpdm in grf
 255                         ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
 256                         break;
 257                 case USB_STATUS_ID:
 258                         // id in grf
 259                         ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
 260                         break;
 261                 default:
 262                         break;
 263         }
 264
 265         return ret;
 266 }
 267
 268 static void usb20host_power_enable(int enable)
 269 {       /*
 270         if(0 == enable){//disable host_drv power
 271                 //do not disable power in default
 272         }else if(1 == enable){//enable host_drv power
 273                 gpio_set_value(control_usb->host_gpios->gpio, 1);
 274         }*/
 275 }
 276
 277
 278 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
 279         .phyclk = NULL,
 280         .ahbclk = NULL,
 281         .busclk = NULL,
 282         .phy_status = 0,
 283         .hw_init = usb20host_hw_init,
 284         .phy_suspend = usb20host_phy_suspend,
 285         .soft_reset = usb20host_soft_reset,
 286         .clock_init = usb20host_clock_init,
 287         .clock_enable = usb20host_clock_enable,
 288         .get_status = usb20host_get_status,
 289         .get_chip_id = usb_get_chip_id,
 290         .power_enable = usb20host_power_enable,
 291 };
 292
 293 #endif
 294
 295 #ifdef CONFIG_USB_EHCI_RKHSIC
 296 static void rk_hsic_hw_init(void)
 297 {
 298         // usb phy config init
 299         // hsic phy config init, set hsicphy_txsrtune
 300         control_usb->grf_uoc3_base->CON0 = ((0xf<<6)<<16)|(0xf<<6);
 301
 302         /* other haredware init
 303          * set common_on, in suspend mode, otg/host PLL blocks remain powered
 304          */
 305
 306
 307         /* change INCR to INCR16 or INCR8(beats less than 16)
 308          * or INCR4(beats less than 8) or SINGLE(beats less than 4)
 309          */
 310         control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
 311 }
 312
 313 static void rk_hsic_clock_init(void* pdata)
 314 {
 315         /* By default, hsicphy_480m's parent is otg phy 480MHz clk
 316          * rk3188 must use host phy 480MHz clk, because if otg bypass
 317          * to uart mode, otg phy 480MHz clk will be closed automatically
 318          */
 319         /*
 320         struct rkehci_platform_data *usbpdata=pdata;
 321         struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic, *phyclk_otgphy1;
 322
 323         phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy480m");
 324         if (IS_ERR(phyclk480m_hsic)) {
 325                 dev_err(usbpdata->dev, "Failed to get hsicphy480m\n");
 326                 return;
 327         }
 328
 329         phyclk12m_hsic = devm_clk_get(usbpdata->dev, "hsicphy12m");
 330         if (IS_ERR(phyclk12m_hsic)) {
 331                 dev_err(usbpdata->dev, "Failed to get hsicphy12m\n");
 332                 return;
 333         }
 334
 335         phyclk_otgphy1 = devm_clk_get(usbpdata->dev, "hsic_otgphy1");
 336         if (IS_ERR(phyclk_otgphy1)) {
 337                 dev_err(usbpdata->dev, "Failed to get hsic_otgphy1\n");
 338                 return;
 339         }
 340
 341         ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
 342         if (IS_ERR(ahbclk)) {
 343                 dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
 344                 return;
 345         }
 346
 347         clk_set_parent(phyclk480m_hsic, phyclk_otgphy1);
 348
 349         usbpdata->hclk_hsic = ahbclk;
 350         usbpdata->hsic_phy_480m = phyclk480m_hsic;
 351         usbpdata->hsic_phy_12m = phyclk12m_hsic;
 352         */
 353 }
 354
 355 static void rk_hsic_clock_enable(void* pdata, int enable)
 356 {
 357         /*
 358         struct rkehci_platform_data *usbpdata=pdata;
 359
 360         if(enable == usbpdata->clk_status)
 361                 return;
 362         if(enable){
 363                 clk_prepare_enable(usbpdata->hclk_hsic);
 364                 clk_prepare_enable(usbpdata->hsic_phy_480m);
 365                 clk_prepare_enable(usbpdata->hsic_phy_12m);
 366                 usbpdata->clk_status = 1;
 367         }else{
 368                 clk_disable_unprepare(usbpdata->hclk_hsic);
 369                 clk_disable_unprepare(usbpdata->hsic_phy_480m);
 370                 clk_disable_unprepare(usbpdata->hsic_phy_12m);
 371                 usbpdata->clk_status = 0;
 372         }
 373         */
 374 }
 375
 376 static void rk_hsic_soft_reset(void)
 377 {
 378 }
 379
 380 struct rkehci_platform_data rkhsic_pdata_rk3288 = {
 381         .hclk_hsic = NULL,
 382         .hsic_phy_12m = NULL,
 383         .hsic_phy_480m = NULL,
 384         .clk_status = -1,
 385         .hw_init = rk_hsic_hw_init,
 386         .clock_init = rk_hsic_clock_init,
 387         .clock_enable = rk_hsic_clock_enable,
 388         .soft_reset = rk_hsic_soft_reset,
 389         .get_chip_id = usb_get_chip_id,
 390 };
 391 #endif
 392
 393 #ifdef CONFIG_USB_EHCI_RK
 394 static void rk_ehci_hw_init(void)
 395 {
 396
 397 }
 398
 399 static void rk_ehci_clock_init(void* pdata)
 400 {
 401
 402 }
 403
 404 static void rk_ehci_clock_enable(void* pdata, int enable)
 405 {
 406
 407 }
 408
 409 static void rk_ehci_soft_reset(void)
 410 {
 411
 412 }
 413
 414 struct rkehci_platform_data rkehci_pdata_rk3288 = {
 415         .phyclk = NULL,
 416         .ahbclk = NULL,
 417         .clk_status = -1,
 418         .hw_init = rk_ehci_hw_init,
 419         .clock_init = rk_ehci_clock_init,
 420         .clock_enable = rk_ehci_clock_enable,
 421         .soft_reset = rk_ehci_soft_reset,
 422         .get_chip_id = usb_get_chip_id,
 423 };
 424 #endif
 425
 426 #ifdef CONFIG_USB_OHCI_HCD_RK
 427 static void rk_ohci_hw_init(void)
 428 {
 429 }
 430
 431 static void rk_ohci_clock_init(void* pdata)
 432 {
 433 }
 434
 435 static void rk_ohci_clock_enable(void* pdata, int enable)
 436 {
 437 }
 438
 439 static void rk_ohci_soft_reset(void)
 440 {
 441 }
 442
 443 struct rkehci_platform_data rkohci_pdata_rk3288 = {
 444         .phyclk = NULL,
 445         .ahbclk = NULL,
 446         .clk_status = -1,
 447         .hw_init = rk_ohci_hw_init,
 448         .clock_init = rk_ohci_clock_init,
 449         .clock_enable = rk_ohci_clock_enable,
 450         .soft_reset = rk_ohci_soft_reset,
 451         .get_chip_id = usb_get_chip_id,
 452 };
 453 #endif
 454
 455 #ifdef CONFIG_RK_USB_DETECT_BY_OTG_BVALID
 456 #define WAKE_LOCK_TIMEOUT (HZ * 10)
 457 inline static void do_wakeup(struct work_struct *work)
 458 {
 459 //      rk28_send_wakeup_key();
 460 }
 461 #endif
 462
 463 /********** handler for bvalid irq **********/
 464 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
 465 {
 466         /* clear irq */
 467         control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
 468
 469 #ifdef CONFIG_RK_USB_UART
 470         /* usb otg dp/dm switch to usb phy */
 471         dwc_otg_uart_mode(NULL, PHY_USB_MODE);
 472 #endif
 473
 474 #ifdef CONFIG_RK_USB_DETECT_BY_OTG_BVALID
 475         wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
 476         schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
 477 #endif
 478
 479         return IRQ_HANDLED;
 480 }
 481
 482 /************* register usb irq **************/
 483 static int otg_irq_detect_init(struct platform_device *pdev)
 484 {
 485         int ret = 0;
 486         int irq = 0;
 487
 488 #ifdef CONFIG_RK_USB_DETECT_BY_OTG_BVALID
 489         wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND, "usb_detect");
 490         INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
 491 #endif
 492
 493         irq = platform_get_irq_byname(pdev, "bvalid");
 494         if (irq > 0) {
 495                 ret = request_irq(irq, bvalid_irq_handler, 0, "bvalid", NULL);
 496                 if(ret < 0){
 497                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
 498                         return ret;
 499                 }
 500
 501                 /* clear & enable bvalid irq */
 502                 control_usb->grf_uoc0_base->CON4 = (0x000c | (0x000c << 16));
 503
 504 #ifdef CONFIG_RK_USB_DETECT_BY_OTG_BVALID
 505                 enable_irq_wake(irq);
 506 #endif
 507         }
 508
 509
 510         return ret;
 511 }
 512
 513 static int usb_grf_ioremap(struct platform_device *pdev)
 514 {
 515         int ret = 0;
 516         struct resource *res;
 517         void *grf_soc_status1;
 518         void *grf_soc_status2;
 519         void *grf_soc_status19;
 520         void *grf_soc_status21;
 521         void *grf_uoc0_base;
 522         void *grf_uoc1_base;
 523         void *grf_uoc2_base;
 524         void *grf_uoc3_base;
 525         void *grf_uoc4_base;
 526
 527         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 528                                                 "GRF_SOC_STATUS1");
 529         grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
 530         if (IS_ERR(grf_soc_status1)){
 531                 ret = PTR_ERR(grf_soc_status1);
 532                 return ret;
 533         }
 534         control_usb->grf_soc_status1_rk3288 = (pGRF_SOC_STATUS1_RK3288)grf_soc_status1;
 535
 536         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 537                                                 "GRF_SOC_STATUS2");
 538         grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
 539         if (IS_ERR(grf_soc_status2)){
 540                 ret = PTR_ERR(grf_soc_status2);
 541                 return ret;
 542         }
 543         control_usb->grf_soc_status2_rk3288 = (pGRF_SOC_STATUS2_RK3288)grf_soc_status2;
 544
 545         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 546                                                 "GRF_SOC_STATUS19");
 547         grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
 548         if (IS_ERR(grf_soc_status19)){
 549                 ret = PTR_ERR(grf_soc_status19);
 550                 return ret;
 551         }
 552         control_usb->grf_soc_status19_rk3288 = (pGRF_SOC_STATUS19_RK3288)grf_soc_status19;
 553
 554         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 555                                                 "GRF_SOC_STATUS21");
 556         grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
 557         if (IS_ERR(grf_soc_status21)){
 558                 ret = PTR_ERR(grf_soc_status21);
 559                 return ret;
 560         }
 561         control_usb->grf_soc_status21_rk3288 = (pGRF_SOC_STATUS21_RK3288)grf_soc_status21;
 562
 563         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 564                                                 "GRF_UOC0_BASE");
 565         grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
 566         if (IS_ERR(grf_uoc0_base)){
 567                 ret = PTR_ERR(grf_uoc0_base);
 568                 return ret;
 569         }
 570         control_usb->grf_uoc0_base = (pGRF_UOC0_REG)grf_uoc0_base;
 571
 572         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 573                                                 "GRF_UOC1_BASE");
 574         grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
 575         if (IS_ERR(grf_uoc1_base)){
 576                 ret = PTR_ERR(grf_uoc1_base);
 577                 return ret;
 578         }
 579         control_usb->grf_uoc1_base = (pGRF_UOC1_REG)grf_uoc1_base;
 580
 581         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 582                                                 "GRF_UOC2_BASE");
 583         grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
 584         if (IS_ERR(grf_uoc2_base)){
 585                 ret = PTR_ERR(grf_uoc2_base);
 586                 return ret;
 587         }
 588         control_usb->grf_uoc2_base = (pGRF_UOC2_REG)grf_uoc2_base;
 589
 590         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 591                                                 "GRF_UOC3_BASE");
 592         grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
 593         if (IS_ERR(grf_uoc3_base)){
 594                 ret = PTR_ERR(grf_uoc3_base);
 595                 return ret;
 596         }
 597         control_usb->grf_uoc3_base = (pGRF_UOC3_REG)grf_uoc3_base;
 598
 599         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 600                                                 "GRF_UOC4_BASE");
 601         grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
 602         if (IS_ERR(grf_uoc4_base)){
 603                 ret = PTR_ERR(grf_uoc4_base);
 604                 return ret;
 605         }
 606         control_usb->grf_uoc4_base = (pGRF_UOC4_REG)grf_uoc4_base;
 607
 608         return ret;
 609 }
 610
 611 #ifdef CONFIG_OF
 612
 613 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
 614         {
 615                 .compatible = "rockchip,rk3288-dwc-control-usb",
 616         },
 617         { },
 618 };
 619
 620 #endif
 621
 622 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
 623 {
 624         int gpio, err;
 625         struct device_node *np = pdev->dev.of_node;
 626 //      struct clk* hclk_usb_peri;
 627         int ret = 0;
 628
 629         control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb),GFP_KERNEL);
 630         if (!control_usb) {
 631                 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
 632                 ret =  -ENOMEM;
 633                 goto err1;
 634         }
 635
 636         control_usb->chip_id = RK3288_USB_CTLR;
 637 /*      disable for debug
 638         hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
 639         if (IS_ERR(hclk_usb_peri)) {
 640                 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
 641                 ret = -EINVAL;
 642                 goto err1;
 643         }
 644
 645         control_usb->hclk_usb_peri = hclk_usb_peri;
 646         clk_prepare_enable(hclk_usb_peri);
 647 */
 648         ret = usb_grf_ioremap(pdev);
 649         if(ret){
 650                 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
 651                 goto err2;
 652         }
 653 /*
 654         control_usb->host_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
 655
 656         gpio =  of_get_named_gpio(np, "gpios", 0);
 657         if(!gpio_is_valid(gpio)){
 658                 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
 659                 ret = -EINVAL;
 660                 goto err2;
 661         }
 662         control_usb->host_gpios->gpio = gpio;
 663         err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
 664         if (err) {
 665                 dev_err(&pdev->dev,
 666                         "failed to request GPIO%d for host_drv\n",
 667                         gpio);
 668                 ret = err;
 669                 goto err2;
 670         }
 671
 672         control_usb->otg_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
 673
 674         gpio =  of_get_named_gpio(np, "gpios", 1);
 675         if(!gpio_is_valid(gpio)){
 676                 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
 677                 ret = -EINVAL;
 678                 goto err2;
 679         }
 680         control_usb->otg_gpios->gpio = gpio;
 681         err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
 682         if (err) {
 683                 dev_err(&pdev->dev,
 684                         "failed to request GPIO%d for otg_drv\n",
 685                         gpio);
 686                 ret = err;
 687                 goto err2;
 688         }
 689 */
 690 #if 0 //disable for debug
 691         ret = otg_irq_detect_init(pdev);
 692         if (ret < 0)
 693                 goto err2;
 694 #endif
 695         return 0;
 696
 697 err2:
 698 //      disable for debug
 699 //      clk_disable_unprepare(hclk_usb_peri);
 700 err1:
 701         return ret;
 702 }
 703
 704 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
 705 {
 706 //      disable for debug
 707 //      clk_disable_unprepare(control_usb->hclk_usb_peri);
 708         return 0;
 709 }
 710
 711 static struct platform_driver dwc_otg_control_usb_driver = {
 712         .probe          = dwc_otg_control_usb_probe,
 713         .remove         = dwc_otg_control_usb_remove,
 714         .driver         = {
 715                 .name   = "rk3288-dwc-control-usb",
 716                 .owner  = THIS_MODULE,
 717                 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
 718         },
 719 };
 720
 721 static int __init dwc_otg_control_usb_init(void)
 722 {
 723         return platform_driver_register(&dwc_otg_control_usb_driver);
 724 }
 725
 726 subsys_initcall(dwc_otg_control_usb_init);
 727
 728 static void __exit dwc_otg_control_usb_exit(void)
 729 {
 730         platform_driver_unregister(&dwc_otg_control_usb_driver);
 731 }
 732
 733 module_exit(dwc_otg_control_usb_exit);
 734 MODULE_ALIAS("platform: dwc_control_usb");
 735 MODULE_AUTHOR("RockChip Inc.");
 736 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
 737 MODULE_LICENSE("GPL v2");