3 #include "usbdev_grf_regs.h"
4 #include "dwc_otg_regs.h"
5 static struct dwc_otg_control_usb *control_usb;
7 #ifdef CONFIG_USB20_OTG
8 static void usb20otg_hw_init(void)
10 #ifndef CONFIG_USB20_HOST
12 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
14 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
16 /* usb phy config init
17 * usb phy enter usb mode */
18 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
20 /* other haredware init,include:
21 * DRV_VBUS GPIO init */
22 /*if(gpio_get_value(control_usb->otg_gpios->gpio)){
23 gpio_set_value(control_usb->otg_gpios->gpio, 0);
27 static void usb20otg_phy_suspend(void* pdata, int suspend)
29 struct dwc_otg_platform_data *usbpdata=pdata;
33 control_usb->grf_uoc0_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
35 control_usb->grf_uoc0_base->CON3 = 0x2A|(0x3F<<16);
36 usbpdata->phy_status = 1;
39 control_usb->grf_uoc0_base->CON2 = ((0x01<<2)<<16);
40 usbpdata->phy_status = 0;
44 static void usb20otg_soft_reset(void)
48 static void usb20otg_clock_init(void* pdata)
51 struct dwc_otg_platform_data *usbpdata=pdata;
52 struct clk* ahbclk,*phyclk;
54 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb0");
56 dev_err(usbpdata->dev, "Failed to get hclk_usb0\n");
60 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy0");
62 dev_err(usbpdata->dev, "Failed to get clk_usbphy0\n");
66 usbpdata->phyclk = phyclk;
67 usbpdata->ahbclk = ahbclk;
71 static void usb20otg_clock_enable(void* pdata, int enable)
74 struct dwc_otg_platform_data *usbpdata=pdata;
77 clk_prepare_enable(usbpdata->ahbclk);
78 clk_prepare_enable(usbpdata->phyclk);
80 clk_disable_unprepare(usbpdata->ahbclk);
81 clk_disable_unprepare(usbpdata->phyclk);
85 static int usb20otg_get_status(int id)
90 case USB_STATUS_BVABLID:
92 ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
96 ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
100 ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
103 ret = control_usb->chip_id;
105 case USB_REMOTE_WAKEUP:
106 ret = control_usb->remote_wakeup;
109 ret = control_usb->usb_irq_wakeup;
118 #ifdef CONFIG_RK_USB_UART
119 static void dwc_otg_uart_mode(void* pdata, int enter_usb_uart_mode)
121 if(1 == enter_usb_uart_mode){
122 /* bypass dm, enter uart mode*/
123 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
125 }else if(0 == enter_usb_uart_mode){
127 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
132 static void usb20otg_power_enable(int enable)
134 if(0 == enable){//disable otg_drv power
135 gpio_set_value(control_usb->otg_gpios->gpio, 0);
136 }else if(1 == enable){//enable otg_drv power
137 gpio_set_value(control_usb->otg_gpios->gpio, 1);
142 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
147 .hw_init = usb20otg_hw_init,
148 .phy_suspend = usb20otg_phy_suspend,
149 .soft_reset = usb20otg_soft_reset,
150 .clock_init = usb20otg_clock_init,
151 .clock_enable = usb20otg_clock_enable,
152 .get_status = usb20otg_get_status,
153 .power_enable = usb20otg_power_enable,
154 #ifdef CONFIG_RK_USB_UART
155 .dwc_otg_uart_mode = dwc_otg_uart_mode,
157 .bc_detect_cb=usb20otg_battery_charger_detect_cb,
162 #ifdef CONFIG_USB20_HOST
164 static void usb20host_hw_init(void)
166 /* usb phy config init */
168 /* other haredware init,include:
169 * DRV_VBUS GPIO init */
170 /*if(!gpio_get_value(control_usb->host_gpios->gpio)){
171 gpio_set_value(control_usb->host_gpios->gpio, 1);
175 static void usb20host_phy_suspend(void* pdata, int suspend)
177 struct dwc_otg_platform_data *usbpdata=pdata;
180 // enable soft control
181 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
183 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
184 usbpdata->phy_status = 1;
187 control_usb->grf_uoc2_base->CON2 = ((0x01<<2)<<16);
188 usbpdata->phy_status = 0;
192 static void usb20host_soft_reset(void)
196 static void usb20host_clock_init(void* pdata)
199 struct dwc_otg_platform_data *usbpdata=pdata;
200 struct clk* ahbclk,*phyclk;
202 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb1");
203 if (IS_ERR(ahbclk)) {
204 dev_err(usbpdata->dev, "Failed to get hclk_usb1\n");
208 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy1");
209 if (IS_ERR(phyclk)) {
210 dev_err(usbpdata->dev, "Failed to get clk_usbphy1\n");
214 usbpdata->phyclk = phyclk;
215 usbpdata->ahbclk = ahbclk;
219 static void usb20host_clock_enable(void* pdata, int enable)
222 struct dwc_otg_platform_data *usbpdata=pdata;
225 clk_prepare_enable(usbpdata->ahbclk);
226 clk_prepare_enable(usbpdata->phyclk);
228 clk_disable_unprepare(usbpdata->ahbclk);
229 clk_disable_unprepare(usbpdata->phyclk);
234 static int usb20host_get_status(int id)
239 case USB_STATUS_BVABLID:
241 ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;
243 case USB_STATUS_DPDM:
245 ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
249 ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
252 ret = control_usb->chip_id;
254 case USB_REMOTE_WAKEUP:
255 ret = control_usb->remote_wakeup;
258 ret = control_usb->usb_irq_wakeup;
267 static void usb20host_power_enable(int enable)
269 if(0 == enable){//disable host_drv power
270 //do not disable power in default
271 }else if(1 == enable){//enable host_drv power
272 gpio_set_value(control_usb->host_gpios->gpio, 1);
277 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
282 .hw_init = usb20host_hw_init,
283 .phy_suspend = usb20host_phy_suspend,
284 .soft_reset = usb20host_soft_reset,
285 .clock_init = usb20host_clock_init,
286 .clock_enable = usb20host_clock_enable,
287 .get_status = usb20host_get_status,
288 .power_enable = usb20host_power_enable,
293 #ifdef CONFIG_USB_EHCI_RKHSIC
294 static void rk_hsic_hw_init(void)
296 // usb phy config init
297 // hsic phy config init, set hsicphy_txsrtune
298 control_usb->grf_uoc3_base->CON0 = ((0xf<<6)<<16)|(0xf<<6);
300 /* other haredware init
301 * set common_on, in suspend mode, otg/host PLL blocks remain powered
305 /* change INCR to INCR16 or INCR8(beats less than 16)
306 * or INCR4(beats less than 8) or SINGLE(beats less than 4)
308 control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
311 static void rk_hsic_clock_init(void* pdata)
313 /* By default, hsicphy_480m's parent is otg phy 480MHz clk
314 * rk3188 must use host phy 480MHz clk, because if otg bypass
315 * to uart mode, otg phy 480MHz clk will be closed automatically
318 struct rkehci_platform_data *usbpdata=pdata;
319 struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic, *phyclk_usbphy1;
321 phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_480m");
322 if (IS_ERR(phyclk480m_hsic)) {
323 dev_err(usbpdata->dev, "Failed to get hsicphy_480m\n");
327 phyclk12m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_12m");
328 if (IS_ERR(phyclk12m_hsic)) {
329 dev_err(usbpdata->dev, "Failed to get hsicphy_12m\n");
333 phyclk_usbphy1 = devm_clk_get(usbpdata->dev, "hsic_usbphy1");
334 if (IS_ERR(phyclk_usbphy1)) {
335 dev_err(usbpdata->dev, "Failed to get hsic_usbphy1\n");
339 ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
340 if (IS_ERR(ahbclk)) {
341 dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
345 clk_set_parent(phyclk480m_hsic, phyclk_usbphy1);
347 usbpdata->hclk_hsic = ahbclk;
348 usbpdata->hsic_phy_480m = phyclk480m_hsic;
349 usbpdata->hsic_phy_12m = phyclk12m_hsic;
353 static void rk_hsic_clock_enable(void* pdata, int enable)
356 struct rkehci_platform_data *usbpdata=pdata;
358 if(enable == usbpdata->clk_status)
361 clk_prepare_enable(usbpdata->hclk_hsic);
362 clk_prepare_enable(usbpdata->hsic_phy_480m);
363 clk_prepare_enable(usbpdata->hsic_phy_12m);
364 usbpdata->clk_status = 1;
366 clk_disable_unprepare(usbpdata->hclk_hsic);
367 clk_disable_unprepare(usbpdata->hsic_phy_480m);
368 clk_disable_unprepare(usbpdata->hsic_phy_12m);
369 usbpdata->clk_status = 0;
374 static void rk_hsic_soft_reset(void)
378 struct rkehci_platform_data rkhsic_pdata_rk3288 = {
380 .hsic_phy_12m = NULL,
381 .hsic_phy_480m = NULL,
383 .hw_init = rk_hsic_hw_init,
384 .clock_init = rk_hsic_clock_init,
385 .clock_enable = rk_hsic_clock_enable,
386 .soft_reset = rk_hsic_soft_reset,
390 #ifdef CONFIG_USB_EHCI_RK
391 static void rk_ehci_hw_init(void)
393 /* usb phy config init */
395 /* DRV_VBUS GPIO init */
396 /*if(!gpio_get_value(control_usb->host_gpios->gpio)){
397 gpio_set_value(control_usb->host_gpios->gpio, 1);
401 static void rk_ehci_clock_init(void* pdata)
404 struct rkehci_platform_data *usbpdata=pdata;
405 struct clk* ahbclk,*phyclk;
407 ahbclk = of_clk_get_by_name(of_get_parent(usbpdata->dev.of_node), "hclk_usb2");
408 if (IS_ERR(ahbclk)) {
409 dev_err(usbpdata->dev, "Failed to get hclk_usb2\n");
413 phyclk = of_clk_get_by_name(of_get_parent(usbpdata->dev.of_node), "clk_usbphy2");
414 if (IS_ERR(phyclk)) {
415 dev_err(usbpdata->dev, "Failed to get clk_usbphy2\n");
419 usbpdata->phyclk = phyclk;
420 usbpdata->ahbclk = ahbclk;
424 static void rk_ehci_clock_enable(void* pdata, int enable)
427 struct rkehci_platform_data *usbpdata=pdata;
429 if(enable == usbpdata->clk_status)
432 clk_prepare_enable(usbpdata->ahbclk);
433 clk_prepare_enable(usbpdata->phyclk);
434 usbpdata->clk_status = 1;
436 clk_disable_unprepare(usbpdata->ahbclk);
437 clk_disable_unprepare(usbpdata->phyclk);
438 usbpdata->clk_status = 0;
443 static void rk_ehci_soft_reset(void)
448 struct rkehci_platform_data rkehci_pdata_rk3288 = {
452 .hw_init = rk_ehci_hw_init,
453 .clock_init = rk_ehci_clock_init,
454 .clock_enable = rk_ehci_clock_enable,
455 .soft_reset = rk_ehci_soft_reset,
459 #ifdef CONFIG_USB_OHCI_HCD_RK
460 static void rk_ohci_hw_init(void)
462 /* usb phy config init */
464 /* DRV_VBUS GPIO init */
465 /*if(!gpio_get_value(control_usb->host_gpios->gpio)){
466 gpio_set_value(control_usb->host_gpios->gpio, 1);
470 static void rk_ohci_clock_init(void* pdata)
473 struct rkehci_platform_data *usbpdata=pdata;
474 struct clk* ahbclk,*phyclk;
476 ahbclk = of_clk_get_by_name(of_get_parent(usbpdata->dev.of_node), "hclk_usb2");
477 if (IS_ERR(ahbclk)) {
478 dev_err(usbpdata->dev, "Failed to get hclk_usb2\n");
482 phyclk = of_clk_get_by_name(of_get_parent(usbpdata->dev.of_node), "clk_usbphy2");
483 if (IS_ERR(phyclk)) {
484 dev_err(usbpdata->dev, "Failed to get clk_usbphy2\n");
488 usbpdata->phyclk = phyclk;
489 usbpdata->ahbclk = ahbclk;
493 static void rk_ohci_clock_enable(void* pdata, int enable)
496 struct rkehci_platform_data *usbpdata=pdata;
498 if(enable == usbpdata->clk_status)
501 clk_prepare_enable(usbpdata->ahbclk);
502 clk_prepare_enable(usbpdata->phyclk);
503 usbpdata->clk_status = 1;
505 clk_disable_unprepare(usbpdata->ahbclk);
506 clk_disable_unprepare(usbpdata->phyclk);
507 usbpdata->clk_status = 0;
512 static void rk_ohci_soft_reset(void)
516 struct rkehci_platform_data rkohci_pdata_rk3288 = {
520 .hw_init = rk_ohci_hw_init,
521 .clock_init = rk_ohci_clock_init,
522 .clock_enable = rk_ohci_clock_enable,
523 .soft_reset = rk_ohci_soft_reset,
527 /*********************************************************************
528 rk3288 usb detections
529 *********************************************************************/
531 #define WAKE_LOCK_TIMEOUT (HZ * 10)
532 inline static void do_wakeup(struct work_struct *work)
534 // rk28_send_wakeup_key();
537 /********** handler for bvalid irq **********/
538 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
541 control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
543 #ifdef CONFIG_RK_USB_UART
544 /* usb otg dp/dm switch to usb phy */
545 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
548 if(control_usb->usb_irq_wakeup){
549 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
550 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
555 /***** handler for otg id rise and fall edge *****/
556 static irqreturn_t id_irq_handler(int irq, void *dev_id)
558 unsigned int uoc_con;
561 uoc_con = control_usb->grf_uoc0_base->CON4;
563 if(uoc_con & (1<<5))//id rise
565 control_usb->grf_uoc0_base->CON4 = ((1<<5)|(1<<21)); //clear id rise irq pandding
568 if(uoc_con & (1<<7))//id fall
570 #ifdef CONFIG_RK_USB_UART
571 /* usb otg dp/dm switch to usb phy */
572 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
574 control_usb->grf_uoc0_base->CON4 = ((1<<7)|(1<<23));//clear id fall irq pandding
577 if(control_usb->usb_irq_wakeup){
578 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
579 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
585 /***** handler for otg line status change *****/
587 static irqreturn_t line_irq_handler(int irq, void *dev_id)
589 unsigned int uoc_con;
592 if(control_usb->grf_uoc0_base->CON0 & 1<<15){
593 control_usb->grf_uoc0_base->CON0 = (1<<15 | 1<<31);
596 if(control_usb->grf_uoc1_base->CON0 & 1<<15){
597 control_usb->grf_uoc1_base->CON0 = (1<<15 | 1<<31);
600 if(control_usb->grf_uoc2_base->CON0 & 1<<15){
601 control_usb->grf_uoc2_base->CON0 = (1<<15 | 1<<31);
604 if(control_usb->usb_irq_wakeup){
605 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
606 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
612 /************* register usb detection irqs **************/
613 static int otg_irq_detect_init(struct platform_device *pdev)
618 if(control_usb->usb_irq_wakeup){
619 wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND, "usb_detect");
620 INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
623 /*register otg_bvalid irq*/
624 irq = platform_get_irq_byname(pdev, "otg_bvalid");
626 ret = request_irq(irq, bvalid_irq_handler, 0, "otg_bvalid", NULL);
628 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
631 control_usb->grf_uoc0_base->CON4 = 0x000c000c;// enable bvalid irq
632 if(control_usb->usb_irq_wakeup){
633 enable_irq_wake(irq);
638 /*register otg_id irq*/
639 irq = platform_get_irq_byname(pdev, "otg_id");
641 ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL);
643 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
646 control_usb->grf_uoc0_base->CON4 = 0x00f000f0;
647 if(control_usb->usb_irq_wakeup){
648 enable_irq_wake(irq);
653 /*register otg_linestate irq*/
654 irq = platform_get_irq_byname(pdev, "otg_linestate");
656 ret = request_irq(irq, line_irq_handler, 0, "otg_linestate", NULL);
658 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
661 control_usb->grf_uoc0_base->CON0 = 0xc000c000;
662 if(control_usb->usb_irq_wakeup){
663 enable_irq_wake(irq);
668 /*register host0_linestate irq*/
669 irq = platform_get_irq_byname(pdev, "host0_linestate");
671 ret = request_irq(irq, line_irq_handler, 0, "host0_linestate", NULL);
673 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
676 control_usb->grf_uoc1_base->CON0 = 0xc000c000;
677 if(control_usb->usb_irq_wakeup){
678 enable_irq_wake(irq);
683 /*register host1_linestate irq*/
684 irq = platform_get_irq_byname(pdev, "host1_linestate");
686 ret = request_irq(irq, line_irq_handler, 0, "host1_linestate", NULL);
688 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
691 control_usb->grf_uoc2_base->CON0 = 0xc000c000;
692 if(control_usb->usb_irq_wakeup){
693 enable_irq_wake(irq);
701 /********** end of rk3288 usb detections **********/
703 static int usb_grf_ioremap(struct platform_device *pdev)
706 struct resource *res;
707 void *grf_soc_status1;
708 void *grf_soc_status2;
709 void *grf_soc_status19;
710 void *grf_soc_status21;
717 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
719 grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
720 if (IS_ERR(grf_soc_status1)){
721 ret = PTR_ERR(grf_soc_status1);
724 control_usb->grf_soc_status1_rk3288 = (pGRF_SOC_STATUS1_RK3288)grf_soc_status1;
726 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
728 grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
729 if (IS_ERR(grf_soc_status2)){
730 ret = PTR_ERR(grf_soc_status2);
733 control_usb->grf_soc_status2_rk3288 = (pGRF_SOC_STATUS2_RK3288)grf_soc_status2;
735 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
737 grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
738 if (IS_ERR(grf_soc_status19)){
739 ret = PTR_ERR(grf_soc_status19);
742 control_usb->grf_soc_status19_rk3288 = (pGRF_SOC_STATUS19_RK3288)grf_soc_status19;
744 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
746 grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
747 if (IS_ERR(grf_soc_status21)){
748 ret = PTR_ERR(grf_soc_status21);
751 control_usb->grf_soc_status21_rk3288 = (pGRF_SOC_STATUS21_RK3288)grf_soc_status21;
753 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
755 grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
756 if (IS_ERR(grf_uoc0_base)){
757 ret = PTR_ERR(grf_uoc0_base);
760 control_usb->grf_uoc0_base = (pGRF_UOC0_REG)grf_uoc0_base;
762 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
764 grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
765 if (IS_ERR(grf_uoc1_base)){
766 ret = PTR_ERR(grf_uoc1_base);
769 control_usb->grf_uoc1_base = (pGRF_UOC1_REG)grf_uoc1_base;
771 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
773 grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
774 if (IS_ERR(grf_uoc2_base)){
775 ret = PTR_ERR(grf_uoc2_base);
778 control_usb->grf_uoc2_base = (pGRF_UOC2_REG)grf_uoc2_base;
780 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
782 grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
783 if (IS_ERR(grf_uoc3_base)){
784 ret = PTR_ERR(grf_uoc3_base);
787 control_usb->grf_uoc3_base = (pGRF_UOC3_REG)grf_uoc3_base;
789 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
791 grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
792 if (IS_ERR(grf_uoc4_base)){
793 ret = PTR_ERR(grf_uoc4_base);
796 control_usb->grf_uoc4_base = (pGRF_UOC4_REG)grf_uoc4_base;
803 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
805 .compatible = "rockchip,rk3288-dwc-control-usb",
812 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
815 struct device_node *np = pdev->dev.of_node;
816 // struct clk* hclk_usb_peri;
819 control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb),GFP_KERNEL);
821 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
826 control_usb->chip_id = RK3288_USB_CTLR;
827 control_usb->remote_wakeup = of_property_read_bool(np,
828 "rockchip,remote_wakeup");
829 control_usb->usb_irq_wakeup = of_property_read_bool(np,
830 "rockchip,usb_irq_wakeup");
833 hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
834 if (IS_ERR(hclk_usb_peri)) {
835 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
840 control_usb->hclk_usb_peri = hclk_usb_peri;
841 clk_prepare_enable(hclk_usb_peri);
843 ret = usb_grf_ioremap(pdev);
845 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
849 control_usb->host_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
850 if(!control_usb->host_gpios){
851 dev_err(&pdev->dev, "unable to alloc memory for host_gpios\n");
856 gpio = of_get_named_gpio(np, "gpios", 0);
857 if(!gpio_is_valid(gpio)){
858 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
862 control_usb->host_gpios->gpio = gpio;
863 err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
866 "failed to request GPIO%d for host_drv\n",
871 gpio_direction_output(control_usb->host_gpios->gpio, 1);
873 control_usb->otg_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
874 if(!control_usb->otg_gpios){
875 dev_err(&pdev->dev, "unable to alloc memory for otg_gpios\n");
880 gpio = of_get_named_gpio(np, "gpios", 1);
881 if(!gpio_is_valid(gpio)){
882 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
886 control_usb->otg_gpios->gpio = gpio;
887 err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
890 "failed to request GPIO%d for otg_drv\n",
895 gpio_direction_output(control_usb->otg_gpios->gpio, 0);
898 ret = otg_irq_detect_init(pdev);
906 // clk_disable_unprepare(hclk_usb_peri);
911 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
914 // clk_disable_unprepare(control_usb->hclk_usb_peri);
918 static struct platform_driver dwc_otg_control_usb_driver = {
919 .probe = dwc_otg_control_usb_probe,
920 .remove = dwc_otg_control_usb_remove,
922 .name = "rk3288-dwc-control-usb",
923 .owner = THIS_MODULE,
924 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
928 static int __init dwc_otg_control_usb_init(void)
930 return platform_driver_register(&dwc_otg_control_usb_driver);
933 subsys_initcall(dwc_otg_control_usb_init);
935 static void __exit dwc_otg_control_usb_exit(void)
937 platform_driver_unregister(&dwc_otg_control_usb_driver);
940 module_exit(dwc_otg_control_usb_exit);
941 MODULE_ALIAS("platform: dwc_control_usb");
942 MODULE_AUTHOR("RockChip Inc.");
943 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
944 MODULE_LICENSE("GPL v2");