3 #include "usbdev_grf_regs.h"
4 #include "dwc_otg_regs.h"
5 static struct dwc_otg_control_usb *control_usb;
7 int is_rk3288_usb(void)
12 return control_usb->chip_id == RK3288_USB_CTLR ? true : false;
15 #ifdef CONFIG_USB20_OTG
16 static void usb20otg_hw_init(void)
18 #ifndef CONFIG_USB20_HOST
19 /* enable soft control */
20 control_usb->grf_uoc2_base->CON2 = (0x01 << 2) | ((0x01 << 2) << 16);
22 control_usb->grf_uoc2_base->CON3 = 0x2A | (0x3F << 16);
24 /* usb phy config init
25 * usb phy enter usb mode */
26 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
28 /* other haredware init,include:
29 * DRV_VBUS GPIO init */
30 if (gpio_is_valid(control_usb->otg_gpios->gpio)) {
31 if (gpio_get_value(control_usb->otg_gpios->gpio))
32 gpio_set_value(control_usb->otg_gpios->gpio, 0);
36 static void usb20otg_phy_suspend(void *pdata, int suspend)
38 struct dwc_otg_platform_data *usbpdata = pdata;
41 /* enable soft control */
42 control_usb->grf_uoc0_base->CON2 =
43 (0x01 << 2) | ((0x01 << 2) << 16);
45 control_usb->grf_uoc0_base->CON3 = 0x2A | (0x3F << 16);
46 usbpdata->phy_status = 1;
49 control_usb->grf_uoc0_base->CON2 = ((0x01 << 2) << 16);
50 usbpdata->phy_status = 0;
54 static void usb20otg_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
56 struct dwc_otg_platform_data *usbpdata = pdata;
57 struct reset_control *rst_otg_h, *rst_otg_p, *rst_otg_c;
59 rst_otg_h = devm_reset_control_get(usbpdata->dev, "otg_ahb");
60 rst_otg_p = devm_reset_control_get(usbpdata->dev, "otg_phy");
61 rst_otg_c = devm_reset_control_get(usbpdata->dev, "otg_controller");
62 if (IS_ERR(rst_otg_h) || IS_ERR(rst_otg_p) || IS_ERR(rst_otg_c)) {
63 dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
67 reset_control_assert(rst_otg_h);
68 reset_control_assert(rst_otg_p);
69 reset_control_assert(rst_otg_c);
71 reset_control_deassert(rst_otg_h);
72 reset_control_deassert(rst_otg_p);
73 reset_control_deassert(rst_otg_c);
77 static void usb20otg_clock_init(void *pdata)
79 struct dwc_otg_platform_data *usbpdata = pdata;
80 struct clk *ahbclk, *phyclk;
82 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb0");
84 dev_err(usbpdata->dev, "Failed to get hclk_usb0\n");
88 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy0");
90 dev_err(usbpdata->dev, "Failed to get clk_usbphy0\n");
94 usbpdata->phyclk = phyclk;
95 usbpdata->ahbclk = ahbclk;
98 static void usb20otg_clock_enable(void *pdata, int enable)
100 struct dwc_otg_platform_data *usbpdata = pdata;
103 clk_prepare_enable(usbpdata->ahbclk);
104 clk_prepare_enable(usbpdata->phyclk);
106 clk_disable_unprepare(usbpdata->ahbclk);
107 clk_disable_unprepare(usbpdata->phyclk);
111 static int usb20otg_get_status(int id)
116 case USB_STATUS_BVABLID:
118 ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
120 case USB_STATUS_DPDM:
122 ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
126 ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
129 ret = control_usb->chip_id;
131 case USB_REMOTE_WAKEUP:
132 ret = control_usb->remote_wakeup;
135 ret = control_usb->usb_irq_wakeup;
144 #ifdef CONFIG_RK_USB_UART
146 * dwc_otg_uart_enabled - check if a usb-uart bypass func is enabled in DT
148 * Returns true if the status property of node "usb_uart" is set to "okay"
149 * or "ok", if this property is absent it will use the default status "ok"
152 static bool dwc_otg_uart_enabled(void)
154 struct device_node *np;
156 np = of_find_node_by_name(NULL, "usb_uart");
157 if (np && of_device_is_available(np))
163 static void dwc_otg_uart_mode(void *pdata, int enter_usb_uart_mode)
165 if ((1 == enter_usb_uart_mode) && dwc_otg_uart_enabled()) {
166 /* bypass dm, enter uart mode */
167 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
169 } else if (0 == enter_usb_uart_mode) {
171 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
175 static void dwc_otg_uart_mode(void *pdata, int enter_usb_uart_mode)
180 static void usb20otg_power_enable(int enable)
183 /* disable otg_drv power */
184 if (gpio_is_valid(control_usb->otg_gpios->gpio))
185 gpio_set_value(control_usb->otg_gpios->gpio, 0);
186 else if (usb20otg_get_status(USB_STATUS_BVABLID))
187 rk_battery_charger_detect_cb(USB_OTG_POWER_OFF);
188 } else if (1 == enable) {
189 /* enable otg_drv power */
190 if (gpio_is_valid(control_usb->otg_gpios->gpio))
191 gpio_set_value(control_usb->otg_gpios->gpio, 1);
192 else if (!usb20otg_get_status(USB_STATUS_BVABLID))
193 rk_battery_charger_detect_cb(USB_OTG_POWER_ON);
197 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
202 .hw_init = usb20otg_hw_init,
203 .phy_suspend = usb20otg_phy_suspend,
204 .soft_reset = usb20otg_soft_reset,
205 .clock_init = usb20otg_clock_init,
206 .clock_enable = usb20otg_clock_enable,
207 .get_status = usb20otg_get_status,
208 .power_enable = usb20otg_power_enable,
209 .dwc_otg_uart_mode = dwc_otg_uart_mode,
210 .bc_detect_cb = rk_battery_charger_detect_cb,
215 #ifdef CONFIG_USB20_HOST
217 static void usb20host_hw_init(void)
219 /* usb phy config init
220 * set common_on = 0, in suspend mode, host1 PLL blocks remain powered.
221 * for RK3288, ehci1 and other modules use host1 (DWC_OTG) 480M phy clk.
223 control_usb->grf_uoc2_base->CON0 = (1 << 16) | 0;
225 /* other haredware init,include:
226 * DRV_VBUS GPIO init */
227 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
228 if (!gpio_get_value(control_usb->host_gpios->gpio))
229 gpio_set_value(control_usb->host_gpios->gpio, 1);
233 static void usb20host_phy_suspend(void *pdata, int suspend)
235 struct dwc_otg_platform_data *usbpdata = pdata;
238 /* enable soft control */
239 control_usb->grf_uoc2_base->CON2 =
240 (0x01 << 2) | ((0x01 << 2) << 16);
242 control_usb->grf_uoc2_base->CON3 = 0x2A | (0x3F << 16);
243 usbpdata->phy_status = 1;
246 control_usb->grf_uoc2_base->CON2 = ((0x01 << 2) << 16);
247 usbpdata->phy_status = 0;
251 static void usb20host_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
253 struct dwc_otg_platform_data *usbpdata = pdata;
254 struct reset_control *rst_host1_h, *rst_host1_p, *rst_host1_c;
256 rst_host1_h = devm_reset_control_get(usbpdata->dev, "host1_ahb");
257 rst_host1_p = devm_reset_control_get(usbpdata->dev, "host1_phy");
258 rst_host1_c = devm_reset_control_get(usbpdata->dev, "host1_controller");
259 if (IS_ERR(rst_host1_h) || IS_ERR(rst_host1_p) || IS_ERR(rst_host1_c)) {
260 dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
264 reset_control_assert(rst_host1_h);
265 reset_control_assert(rst_host1_p);
266 reset_control_assert(rst_host1_c);
268 reset_control_deassert(rst_host1_h);
269 reset_control_deassert(rst_host1_p);
270 reset_control_deassert(rst_host1_c);
274 static void usb20host_clock_init(void *pdata)
276 struct dwc_otg_platform_data *usbpdata = pdata;
277 struct clk *ahbclk, *phyclk, *phyclk_480m;
279 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb1");
280 if (IS_ERR(ahbclk)) {
281 dev_err(usbpdata->dev, "Failed to get hclk_usb1\n");
285 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy1");
286 if (IS_ERR(phyclk)) {
287 dev_err(usbpdata->dev, "Failed to get clk_usbphy1\n");
291 phyclk_480m = devm_clk_get(usbpdata->dev, "usbphy_480m");
292 if (IS_ERR(phyclk_480m)) {
293 dev_err(usbpdata->dev, "Failed to get usbphy_480m\n");
297 usbpdata->phyclk = phyclk;
298 usbpdata->ahbclk = ahbclk;
299 usbpdata->phyclk_480m = phyclk_480m;
302 static void usb20host_clock_enable(void *pdata, int enable)
304 struct dwc_otg_platform_data *usbpdata = pdata;
307 clk_prepare_enable(usbpdata->ahbclk);
308 clk_prepare_enable(usbpdata->phyclk);
310 clk_disable_unprepare(usbpdata->ahbclk);
311 clk_disable_unprepare(usbpdata->phyclk);
315 static int usb20host_get_status(int id)
320 case USB_STATUS_BVABLID:
322 ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;
324 case USB_STATUS_DPDM:
326 ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
330 ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
333 ret = control_usb->chip_id;
335 case USB_REMOTE_WAKEUP:
336 ret = control_usb->remote_wakeup;
339 ret = control_usb->usb_irq_wakeup;
348 static void usb20host_power_enable(int enable)
351 /* disable host_drv power */
352 if (gpio_is_valid(control_usb->host_gpios->gpio))
353 gpio_set_value(control_usb->host_gpios->gpio, 0);
354 } else if (1 == enable) {
355 /* enable host_drv power */
356 if (gpio_is_valid(control_usb->host_gpios->gpio))
357 gpio_set_value(control_usb->host_gpios->gpio, 1);
361 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
366 .hw_init = usb20host_hw_init,
367 .phy_suspend = usb20host_phy_suspend,
368 .soft_reset = usb20host_soft_reset,
369 .clock_init = usb20host_clock_init,
370 .clock_enable = usb20host_clock_enable,
371 .get_status = usb20host_get_status,
372 .power_enable = usb20host_power_enable,
377 #ifdef CONFIG_USB_EHCI1_RK
378 static void rk_ehci1_hw_init(void)
380 /* usb phy config init
381 * ehci1 phy config init, set ehci1phy_txsrtune */
382 control_usb->grf_uoc3_base->CON0 = ((0xf << 6) << 16) | (0xf << 6);
384 /* other haredware init
385 * set common_on = 0, in suspend mode,
386 * otg/host PLL blocks remain powered
387 * for RK3288, use host1 (DWC_OTG) 480M phy clk
389 control_usb->grf_uoc2_base->CON0 = (1 << 16) | 0;
391 /* change INCR to INCR16 or INCR8(beats less than 16)
392 * or INCR4(beats less than 8) or SINGLE(beats less than 4)
394 control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
397 static void rk_ehci1_clock_init(void *pdata)
399 /* By default, ehci1phy_480m's parent is otg phy 480MHz clk
400 * rk3188 must use host phy 480MHz clk, because if otg bypass
401 * to uart mode, otg phy 480MHz clk will be closed automatically
403 struct rkehci_platform_data *usbpdata = pdata;
404 struct clk *ahbclk, *phyclk480m_ehci1, *phyclk12m_ehci1;
406 phyclk480m_ehci1 = devm_clk_get(usbpdata->dev, "ehci1phy_480m");
407 if (IS_ERR(phyclk480m_ehci1)) {
408 dev_err(usbpdata->dev, "Failed to get ehci1phy_480m\n");
412 phyclk12m_ehci1 = devm_clk_get(usbpdata->dev, "ehci1phy_12m");
413 if (IS_ERR(phyclk12m_ehci1)) {
414 dev_err(usbpdata->dev, "Failed to get ehci1phy_12m\n");
418 ahbclk = devm_clk_get(usbpdata->dev, "hclk_ehci1");
419 if (IS_ERR(ahbclk)) {
420 dev_err(usbpdata->dev, "Failed to get hclk_ehci1\n");
424 usbpdata->hclk_ehci = ahbclk;
425 usbpdata->ehci_phy_480m = phyclk480m_ehci1;
426 usbpdata->ehci_phy_12m = phyclk12m_ehci1;
429 static void rk_ehci1_clock_enable(void *pdata, int enable)
431 struct rkehci_platform_data *usbpdata = pdata;
433 if (enable == usbpdata->clk_status)
436 clk_prepare_enable(usbpdata->hclk_ehci);
437 clk_prepare_enable(usbpdata->ehci_phy_480m);
438 clk_prepare_enable(usbpdata->ehci_phy_12m);
439 usbpdata->clk_status = 1;
441 clk_disable_unprepare(usbpdata->hclk_ehci);
442 clk_disable_unprepare(usbpdata->ehci_phy_480m);
443 clk_disable_unprepare(usbpdata->ehci_phy_12m);
444 usbpdata->clk_status = 0;
448 static void rk_ehci1_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
450 struct rkehci_platform_data *usbpdata = pdata;
451 struct reset_control *rst_ehci1_h, *rst_ehci1_a, *rst_ehci1_p;
453 rst_ehci1_h = devm_reset_control_get(usbpdata->dev, "ehci1_ahb");
454 rst_ehci1_a = devm_reset_control_get(usbpdata->dev, "ehci1_aux");
455 rst_ehci1_p = devm_reset_control_get(usbpdata->dev, "ehci1_phy");
457 reset_control_assert(rst_ehci1_h);
458 reset_control_assert(rst_ehci1_a);
459 reset_control_assert(rst_ehci1_p);
461 reset_control_deassert(rst_ehci1_h);
462 reset_control_deassert(rst_ehci1_a);
463 reset_control_deassert(rst_ehci1_p);
466 /* EHCI1 per-port reset */
467 control_usb->grf_uoc3_base->CON0 = ((1 << 10) << 16) | (1 << 10);
469 control_usb->grf_uoc3_base->CON0 = ((1 << 10) << 16) | (0 << 10);
473 struct rkehci_platform_data rkehci1_pdata_rk3288 = {
475 .ehci_phy_12m = NULL,
476 .ehci_phy_480m = NULL,
478 .hw_init = rk_ehci1_hw_init,
479 .clock_init = rk_ehci1_clock_init,
480 .clock_enable = rk_ehci1_clock_enable,
481 .soft_reset = rk_ehci1_soft_reset,
485 #ifdef CONFIG_USB_EHCI_RK
486 static void rk_ehci_hw_init(void)
488 /* usb phy config init */
490 /* DRV_VBUS GPIO init */
491 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
492 if (!gpio_get_value(control_usb->host_gpios->gpio))
493 gpio_set_value(control_usb->host_gpios->gpio, 1);
497 static void rk_ehci_phy_suspend(void *pdata, int suspend)
499 struct rkehci_platform_data *usbpdata = pdata;
502 /* enable soft control */
503 control_usb->grf_uoc1_base->CON2 =
504 (0x01 << 2) | ((0x01 << 2) << 16);
506 control_usb->grf_uoc1_base->CON3 = 0x2A | (0x3F << 16);
507 usbpdata->phy_status = 1;
510 control_usb->grf_uoc1_base->CON2 = ((0x01 << 2) << 16);
511 usbpdata->phy_status = 0;
515 static void rk_ehci_clock_init(void *pdata)
517 struct rkehci_platform_data *usbpdata = pdata;
518 struct clk *ahbclk, *phyclk;
520 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb2");
521 if (IS_ERR(ahbclk)) {
522 dev_err(usbpdata->dev, "Failed to get hclk_usb2\n");
526 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy2");
527 if (IS_ERR(phyclk)) {
528 dev_err(usbpdata->dev, "Failed to get clk_usbphy2\n");
532 usbpdata->phyclk = phyclk;
533 usbpdata->ahbclk = ahbclk;
536 static void rk_ehci_clock_enable(void *pdata, int enable)
538 struct rkehci_platform_data *usbpdata = pdata;
540 if (enable == usbpdata->clk_status)
543 clk_prepare_enable(usbpdata->ahbclk);
544 clk_prepare_enable(usbpdata->phyclk);
545 usbpdata->clk_status = 1;
547 clk_disable_unprepare(usbpdata->ahbclk);
548 clk_disable_unprepare(usbpdata->phyclk);
549 usbpdata->clk_status = 0;
553 static void rk_ehci_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
555 struct rkehci_platform_data *usbpdata = pdata;
556 struct reset_control *rst_host0_h, *rst_host0_p,
557 *rst_host0_c , *rst_host0;
559 rst_host0_h = devm_reset_control_get(usbpdata->dev, "ehci_ahb");
560 rst_host0_p = devm_reset_control_get(usbpdata->dev, "ehci_phy");
561 rst_host0_c = devm_reset_control_get(usbpdata->dev, "ehci_controller");
562 rst_host0 = devm_reset_control_get(usbpdata->dev, "ehci");
563 if (IS_ERR(rst_host0_h) || IS_ERR(rst_host0_p) ||
564 IS_ERR(rst_host0_c) || IS_ERR(rst_host0)) {
565 dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
569 reset_control_assert(rst_host0_h);
570 reset_control_assert(rst_host0_p);
571 reset_control_assert(rst_host0_c);
572 reset_control_assert(rst_host0);
574 reset_control_deassert(rst_host0_h);
575 reset_control_deassert(rst_host0_p);
576 reset_control_deassert(rst_host0_c);
577 reset_control_deassert(rst_host0);
581 static int rk_ehci_get_status(int id)
586 case USB_STATUS_DPDM:
588 ret = control_usb->grf_soc_status2_rk3288->host0_linestate;
591 ret = control_usb->chip_id;
593 case USB_REMOTE_WAKEUP:
594 ret = control_usb->remote_wakeup;
597 ret = control_usb->usb_irq_wakeup;
606 struct rkehci_platform_data rkehci_pdata_rk3288 = {
611 .hw_init = rk_ehci_hw_init,
612 .phy_suspend = rk_ehci_phy_suspend,
613 .clock_init = rk_ehci_clock_init,
614 .clock_enable = rk_ehci_clock_enable,
615 .soft_reset = rk_ehci_soft_reset,
616 .get_status = rk_ehci_get_status,
620 #ifdef CONFIG_USB_OHCI_HCD_RK
621 static void rk_ohci_hw_init(void)
623 /* usb phy config init */
625 /* DRV_VBUS GPIO init */
626 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
627 if (!gpio_get_value(control_usb->host_gpios->gpio))
628 gpio_set_value(control_usb->host_gpios->gpio, 1);
632 static void rk_ohci_clock_init(void *pdata)
634 struct rkehci_platform_data *usbpdata = pdata;
635 struct clk *ahbclk, *phyclk;
637 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb3");
638 if (IS_ERR(ahbclk)) {
639 dev_err(usbpdata->dev, "Failed to get hclk_usb3\n");
643 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy3");
644 if (IS_ERR(phyclk)) {
645 dev_err(usbpdata->dev, "Failed to get clk_usbphy3\n");
649 usbpdata->phyclk = phyclk;
650 usbpdata->ahbclk = ahbclk;
653 static void rk_ohci_clock_enable(void *pdata, int enable)
655 struct rkehci_platform_data *usbpdata = pdata;
657 if (enable == usbpdata->clk_status)
660 clk_prepare_enable(usbpdata->ahbclk);
661 clk_prepare_enable(usbpdata->phyclk);
662 usbpdata->clk_status = 1;
664 clk_disable_unprepare(usbpdata->ahbclk);
665 clk_disable_unprepare(usbpdata->phyclk);
666 usbpdata->clk_status = 0;
670 static void rk_ohci_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
674 struct rkehci_platform_data rkohci_pdata_rk3288 = {
678 .hw_init = rk_ohci_hw_init,
679 .clock_init = rk_ohci_clock_init,
680 .clock_enable = rk_ohci_clock_enable,
681 .soft_reset = rk_ohci_soft_reset,
685 /*********************************************************************
686 rk3288 usb detections
687 *********************************************************************/
689 #define WAKE_LOCK_TIMEOUT (HZ * 10)
690 static inline void do_wakeup(struct work_struct *work)
692 /* wake up the system */
693 rk_send_wakeup_key();
696 static void usb_battery_charger_detect_work(struct work_struct *work)
698 rk_battery_charger_detect_cb(usb_battery_charger_detect(1));
701 /********** handler for bvalid irq **********/
702 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
705 control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
707 /* usb otg dp/dm switch to usb phy */
708 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
710 if (control_usb->usb_irq_wakeup) {
711 wake_lock_timeout(&control_usb->usb_wakelock,
713 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
716 schedule_delayed_work(&control_usb->usb_charger_det_work, HZ / 10);
721 /***** handler for otg id rise and fall edge *****/
722 static irqreturn_t id_irq_handler(int irq, void *dev_id)
724 unsigned int uoc_con;
727 uoc_con = control_usb->grf_uoc0_base->CON4;
730 if (uoc_con & (1 << 5)) {
731 /* clear id rise irq pandding */
732 control_usb->grf_uoc0_base->CON4 = ((1 << 5) | (1 << 21));
736 if (uoc_con & (1 << 7)) {
737 /* usb otg dp/dm switch to usb phy */
738 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
739 /* clear id fall irq pandding */
740 control_usb->grf_uoc0_base->CON4 = ((1 << 7) | (1 << 23));
743 if (control_usb->usb_irq_wakeup) {
744 wake_lock_timeout(&control_usb->usb_wakelock,
746 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
753 #ifdef USB_LINESTATE_IRQ
754 /***** handler for usb line status change *****/
756 static irqreturn_t line_irq_handler(int irq, void *dev_id)
760 if (control_usb->grf_uoc0_base->CON0 & 1 << 15)
761 control_usb->grf_uoc0_base->CON0 = (1 << 15 | 1 << 31);
763 if (control_usb->grf_uoc1_base->CON0 & 1 << 15)
764 control_usb->grf_uoc1_base->CON0 = (1 << 15 | 1 << 31);
766 if (control_usb->grf_uoc2_base->CON0 & 1 << 15)
767 control_usb->grf_uoc2_base->CON0 = (1 << 15 | 1 << 31);
769 if (control_usb->usb_irq_wakeup) {
770 wake_lock_timeout(&control_usb->usb_wakelock,
772 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
780 /************* register usb detection irqs **************/
781 static int otg_irq_detect_init(struct platform_device *pdev)
785 if (control_usb->usb_irq_wakeup) {
786 wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND,
788 INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
791 /*register otg_bvalid irq */
792 irq = platform_get_irq_byname(pdev, "otg_bvalid");
793 if ((irq > 0) && control_usb->usb_irq_wakeup) {
794 ret = request_irq(irq, bvalid_irq_handler,
795 0, "otg_bvalid", NULL);
797 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
799 /* enable bvalid irq */
800 control_usb->grf_uoc0_base->CON4 = 0x000c000c;
804 /*register otg_id irq */
805 irq = platform_get_irq_byname(pdev, "otg_id");
806 if ((irq > 0) && control_usb->usb_irq_wakeup) {
807 ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL);
809 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
811 /* enable otg_id irq */
812 control_usb->grf_uoc0_base->CON4 = 0x00f000f0;
816 /*register otg_linestate irq */
817 irq = platform_get_irq_byname(pdev, "otg_linestate");
820 request_irq(irq, line_irq_handler, 0, "otg_linestate",
823 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
826 control_usb->grf_uoc0_base->CON0 = 0xc000c000;
827 if (control_usb->usb_irq_wakeup)
828 enable_irq_wake(irq);
832 /*register host0_linestate irq */
833 irq = platform_get_irq_byname(pdev, "host0_linestate");
836 request_irq(irq, line_irq_handler, 0, "host0_linestate",
839 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
842 control_usb->grf_uoc1_base->CON0 = 0xc000c000;
843 if (control_usb->usb_irq_wakeup)
844 enable_irq_wake(irq);
848 /*register host1_linestate irq */
849 irq = platform_get_irq_byname(pdev, "host1_linestate");
852 request_irq(irq, line_irq_handler, 0, "host1_linestate",
855 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
858 control_usb->grf_uoc2_base->CON0 = 0xc000c000;
859 if (control_usb->usb_irq_wakeup)
860 enable_irq_wake(irq);
867 /********** end of rk3288 usb detections **********/
869 static int usb_grf_ioremap(struct platform_device *pdev)
872 struct resource *res;
873 void *grf_soc_status1;
874 void *grf_soc_status2;
875 void *grf_soc_status19;
876 void *grf_soc_status21;
883 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
885 grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
886 if (IS_ERR(grf_soc_status1)) {
887 ret = PTR_ERR(grf_soc_status1);
890 control_usb->grf_soc_status1_rk3288 =
891 (pGRF_SOC_STATUS1_RK3288) grf_soc_status1;
893 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
895 grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
896 if (IS_ERR(grf_soc_status2)) {
897 ret = PTR_ERR(grf_soc_status2);
900 control_usb->grf_soc_status2_rk3288 =
901 (pGRF_SOC_STATUS2_RK3288) grf_soc_status2;
903 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
905 grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
906 if (IS_ERR(grf_soc_status19)) {
907 ret = PTR_ERR(grf_soc_status19);
910 control_usb->grf_soc_status19_rk3288 =
911 (pGRF_SOC_STATUS19_RK3288) grf_soc_status19;
913 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
915 grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
916 if (IS_ERR(grf_soc_status21)) {
917 ret = PTR_ERR(grf_soc_status21);
920 control_usb->grf_soc_status21_rk3288 =
921 (pGRF_SOC_STATUS21_RK3288) grf_soc_status21;
923 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
925 grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
926 if (IS_ERR(grf_uoc0_base)) {
927 ret = PTR_ERR(grf_uoc0_base);
930 control_usb->grf_uoc0_base = (pGRF_UOC0_REG) grf_uoc0_base;
932 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
934 grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
935 if (IS_ERR(grf_uoc1_base)) {
936 ret = PTR_ERR(grf_uoc1_base);
939 control_usb->grf_uoc1_base = (pGRF_UOC1_REG) grf_uoc1_base;
941 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
943 grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
944 if (IS_ERR(grf_uoc2_base)) {
945 ret = PTR_ERR(grf_uoc2_base);
948 control_usb->grf_uoc2_base = (pGRF_UOC2_REG) grf_uoc2_base;
950 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
952 grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
953 if (IS_ERR(grf_uoc3_base)) {
954 ret = PTR_ERR(grf_uoc3_base);
957 control_usb->grf_uoc3_base = (pGRF_UOC3_REG) grf_uoc3_base;
959 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
961 grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
962 if (IS_ERR(grf_uoc4_base)) {
963 ret = PTR_ERR(grf_uoc4_base);
966 control_usb->grf_uoc4_base = (pGRF_UOC4_REG) grf_uoc4_base;
971 static int rk_usb_control_probe(struct platform_device *pdev)
974 struct device_node *np = pdev->dev.of_node;
978 devm_kzalloc(&pdev->dev, sizeof(*control_usb), GFP_KERNEL);
980 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
985 control_usb->chip_id = RK3288_USB_CTLR;
986 control_usb->remote_wakeup = of_property_read_bool(np,
987 "rockchip,remote_wakeup");
988 control_usb->usb_irq_wakeup = of_property_read_bool(np,
989 "rockchip,usb_irq_wakeup");
991 INIT_DELAYED_WORK(&control_usb->usb_charger_det_work,
992 usb_battery_charger_detect_work);
994 control_usb->host_gpios =
995 devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
996 if (!control_usb->host_gpios) {
997 dev_err(&pdev->dev, "unable to alloc memory for host_gpios\n");
1002 gpio = of_get_named_gpio(np, "host_drv_gpio", 0);
1003 control_usb->host_gpios->gpio = gpio;
1005 if (!gpio_is_valid(gpio)) {
1006 dev_warn(&pdev->dev, "host_drv_gpio is not specified or invalid\n");
1008 err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
1011 "failed to request GPIO%d for host_drv\n",
1016 gpio_direction_output(control_usb->host_gpios->gpio, 1);
1019 control_usb->otg_gpios =
1020 devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
1021 if (!control_usb->otg_gpios) {
1022 dev_err(&pdev->dev, "unable to alloc memory for otg_gpios\n");
1027 gpio = of_get_named_gpio(np, "otg_drv_gpio", 0);
1028 control_usb->otg_gpios->gpio = gpio;
1030 if (!gpio_is_valid(gpio)) {
1031 dev_warn(&pdev->dev, "otg_drv_gpio is not specified or invalid\n");
1033 err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
1036 "failed to request GPIO%d for otg_drv\n", gpio);
1040 gpio_direction_output(control_usb->otg_gpios->gpio, 0);
1048 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
1050 .compatible = "rockchip,rk3288-dwc-control-usb",
1056 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
1060 ret = rk_usb_control_probe(pdev);
1064 control_usb->hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
1065 if (IS_ERR(control_usb->hclk_usb_peri)) {
1066 dev_info(&pdev->dev, "no hclk_usb_peri specified\n");
1067 control_usb->hclk_usb_peri = NULL;
1070 clk_prepare_enable(control_usb->hclk_usb_peri);
1072 ret = usb_grf_ioremap(pdev);
1074 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
1077 #ifdef CONFIG_USB20_OTG
1078 if (usb20otg_get_status(USB_STATUS_BVABLID))
1079 schedule_delayed_work(&control_usb->usb_charger_det_work,
1083 ret = otg_irq_detect_init(pdev);
1090 clk_disable_unprepare(control_usb->hclk_usb_peri);
1094 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
1096 clk_disable_unprepare(control_usb->hclk_usb_peri);
1100 static struct platform_driver dwc_otg_control_usb_driver = {
1101 .probe = dwc_otg_control_usb_probe,
1102 .remove = dwc_otg_control_usb_remove,
1104 .name = "rk3288-dwc-control-usb",
1105 .owner = THIS_MODULE,
1106 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
1110 static int __init dwc_otg_control_usb_init(void)
1114 retval = platform_driver_register(&dwc_otg_control_usb_driver);
1117 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1123 subsys_initcall(dwc_otg_control_usb_init);
1125 static void __exit dwc_otg_control_usb_exit(void)
1127 platform_driver_unregister(&dwc_otg_control_usb_driver);
1130 module_exit(dwc_otg_control_usb_exit);
1131 MODULE_ALIAS("platform: dwc_control_usb");
1132 MODULE_AUTHOR("RockChip Inc.");
1133 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
1134 MODULE_LICENSE("GPL v2");