2 * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
3 * Caesar Wang <wxt@rock-chips.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/interrupt.h>
19 #include <linux/module.h>
21 #include <linux/of_address.h>
22 #include <linux/of_irq.h>
23 #include <linux/platform_device.h>
24 #include <linux/regmap.h>
25 #include <linux/reset.h>
26 #include <linux/thermal.h>
27 #include <linux/mfd/syscon.h>
28 #include <linux/pinctrl/consumer.h>
31 * If the temperature over a period of time High,
32 * the resulting TSHUT gave CRU module,let it reset the entire chip,
33 * or via GPIO give PMIC.
41 * The system Temperature Sensors tshut(tshut) polarity
42 * the bit 8 is tshut polarity.
43 * 0: low active, 1: high active
51 * The system has two Temperature Sensors.
52 * sensor0 is for CPU, and sensor1 is for GPU.
60 * The conversion table has the adc value and temperature.
61 * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
62 * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
70 * The max sensors is two in rockchip SoCs.
71 * Two sensors: CPU and GPU sensor.
73 #define SOC_MAX_SENSORS 2
76 * struct chip_tsadc_table - hold information about chip-specific differences
77 * @id: conversion table
78 * @length: size of conversion table
79 * @data_mask: mask to apply on data inputs
80 * @mode: sort mode of this adc variant (incrementing or decrementing)
82 struct chip_tsadc_table {
83 const struct tsadc_table *id;
86 enum adc_sort_mode mode;
90 * struct rockchip_tsadc_chip - hold the private data of tsadc chip
91 * @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel
92 * @chn_num: the channel number of tsadc chip
93 * @tshut_temp: the hardware-controlled shutdown temperature value
94 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
95 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
96 * @initialize: SoC special initialize tsadc controller method
97 * @irq_ack: clear the interrupt
98 * @get_temp: get the temperature
99 * @set_alarm_temp: set the high temperature interrupt
100 * @set_tshut_temp: set the hardware-controlled shutdown temperature
101 * @set_tshut_mode: set the hardware-controlled shutdown mode
102 * @table: the chip-specific conversion table
104 struct rockchip_tsadc_chip {
105 /* The sensor id of chip correspond to the ADC channel */
106 int chn_id[SOC_MAX_SENSORS];
109 /* The hardware-controlled tshut property */
111 enum tshut_mode tshut_mode;
112 enum tshut_polarity tshut_polarity;
114 /* Chip-wide methods */
115 void (*initialize)(struct regmap *grf,
116 void __iomem *reg, enum tshut_polarity p);
117 void (*irq_ack)(void __iomem *reg);
118 void (*control)(void __iomem *reg, bool on);
120 /* Per-sensor methods */
121 int (*get_temp)(struct chip_tsadc_table table,
122 int chn, void __iomem *reg, int *temp);
123 void (*set_alarm_temp)(struct chip_tsadc_table table,
124 int chn, void __iomem *reg, int temp);
125 void (*set_tshut_temp)(struct chip_tsadc_table table,
126 int chn, void __iomem *reg, int temp);
127 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
129 /* Per-table methods */
130 struct chip_tsadc_table table;
134 * struct rockchip_thermal_sensor - hold the information of thermal sensor
135 * @thermal: pointer to the platform/configuration data
136 * @tzd: pointer to a thermal zone
137 * @id: identifier of the thermal sensor
139 struct rockchip_thermal_sensor {
140 struct rockchip_thermal_data *thermal;
141 struct thermal_zone_device *tzd;
146 * struct rockchip_thermal_data - hold the private data of thermal driver
147 * @chip: pointer to the platform/configuration data
148 * @pdev: platform device of thermal
149 * @reset: the reset controller of tsadc
150 * @sensors[SOC_MAX_SENSORS]: the thermal sensor
151 * @clk: the controller clock is divided by the exteral 24MHz
152 * @pclk: the advanced peripherals bus clock
153 * @grf: the general register file will be used to do static set by software
154 * @regs: the base address of tsadc controller
155 * @tshut_temp: the hardware-controlled shutdown temperature value
156 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
157 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
159 struct rockchip_thermal_data {
160 const struct rockchip_tsadc_chip *chip;
161 struct platform_device *pdev;
162 struct reset_control *reset;
164 struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
173 enum tshut_mode tshut_mode;
174 enum tshut_polarity tshut_polarity;
178 * TSADC Sensor Register description:
180 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
181 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
184 #define TSADCV2_USER_CON 0x00
185 #define TSADCV2_AUTO_CON 0x04
186 #define TSADCV2_INT_EN 0x08
187 #define TSADCV2_INT_PD 0x0c
188 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
189 #define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
190 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
191 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
192 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
193 #define TSADCV2_AUTO_PERIOD 0x68
194 #define TSADCV2_AUTO_PERIOD_HT 0x6c
196 #define TSADCV2_AUTO_EN BIT(0)
197 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
198 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
200 #define TSADCV3_AUTO_Q_SEL_EN BIT(1)
202 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
203 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
204 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
206 #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
207 #define TSADCV3_INT_PD_CLEAR_MASK ~BIT(16)
209 #define TSADCV2_DATA_MASK 0xfff
210 #define TSADCV3_DATA_MASK 0x3ff
212 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
213 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
214 #define TSADCV2_AUTO_PERIOD_TIME 250 /* 250ms */
215 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* 50ms */
216 #define TSADCV3_AUTO_PERIOD_TIME 1875 /* 2.5ms */
217 #define TSADCV3_AUTO_PERIOD_HT_TIME 1875 /* 2.5ms */
219 #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
221 #define GRF_SARADC_TESTBIT 0x0e644
222 #define GRF_TSADC_TESTBIT_L 0x0e648
223 #define GRF_TSADC_TESTBIT_H 0x0e64c
225 #define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
226 #define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
227 #define GRF_TSADC_VCM_EN_L (0x10001 << 7)
228 #define GRF_TSADC_VCM_EN_H (0x10001 << 7)
231 * struct tsadc_table - code to temperature conversion table
232 * @code: the value of adc channel
233 * @temp: the temperature
235 * code to temperature mapping of the temperature sensor is a piece wise linear
236 * curve.Any temperature, code faling between to 2 give temperatures can be
237 * linearly interpolated.
238 * Code to Temperature mapping should be updated based on manufacturer results.
245 static const struct tsadc_table rk3228_code_table[] = {
281 {TSADCV2_DATA_MASK, 125000},
284 static const struct tsadc_table rk3288_code_table[] = {
285 {TSADCV2_DATA_MASK, -40000},
322 static const struct tsadc_table rk3328_code_table[] = {
357 {TSADCV2_DATA_MASK, 125000},
360 static const struct tsadc_table rk3368_code_table[] = {
396 {TSADCV3_DATA_MASK, 125000},
399 static const struct tsadc_table rk3399_code_table[] = {
435 {TSADCV3_DATA_MASK, 125000},
438 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
442 u32 error = table.data_mask;
445 high = table.length - 1;
446 mid = (high + low) / 2;
448 /* Return mask code data when the temp is over table range */
449 if (temp < table.id[low].temp || temp > table.id[high].temp)
452 while (low <= high) {
453 if (temp == table.id[mid].temp)
454 return table.id[mid].code;
455 else if (temp < table.id[mid].temp)
459 mid = (low + high) / 2;
463 pr_err("%s: Invalid conversion table: code=%d, temperature=%d\n",
464 __func__, error, temp);
469 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
472 unsigned int low = 1;
473 unsigned int high = table.length - 1;
474 unsigned int mid = (low + high) / 2;
478 WARN_ON(table.length < 2);
480 switch (table.mode) {
482 code &= table.data_mask;
483 if (code < table.id[high].code)
484 return -EAGAIN; /* Incorrect reading */
486 while (low <= high) {
487 if (code >= table.id[mid].code &&
488 code < table.id[mid - 1].code)
490 else if (code < table.id[mid].code)
495 mid = (low + high) / 2;
499 code &= table.data_mask;
500 if (code < table.id[low].code)
501 return -EAGAIN; /* Incorrect reading */
503 while (low <= high) {
504 if (code <= table.id[mid].code &&
505 code > table.id[mid - 1].code)
507 else if (code > table.id[mid].code)
512 mid = (low + high) / 2;
516 pr_err("%s: Invalid the conversion table mode=%d\n",
517 __func__, table.mode);
521 * The 5C granularity provided by the table is too much. Let's
522 * assume that the relationship between sensor readings and
523 * temperature between 2 table entries is linear and interpolate
524 * to produce less granular result.
526 num = table.id[mid].temp - table.id[mid - 1].temp;
527 num *= abs(table.id[mid - 1].code - code);
528 denom = abs(table.id[mid - 1].code - table.id[mid].code);
529 *temp = table.id[mid - 1].temp + (num / denom);
535 * rk_tsadcv2_initialize - initialize TASDC Controller.
537 * (1) Set TSADC_V2_AUTO_PERIOD:
538 * Configure the interleave between every two accessing of
539 * TSADC in normal operation.
541 * (2) Set TSADCV2_AUTO_PERIOD_HT:
542 * Configure the interleave between every two accessing of
543 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
545 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
546 * If the temperature is higher than COMP_INT or COMP_SHUT for
547 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
549 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
550 enum tshut_polarity tshut_polarity)
552 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
553 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
554 regs + TSADCV2_AUTO_CON);
556 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
557 regs + TSADCV2_AUTO_CON);
559 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
560 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
561 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
562 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
563 regs + TSADCV2_AUTO_PERIOD_HT);
564 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
565 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
569 * rk_tsadcv3_initialize - initialize TASDC Controller.
571 * (1) The tsadc control power sequence.
573 * (2) Set TSADC_V2_AUTO_PERIOD:
574 * Configure the interleave between every two accessing of
575 * TSADC in normal operation.
577 * (2) Set TSADCV2_AUTO_PERIOD_HT:
578 * Configure the interleave between every two accessing of
579 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
581 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
582 * If the temperature is higher than COMP_INT or COMP_SHUT for
583 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
585 static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
586 enum tshut_polarity tshut_polarity)
588 /* The tsadc control power sequence */
590 /* Set interleave value to workround ic time sync issue */
591 writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
594 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
595 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
596 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
597 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
598 regs + TSADCV2_AUTO_PERIOD_HT);
599 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
600 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
603 /* Enable the voltage common mode feature */
604 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L);
605 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H);
607 udelay(100); /* The spec note says at least 15 us */
608 regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
609 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
610 udelay(200); /* The spec note says at least 90 us */
612 writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
613 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
614 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
615 writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
616 regs + TSADCV2_AUTO_PERIOD_HT);
617 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
618 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
621 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
622 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
623 regs + TSADCV2_AUTO_CON);
625 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
626 regs + TSADCV2_AUTO_CON);
629 static void rk_tsadcv2_irq_ack(void __iomem *regs)
633 val = readl_relaxed(regs + TSADCV2_INT_PD);
634 writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
637 static void rk_tsadcv3_irq_ack(void __iomem *regs)
641 val = readl_relaxed(regs + TSADCV2_INT_PD);
642 writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
645 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
649 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
651 val |= TSADCV2_AUTO_EN;
653 val &= ~TSADCV2_AUTO_EN;
655 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
659 * rk_tsadcv3_control - the tsadc controller is enabled or disabled.
661 * NOTE: TSADC controller works at auto mode, and some SoCs need set the
662 * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output
663 * adc value if setting this bit to enable.
665 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
669 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
671 val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
673 val &= ~TSADCV2_AUTO_EN;
675 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
678 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
679 int chn, void __iomem *regs, int *temp)
683 val = readl_relaxed(regs + TSADCV2_DATA(chn));
685 return rk_tsadcv2_code_to_temp(table, val, temp);
688 static void rk_tsadcv2_alarm_temp(struct chip_tsadc_table table,
689 int chn, void __iomem *regs, int temp)
691 u32 alarm_value, int_en;
693 /* Make sure the value is valid */
694 alarm_value = rk_tsadcv2_temp_to_code(table, temp);
695 if (alarm_value == table.data_mask)
698 writel_relaxed(alarm_value & table.data_mask,
699 regs + TSADCV2_COMP_INT(chn));
701 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
702 int_en |= TSADCV2_INT_SRC_EN(chn);
703 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
706 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
707 int chn, void __iomem *regs, int temp)
709 u32 tshut_value, val;
711 /* Make sure the value is valid */
712 tshut_value = rk_tsadcv2_temp_to_code(table, temp);
713 if (tshut_value == table.data_mask)
716 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
718 /* TSHUT will be valid */
719 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
720 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
723 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
724 enum tshut_mode mode)
728 val = readl_relaxed(regs + TSADCV2_INT_EN);
729 if (mode == TSHUT_MODE_GPIO) {
730 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
731 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
733 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
734 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
737 writel_relaxed(val, regs + TSADCV2_INT_EN);
740 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
741 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
742 .chn_num = 1, /* one channel for tsadc */
744 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
745 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
748 .initialize = rk_tsadcv2_initialize,
749 .irq_ack = rk_tsadcv3_irq_ack,
750 .control = rk_tsadcv3_control,
751 .get_temp = rk_tsadcv2_get_temp,
752 .set_alarm_temp = rk_tsadcv2_alarm_temp,
753 .set_tshut_temp = rk_tsadcv2_tshut_temp,
754 .set_tshut_mode = rk_tsadcv2_tshut_mode,
757 .id = rk3228_code_table,
758 .length = ARRAY_SIZE(rk3228_code_table),
759 .data_mask = TSADCV3_DATA_MASK,
760 .mode = ADC_INCREMENT,
764 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
765 .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
766 .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
767 .chn_num = 2, /* two channels for tsadc */
769 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
770 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
773 .initialize = rk_tsadcv2_initialize,
774 .irq_ack = rk_tsadcv2_irq_ack,
775 .control = rk_tsadcv2_control,
776 .get_temp = rk_tsadcv2_get_temp,
777 .set_alarm_temp = rk_tsadcv2_alarm_temp,
778 .set_tshut_temp = rk_tsadcv2_tshut_temp,
779 .set_tshut_mode = rk_tsadcv2_tshut_mode,
782 .id = rk3288_code_table,
783 .length = ARRAY_SIZE(rk3288_code_table),
784 .data_mask = TSADCV2_DATA_MASK,
785 .mode = ADC_DECREMENT,
789 static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
790 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
791 .chn_num = 1, /* one channels for tsadc */
793 .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
796 .initialize = rk_tsadcv2_initialize,
797 .irq_ack = rk_tsadcv3_irq_ack,
798 .control = rk_tsadcv3_control,
799 .get_temp = rk_tsadcv2_get_temp,
800 .set_alarm_temp = rk_tsadcv2_alarm_temp,
801 .set_tshut_temp = rk_tsadcv2_tshut_temp,
802 .set_tshut_mode = rk_tsadcv2_tshut_mode,
805 .id = rk3328_code_table,
806 .length = ARRAY_SIZE(rk3328_code_table),
807 .data_mask = TSADCV2_DATA_MASK,
808 .mode = ADC_INCREMENT,
812 static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
813 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
814 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
815 .chn_num = 2, /* two channels for tsadc */
817 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
818 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
821 .initialize = rk_tsadcv3_initialize,
822 .irq_ack = rk_tsadcv3_irq_ack,
823 .control = rk_tsadcv3_control,
824 .get_temp = rk_tsadcv2_get_temp,
825 .set_alarm_temp = rk_tsadcv2_alarm_temp,
826 .set_tshut_temp = rk_tsadcv2_tshut_temp,
827 .set_tshut_mode = rk_tsadcv2_tshut_mode,
830 .id = rk3228_code_table,
831 .length = ARRAY_SIZE(rk3228_code_table),
832 .data_mask = TSADCV3_DATA_MASK,
833 .mode = ADC_INCREMENT,
837 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
838 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
839 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
840 .chn_num = 2, /* two channels for tsadc */
842 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
843 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
846 .initialize = rk_tsadcv2_initialize,
847 .irq_ack = rk_tsadcv2_irq_ack,
848 .control = rk_tsadcv2_control,
849 .get_temp = rk_tsadcv2_get_temp,
850 .set_alarm_temp = rk_tsadcv2_alarm_temp,
851 .set_tshut_temp = rk_tsadcv2_tshut_temp,
852 .set_tshut_mode = rk_tsadcv2_tshut_mode,
855 .id = rk3368_code_table,
856 .length = ARRAY_SIZE(rk3368_code_table),
857 .data_mask = TSADCV3_DATA_MASK,
858 .mode = ADC_INCREMENT,
862 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
863 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
864 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
865 .chn_num = 2, /* two channels for tsadc */
867 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
868 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
871 .initialize = rk_tsadcv3_initialize,
872 .irq_ack = rk_tsadcv3_irq_ack,
873 .control = rk_tsadcv3_control,
874 .get_temp = rk_tsadcv2_get_temp,
875 .set_alarm_temp = rk_tsadcv2_alarm_temp,
876 .set_tshut_temp = rk_tsadcv2_tshut_temp,
877 .set_tshut_mode = rk_tsadcv2_tshut_mode,
880 .id = rk3399_code_table,
881 .length = ARRAY_SIZE(rk3399_code_table),
882 .data_mask = TSADCV3_DATA_MASK,
883 .mode = ADC_INCREMENT,
887 static const struct of_device_id of_rockchip_thermal_match[] = {
889 .compatible = "rockchip,rk3228-tsadc",
890 .data = (void *)&rk3228_tsadc_data,
893 .compatible = "rockchip,rk3288-tsadc",
894 .data = (void *)&rk3288_tsadc_data,
897 .compatible = "rockchip,rk3328-tsadc",
898 .data = (void *)&rk3328_tsadc_data,
901 .compatible = "rockchip,rk3366-tsadc",
902 .data = (void *)&rk3366_tsadc_data,
905 .compatible = "rockchip,rk3368-tsadc",
906 .data = (void *)&rk3368_tsadc_data,
909 .compatible = "rockchip,rk3399-tsadc",
910 .data = (void *)&rk3399_tsadc_data,
914 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
917 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
919 struct thermal_zone_device *tzd = sensor->tzd;
921 tzd->ops->set_mode(tzd,
922 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
925 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
927 struct rockchip_thermal_data *thermal = dev;
930 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
932 thermal->chip->irq_ack(thermal->regs);
934 for (i = 0; i < thermal->chip->chn_num; i++)
935 thermal_zone_device_update(thermal->sensors[i].tzd);
940 static int rockchip_thermal_set_trips(void *_sensor, int low, int high)
942 struct rockchip_thermal_sensor *sensor = _sensor;
943 struct rockchip_thermal_data *thermal = sensor->thermal;
944 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
946 dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n",
947 __func__, sensor->id, low, high);
949 tsadc->set_alarm_temp(tsadc->table,
950 sensor->id, thermal->regs, high);
955 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
957 struct rockchip_thermal_sensor *sensor = _sensor;
958 struct rockchip_thermal_data *thermal = sensor->thermal;
959 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
962 retval = tsadc->get_temp(tsadc->table,
963 sensor->id, thermal->regs, out_temp);
964 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
965 sensor->id, *out_temp, retval);
970 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
971 .get_temp = rockchip_thermal_get_temp,
972 .set_trips = rockchip_thermal_set_trips,
975 static int rockchip_configure_from_dt(struct device *dev,
976 struct device_node *np,
977 struct rockchip_thermal_data *thermal)
979 u32 shut_temp, tshut_mode, tshut_polarity;
981 if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
983 "Missing tshut temp property, using default %d\n",
984 thermal->chip->tshut_temp);
985 thermal->tshut_temp = thermal->chip->tshut_temp;
987 if (shut_temp > INT_MAX) {
988 dev_err(dev, "Invalid tshut temperature specified: %d\n",
992 thermal->tshut_temp = shut_temp;
995 if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
997 "Missing tshut mode property, using default (%s)\n",
998 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
1000 thermal->tshut_mode = thermal->chip->tshut_mode;
1002 thermal->tshut_mode = tshut_mode;
1005 if (thermal->tshut_mode > 1) {
1006 dev_err(dev, "Invalid tshut mode specified: %d\n",
1007 thermal->tshut_mode);
1011 if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
1014 "Missing tshut-polarity property, using default (%s)\n",
1015 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
1017 thermal->tshut_polarity = thermal->chip->tshut_polarity;
1019 thermal->tshut_polarity = tshut_polarity;
1022 if (thermal->tshut_polarity > 1) {
1023 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
1024 thermal->tshut_polarity);
1028 /* The tsadc wont to handle the error in here since some SoCs didn't
1029 * need this property.
1031 thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
1032 if (IS_ERR(thermal->grf))
1033 dev_warn(dev, "Missing rockchip,grf property\n");
1039 rockchip_thermal_register_sensor(struct platform_device *pdev,
1040 struct rockchip_thermal_data *thermal,
1041 struct rockchip_thermal_sensor *sensor,
1044 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
1047 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
1048 tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
1049 thermal->tshut_temp);
1051 sensor->thermal = thermal;
1053 sensor->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, id,
1054 sensor, &rockchip_of_thermal_ops);
1055 if (IS_ERR(sensor->tzd)) {
1056 error = PTR_ERR(sensor->tzd);
1057 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
1066 * Reset TSADC Controller, reset all tsadc registers.
1068 static void rockchip_thermal_reset_controller(struct reset_control *reset)
1070 reset_control_assert(reset);
1071 usleep_range(10, 20);
1072 reset_control_deassert(reset);
1075 static struct platform_device *thermal_device;
1077 void rockchip_dump_temperature(void)
1079 struct rockchip_thermal_data *thermal;
1080 struct platform_device *pdev;
1083 if (!thermal_device)
1086 pdev = thermal_device;
1087 thermal = platform_get_drvdata(pdev);
1089 for (i = 0; i < thermal->chip->chn_num; i++) {
1090 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1091 struct thermal_zone_device *tz = sensor->tzd;
1093 if (tz->temperature != THERMAL_TEMP_INVALID)
1094 dev_warn(&pdev->dev, "channal %d: temperature(%d C)\n",
1095 i, tz->temperature / 1000);
1098 if (thermal->regs) {
1099 pr_warn("THERMAL REGS:\n");
1100 print_hex_dump(KERN_WARNING, "", DUMP_PREFIX_OFFSET,
1101 32, 4, thermal->regs, 0x88, false);
1104 EXPORT_SYMBOL_GPL(rockchip_dump_temperature);
1106 static int rockchip_thermal_panic(struct notifier_block *this,
1107 unsigned long ev, void *ptr)
1109 rockchip_dump_temperature();
1113 static struct notifier_block rockchip_thermal_panic_block = {
1114 .notifier_call = rockchip_thermal_panic,
1117 static int rockchip_thermal_probe(struct platform_device *pdev)
1119 struct device_node *np = pdev->dev.of_node;
1120 struct rockchip_thermal_data *thermal;
1121 const struct of_device_id *match;
1122 struct resource *res;
1127 match = of_match_node(of_rockchip_thermal_match, np);
1131 irq = platform_get_irq(pdev, 0);
1133 dev_err(&pdev->dev, "no irq resource?\n");
1137 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
1142 thermal->pdev = pdev;
1144 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
1148 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1149 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
1150 if (IS_ERR(thermal->regs))
1151 return PTR_ERR(thermal->regs);
1153 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
1154 if (IS_ERR(thermal->reset)) {
1155 error = PTR_ERR(thermal->reset);
1156 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
1160 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1161 if (IS_ERR(thermal->clk)) {
1162 error = PTR_ERR(thermal->clk);
1163 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1167 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1168 if (IS_ERR(thermal->pclk)) {
1169 error = PTR_ERR(thermal->pclk);
1170 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1175 error = clk_prepare_enable(thermal->clk);
1177 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
1182 error = clk_prepare_enable(thermal->pclk);
1184 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1185 goto err_disable_clk;
1188 rockchip_thermal_reset_controller(thermal->reset);
1190 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1192 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1194 goto err_disable_pclk;
1197 thermal->chip->initialize(thermal->grf, thermal->regs,
1198 thermal->tshut_polarity);
1200 for (i = 0; i < thermal->chip->chn_num; i++) {
1201 error = rockchip_thermal_register_sensor(pdev, thermal,
1202 &thermal->sensors[i],
1203 thermal->chip->chn_id[i]);
1206 "failed to register sensor[%d] : error = %d\n",
1208 goto err_disable_pclk;
1212 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1213 &rockchip_thermal_alarm_irq_thread,
1215 "rockchip_thermal", thermal);
1218 "failed to request tsadc irq: %d\n", error);
1219 goto err_disable_pclk;
1222 thermal->chip->control(thermal->regs, true);
1224 for (i = 0; i < thermal->chip->chn_num; i++)
1225 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1227 platform_set_drvdata(pdev, thermal);
1229 thermal_device = pdev;
1231 atomic_notifier_chain_register(&panic_notifier_list,
1232 &rockchip_thermal_panic_block);
1237 clk_disable_unprepare(thermal->pclk);
1239 clk_disable_unprepare(thermal->clk);
1244 static int rockchip_thermal_remove(struct platform_device *pdev)
1246 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1249 for (i = 0; i < thermal->chip->chn_num; i++) {
1250 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1252 rockchip_thermal_toggle_sensor(sensor, false);
1255 thermal->chip->control(thermal->regs, false);
1257 clk_disable_unprepare(thermal->pclk);
1258 clk_disable_unprepare(thermal->clk);
1263 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1265 struct platform_device *pdev = to_platform_device(dev);
1266 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1269 for (i = 0; i < thermal->chip->chn_num; i++)
1270 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1272 thermal->chip->control(thermal->regs, false);
1274 clk_disable(thermal->pclk);
1275 clk_disable(thermal->clk);
1277 pinctrl_pm_select_sleep_state(dev);
1282 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1284 struct platform_device *pdev = to_platform_device(dev);
1285 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1289 error = clk_enable(thermal->clk);
1293 error = clk_enable(thermal->pclk);
1295 clk_disable(thermal->clk);
1299 rockchip_thermal_reset_controller(thermal->reset);
1301 thermal->chip->initialize(thermal->grf, thermal->regs,
1302 thermal->tshut_polarity);
1304 for (i = 0; i < thermal->chip->chn_num; i++) {
1305 int id = thermal->sensors[i].id;
1307 thermal->chip->set_tshut_mode(id, thermal->regs,
1308 thermal->tshut_mode);
1309 thermal->chip->set_tshut_temp(thermal->chip->table,
1311 thermal->tshut_temp);
1314 thermal->chip->control(thermal->regs, true);
1316 for (i = 0; i < thermal->chip->chn_num; i++)
1317 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1319 pinctrl_pm_select_default_state(dev);
1324 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1325 rockchip_thermal_suspend, rockchip_thermal_resume);
1327 static struct platform_driver rockchip_thermal_driver = {
1329 .name = "rockchip-thermal",
1330 .pm = &rockchip_thermal_pm_ops,
1331 .of_match_table = of_rockchip_thermal_match,
1333 .probe = rockchip_thermal_probe,
1334 .remove = rockchip_thermal_remove,
1337 module_platform_driver(rockchip_thermal_driver);
1339 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1340 MODULE_AUTHOR("Rockchip, Inc.");
1341 MODULE_LICENSE("GPL v2");
1342 MODULE_ALIAS("platform:rockchip-thermal");