2 * Copyright (C) 2012 Invensense, Inc.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
17 * @brief Hardware drivers.
20 * @file inv_mpu3050_iio.c
21 * @brief A sysfs device driver for Invensense devices
22 * @details This file is part of invensense mpu driver code
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/i2c.h>
29 #include <linux/err.h>
30 #include <linux/delay.h>
31 #include <linux/sysfs.h>
32 #include <linux/jiffies.h>
33 #include <linux/irq.h>
34 #include <linux/interrupt.h>
35 #include <linux/kfifo.h>
36 #include <linux/poll.h>
37 #include <linux/miscdevice.h>
38 #include <linux/spinlock.h>
40 #include "inv_mpu_iio.h"
41 #define MPU3050_NACK_MIN_TIME (2 * 1000)
42 #define MPU3050_NACK_MAX_TIME (3 * 1000)
44 #define MPU3050_ONE_MPU_TIME 20
45 #define MPU3050_BOGUS_ADDR 0x7F
46 int __attribute__((weak)) inv_register_mpu3050_slave(struct inv_mpu_iio_s *st)
51 int set_3050_bypass(struct inv_mpu_iio_s *st, bool enable)
53 struct inv_reg_map_s *reg;
58 result = inv_i2c_read(st, reg->user_ctrl, 1, &b);
61 if (((b & BIT_3050_AUX_IF_EN) == 0) && enable)
63 if ((b & BIT_3050_AUX_IF_EN) && (enable == 0))
65 b &= ~BIT_3050_AUX_IF_EN;
67 b |= BIT_3050_AUX_IF_EN;
68 result = inv_i2c_single_write(st, reg->user_ctrl, b);
71 /* Coming out of I2C is tricky due to several erratta. Do not
72 * modify this algorithm
75 * 1) wait for the right time and send the command to change
76 * the aux i2c slave address to an invalid address that will
79 * 0x00 is broadcast. 0x7F is unlikely to be used by any aux.
81 result = inv_i2c_single_write(st, REG_3050_SLAVE_ADDR,
86 * 2) wait enough time for a nack to occur, then go into
89 usleep_range(MPU3050_NACK_MIN_TIME, MPU3050_NACK_MAX_TIME);
90 result = inv_i2c_single_write(st, reg->user_ctrl, b);
94 * 3) wait for up to one MPU cycle then restore the slave
97 msleep(MPU3050_ONE_MPU_TIME);
99 result = inv_i2c_single_write(st, REG_3050_SLAVE_ADDR,
100 st->plat_data.secondary_i2c_addr);
104 result = inv_i2c_single_write(st, reg->user_ctrl,
105 (b | BIT_3050_AUX_IF_RST));
108 usleep_range(MPU3050_NACK_MIN_TIME, MPU3050_NACK_MAX_TIME);
113 void inv_setup_reg_mpu3050(struct inv_reg_map_s *reg)
115 reg->fifo_en = REG_3050_FIFO_EN;
116 reg->sample_rate_div = REG_3050_SAMPLE_RATE_DIV;
117 reg->lpf = REG_3050_LPF;
118 reg->fifo_count_h = REG_3050_FIFO_COUNT_H;
119 reg->fifo_r_w = REG_3050_FIFO_R_W;
120 reg->user_ctrl = REG_3050_USER_CTRL;
121 reg->pwr_mgmt_1 = REG_3050_PWR_MGMT_1;
122 reg->raw_gyro = REG_3050_RAW_GYRO;
123 reg->raw_accl = REG_3050_AUX_XOUT_H;
124 reg->temperature = REG_3050_TEMPERATURE;
125 reg->int_enable = REG_3050_INT_ENABLE;
126 reg->int_status = REG_3050_INT_STATUS;
129 int inv_switch_3050_gyro_engine(struct inv_mpu_iio_s *st, bool en)
131 struct inv_reg_map_s *reg;
137 p = (BITS_3050_POWER1 | data);
138 result = inv_i2c_single_write(st, reg->pwr_mgmt_1, p);
141 p = (BITS_3050_POWER2 | data);
142 result = inv_i2c_single_write(st, reg->pwr_mgmt_1, p);
146 result = inv_i2c_single_write(st, reg->pwr_mgmt_1, p);
147 msleep(SENSOR_UP_TIME);
149 p = BITS_3050_GYRO_STANDBY;
150 result = inv_i2c_single_write(st, reg->pwr_mgmt_1, p);
156 int inv_switch_3050_accl_engine(struct inv_mpu_iio_s *st, bool en)
159 if (NULL == st->mpu_slave)
162 result = st->mpu_slave->resume(st);
164 result = st->mpu_slave->suspend(st);
170 * inv_init_config_mpu3050() - Initialize hardware, disable FIFO.
171 * @st: Device driver instance.
172 * Initial configuration:
176 * Clock source: Gyro PLL
178 int inv_init_config_mpu3050(struct iio_dev *indio_dev)
180 struct inv_reg_map_s *reg;
183 struct inv_mpu_iio_s *st = iio_priv(indio_dev);
185 if (st->chip_config.is_asleep)
187 /*reading AUX VDDIO register */
188 result = inv_i2c_read(st, REG_3050_AUX_VDDIO, 1, &data);
191 data &= ~BIT_3050_VDDIO;
192 if (st->plat_data.level_shifter)
193 data |= BIT_3050_VDDIO;
194 result = inv_i2c_single_write(st, REG_3050_AUX_VDDIO, data);
199 /*2000dps full scale range*/
200 result = inv_i2c_single_write(st, reg->lpf,
201 (INV_FSR_2000DPS << GYRO_CONFIG_FSR_SHIFT)
205 st->chip_config.fsr = INV_FSR_2000DPS;
206 st->chip_config.lpf = INV_FILTER_42HZ;
207 result = inv_i2c_single_write(st, reg->sample_rate_div,
208 ONE_K_HZ/INIT_FIFO_RATE - 1);
211 st->chip_config.fifo_rate = INIT_FIFO_RATE;
212 st->chip_config.new_fifo_rate = INIT_FIFO_RATE;
213 st->irq_dur_ns = INIT_DUR_TIME;
214 if ((SECONDARY_SLAVE_TYPE_ACCEL == st->plat_data.sec_slave_type) &&
216 result = st->mpu_slave->setup(st);
219 result = st->mpu_slave->set_fs(st, INV_FS_02G);
222 result = st->mpu_slave->set_lpf(st, INIT_FIFO_RATE);
231 * set_power_mpu3050() - set power of mpu3050.
232 * @st: Device driver instance.
235 int set_power_mpu3050(struct inv_mpu_iio_s *st, bool power_on)
237 struct inv_reg_map_s *reg;
245 result = st->mpu_slave->suspend(st);
251 if (st->chip_config.gyro_enable) {
252 p = (BITS_3050_POWER1 | INV_CLK_PLL);
253 result = inv_i2c_single_write(st, reg->pwr_mgmt_1, data | p);
257 p = (BITS_3050_POWER2 | INV_CLK_PLL);
258 result = inv_i2c_single_write(st, reg->pwr_mgmt_1, data | p);
263 result = inv_i2c_single_write(st, reg->pwr_mgmt_1, data | p);
267 data |= (BITS_3050_GYRO_STANDBY | INV_CLK_INTERNAL);
268 result = inv_i2c_single_write(st, reg->pwr_mgmt_1, data);
273 msleep(POWER_UP_TIME);
275 result = st->mpu_slave->resume(st);
280 st->chip_config.is_asleep = !power_on;